FR2497596B1 - Machine informatique comportant une antememoire - Google Patents

Machine informatique comportant une antememoire

Info

Publication number
FR2497596B1
FR2497596B1 FR828200156A FR8200156A FR2497596B1 FR 2497596 B1 FR2497596 B1 FR 2497596B1 FR 828200156 A FR828200156 A FR 828200156A FR 8200156 A FR8200156 A FR 8200156A FR 2497596 B1 FR2497596 B1 FR 2497596B1
Authority
FR
France
Prior art keywords
anememory
computer machine
computer
machine
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR828200156A
Other languages
English (en)
Other versions
FR2497596A1 (fr
Inventor
Horace H Tsiang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wang Laboratories Inc
Original Assignee
Wang Laboratories Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wang Laboratories Inc filed Critical Wang Laboratories Inc
Publication of FR2497596A1 publication Critical patent/FR2497596A1/fr
Application granted granted Critical
Publication of FR2497596B1 publication Critical patent/FR2497596B1/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0855—Overlapped cache accessing, e.g. pipeline
    • G06F12/0857—Overlapped cache accessing, e.g. pipeline by multiple requestors

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Multi Processors (AREA)
FR828200156A 1981-01-07 1982-01-07 Machine informatique comportant une antememoire Expired FR2497596B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US22315481A 1981-01-07 1981-01-07

Publications (2)

Publication Number Publication Date
FR2497596A1 FR2497596A1 (fr) 1982-07-09
FR2497596B1 true FR2497596B1 (fr) 1989-03-03

Family

ID=22835271

Family Applications (1)

Application Number Title Priority Date Filing Date
FR828200156A Expired FR2497596B1 (fr) 1981-01-07 1982-01-07 Machine informatique comportant une antememoire

Country Status (10)

Country Link
JP (1) JPS57169990A (fr)
BE (1) BE891723A (fr)
CA (1) CA1175581A (fr)
CH (1) CH656470A5 (fr)
DE (1) DE3200042A1 (fr)
FR (1) FR2497596B1 (fr)
GB (1) GB2090681B (fr)
IT (1) IT1154407B (fr)
NL (1) NL8200043A (fr)
SE (1) SE445270B (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS617967A (ja) * 1984-06-15 1986-01-14 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Ｉ／ｏコントロ−ラ
AU5634086A (en) * 1985-05-06 1986-11-13 Wang Laboratories, Inc. Information processing system with enhanced instruction execution and support control
US4814981A (en) * 1986-09-18 1989-03-21 Digital Equipment Corporation Cache invalidate protocol for digital data processing system
DE3920883A1 (de) * 1989-06-26 1991-01-03 Siemens Ag Verfahren und anordnung zur erhoehung der verarbeitungsgeschwindigkeit der zentraleinheit einer datenverarbeitungsanlage
JPH03189845A (ja) * 1989-12-13 1991-08-19 Internatl Business Mach Corp <Ibm> 階層メモリ・システムおよびキヤツシユ・メモリ・サブシステム
JPH0756815A (ja) * 1993-07-28 1995-03-03 Internatl Business Mach Corp <Ibm> キャッシュ動作方法及びキャッシュ
KR101577851B1 (ko) 2009-02-20 2015-12-15 아사히 가라스 가부시키가이샤 일렉트렛의 제조 방법 및 정전 유도형 변환 소자

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3588829A (en) * 1968-11-14 1971-06-28 Ibm Integrated memory system with block transfer to a buffer store
JPS51148334A (en) * 1975-06-16 1976-12-20 Hitachi Ltd Buffer memory control method
JPS5441291A (en) * 1977-09-09 1979-04-02 Sagami Chem Res Center Cluster fixed substance, production thereof and catalyst
US4169284A (en) * 1978-03-07 1979-09-25 International Business Machines Corporation Cache control for concurrent access
GB2037039B (en) * 1978-12-11 1983-08-17 Honeywell Inf Systems Cache memory system
US4208716A (en) * 1978-12-11 1980-06-17 Honeywell Information Systems Inc. Cache arrangement for performing simultaneous read/write operations

Also Published As

Publication number Publication date
JPH0353657B2 (fr) 1991-08-15
SE445270B (sv) 1986-06-09
CA1175581A (fr) 1984-10-02
BE891723A (fr) 1982-04-30
JPS57169990A (en) 1982-10-19
DE3200042A1 (de) 1982-08-19
NL8200043A (nl) 1982-08-02
IT8267010A0 (it) 1982-01-06
DE3200042C2 (fr) 1991-03-07
FR2497596A1 (fr) 1982-07-09
SE8107832L (sv) 1982-07-08
GB2090681A (en) 1982-07-14
GB2090681B (en) 1985-11-20
CH656470A5 (de) 1986-06-30
IT1154407B (it) 1987-01-21

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Legal Events

Date Code Title Description
AM Act modifying the rights related to an application or a patent
GC Lien (pledge) constituted
TP Transmission of property
TP Transmission of property
TP Transmission of property

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