JPH0352711B2 - - Google Patents
Info
- Publication number
- JPH0352711B2 JPH0352711B2 JP58247048A JP24704883A JPH0352711B2 JP H0352711 B2 JPH0352711 B2 JP H0352711B2 JP 58247048 A JP58247048 A JP 58247048A JP 24704883 A JP24704883 A JP 24704883A JP H0352711 B2 JPH0352711 B2 JP H0352711B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- bit
- consecutive
- logic circuit
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000001514 detection method Methods 0.000 claims description 6
- 238000000034 method Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 1
Landscapes
- Facsimile Transmission Control (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58247048A JPS60141075A (ja) | 1983-12-28 | 1983-12-28 | G3フアクシミリ信号のライン同期符号検出回路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58247048A JPS60141075A (ja) | 1983-12-28 | 1983-12-28 | G3フアクシミリ信号のライン同期符号検出回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60141075A JPS60141075A (ja) | 1985-07-26 |
JPH0352711B2 true JPH0352711B2 (enrdf_load_stackoverflow) | 1991-08-12 |
Family
ID=17157634
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58247048A Granted JPS60141075A (ja) | 1983-12-28 | 1983-12-28 | G3フアクシミリ信号のライン同期符号検出回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60141075A (enrdf_load_stackoverflow) |
-
1983
- 1983-12-28 JP JP58247048A patent/JPS60141075A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS60141075A (ja) | 1985-07-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5287193A (en) | Parallel processing architecture of run-length codes | |
EP0145396B1 (en) | Codeword decoding | |
US4616211A (en) | Detecting codewords | |
GB1570501A (en) | Elements in facsimile signal system for coding addresses of information change picture | |
GB2138604A (en) | Data decoding | |
CA1291822C (en) | Method and apparatus for processing an image signal | |
US4918540A (en) | System for encoding or decoding analog video signals | |
JPH0352711B2 (enrdf_load_stackoverflow) | ||
JP2781120B2 (ja) | バーコード読取回路 | |
KR980700654A (ko) | 채널 신호를 정보 신호로 디코딩하는 장치 및 그 장치가 제공된 재생 장치(Apparatus for decoding a channel signal into an information signal and reproducing arrangement provided with the apparatus) | |
JPH04270569A (ja) | 画像処理装置におけるデータ圧縮方式 | |
JPH0149072B2 (enrdf_load_stackoverflow) | ||
KR940000681B1 (ko) | 디지탈 신호의 에러 정정회로 | |
JPH0212417B2 (enrdf_load_stackoverflow) | ||
JP3142911B2 (ja) | 符号化復号化装置の処理方法 | |
JPS61173582A (ja) | 変化点検出回路 | |
JPH0242275B2 (enrdf_load_stackoverflow) | ||
KR940004510B1 (ko) | Vcr의 동기신호 검출장치 | |
JPH0212418B2 (enrdf_load_stackoverflow) | ||
JPS62199173A (ja) | モデイフアイドハフマン符号復号回路 | |
JPS63299545A (ja) | 定形デ−タ検出回路 | |
JPH0556032A (ja) | フレーム同期方式 | |
JPS5925416A (ja) | 警報の待ち受け回路 | |
JPS58213552A (ja) | 信号の解読装置 | |
JPH0410716A (ja) | ハフマン符号の復号回路 |