JPH0340415A - Alignment mark and alignment mark forming method - Google Patents

Abstract

PURPOSE:To improve the positioning accuracy of an isolation region by a method wherein an oxide film pattern is provided on the non-element forming region in advance, and the oxide film pattern is exposed after an epitaxial growth method has been finished. CONSTITUTION:After a silicon oxide film has been formed on a silicon substrate 100, an oxide film pattern 104 is formed in the region 102 located on the surface corresponding to a non-element forming region. Then, an epitaxial layer 106, having arbitrary film thickness in accordance with the requirement of design, is provided on the whole surface of the substrate 100 including the oxide film pattern 104, and a semiconductor main body 108 is formed. Then, the oxide film pattern 104 is exposed by removing mostly a polycrystalline silicon part 106a located on the epitaxial layer 106 of the semiconductor main body 108. A substantial alignment mark 110 is formed with the exposed oxide film pattern itself.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to an alignment mark for mask alignment necessary in a photolithography process when manufacturing a semiconductor device M, and a method for forming the alignment mark.

(Prior Art) In the process of manufacturing a semiconductor device, a recessed portion having a step portion may inevitably be formed in the base of a silicon substrate or the like. Then, this step part is actively used as an alignment mark for the photomask in the subsequent process.
An isolation region is formed in an epitaxial layer provided on a base. In this case, in practice, the pattern of the photomask and the position on the surface of the epitaxial layer are aligned based on the step portion of the recess formed by transferring the recess of the base onto the surface of the epitaxial layer.

(Problems to be Solved by the Invention) However, the photomask pattern for forming the isolation region is usually designed and positioned based on the step portion formed in the base layer 11i, and Because the position of the recesses transferred to the layer in a plane parallel to the substrate surface is shifted from the position of the recesses on the base (for example, literature: "Solid State Technology"
y) / Japanese version, January 1982, p61-6
8J), there was a problem in that when mask alignment was performed using the concave portion (step portion) of the epitaxial layer as a reference, the isolation region could not be formed at the designed position in the epitaxial layer. In addition, such a positional shift between the recesses on the substrate and the recesses transferred and formed on the epitaxial layer is called a pattern shift, and has been a cause of deterioration of the characteristics of semiconductor devices and an impediment to higher integration of semiconductor devices. .

This problem will be explained in more detail with reference to an example in which an isolation region is formed in a semiconductor body having a buried layer provided for the purpose of reducing the collector series resistance of a bipolar element.

FIGS. 2A to 2D are schematic process diagrams for explaining a conventional method of forming an isolation region in an epitaxial layer of a semiconductor body.

Forming an oxide film pattern 12 on a P-type silicon substrate 10,
A silica film 14 containing, for example, antimony is provided on the entire surface of the substrate including the exposed surface (FIG. 2(A)).

After that, a thermal oxidation treatment is performed to provide an N-type buried layer 16,
These silica film 14 and oxide film pattern 12 are removed. During this thermal oxidation treatment, the oxide film 12 of the substrate 10 is
As is well known, the surface of the buried layer 16 has a level difference of about 1000 to 800 mm because the silicon in the parts not covered with the oxide is also oxidized.
A shallow flat-bottomed depression (also referred to as a recess) 18 having an inclined step portion (also referred to as a step portion) of approximately 00A is formed (FIG. 2(B)).

Substrate 1 on which this buried layer 16 with recesses 18 is formed
When an N-type epitaxial layer 20 having a thickness of, for example, about 10 um is grown on the entire surface of the substrate 10, the depression 18 of the substrate 10 is transferred to the surface of the epitaxial layer 20, creating a substantially similar or identical sloped step portion. A recess 22 is formed, but this recess 22 is shifted, for example, to the left in the figure from the original position of the buried layer 18, as shown in the figure, with respect to the recess 18 of the substrate 10. (C)). In this example, this shift amount 6 reaches about 8 um.

The epitaxial layer 20 is formed by aligning the photomask with reference to such a shifted step portion.
If the isolation region 24 is shaped too much, it will be formed in any direction from the original designer's position, so it may come very close to the buried layer 18 or come into contact with the buried layer 18. (FIG. 2(D)), and as a result, the breakdown voltage between each element region is significantly reduced. In order to avoid such closeness or contact, if the buried layer and the isolation region are formed with a distance of M from each other, the degree of integration of the semiconductor element will be reduced, making it impossible to achieve high integration of the semiconductor device.

This invention was developed in view of the above-mentioned conventional problems, and therefore, an object of the invention is to create an isolasin region at a designed position in an epitaxial layer with high positioning accuracy. Accordingly, it is an object of the present invention to provide an alignment mark and a method for forming the alignment mark that can perform mask alignment of photomasks.

(Means for Solving the Problem) In order to achieve this objective, according to the first invention of this application, an isolation region is provided in a semiconductor body consisting of a silicon substrate and a silicon epitaxial layer on the substrate. In forming the alignment marks, a first step is to form an oxide film pattern in a region of the surface of the substrate corresponding to the non-element formation region, and an epitaxial layer is formed on the entire surface of the substrate including this oxide film pattern. and a third step of removing at least a region above the oxide film pattern of the epitaxial layer to expose the oxide film pattern as an alignment mark. shall be.

In carrying out this first invention, an epitaxial layer having a polycrystalline region on the upper side of the oxide film pattern and a single crystalline region on the remaining substrate surface is formed in the epitaxial growth in the second step described above, and in the third step described above It is preferable to remove mainly the polycrystalline region of the epitaxial layer.

In general, according to the second invention of this application, an alignment mark for an isolation region is formed on a semiconductor body which is made of a silicon substrate and a silicon epitaxial layer on the substrate and has a buried layer formed therein. A first step of forming a first oxide film pattern in a region of the surface of the substrate corresponding to the non-element formation region, and forming a second oxide film pattern in region 1B of the surface corresponding to the element formation region. A second step of forming a high concentration impurity region to become a buried layer in the exposed region of the substrate after the formation of the first and second oxide film patterns, and a second step of removing the second oxide film pattern. After the third step, epitaxial growth is performed on the entire surface of the substrate including the first oxide film pattern to form a polycrystalline region above the first oxide film and a single crystal region on the remaining substrate surface. The fourth step is to form an epitaxial layer to form a semiconductor body with the aforementioned high-concentration impurities @ as a buried layer, and the aforementioned first oxide film pattern is aligned by mainly removing the aforementioned polycrystalline region to the substrate surface. and a fifth step of exposing it as a mark.

Roughly, according to the alignment mark of the third invention of this application, an oxide film pattern provided in a region on a surface of a silicon substrate corresponding to a non-element formation region, and a substrate including the oxide film pattern. Of the silicon epitaxial layer provided on the surface, a polycrystalline region on the oxide film pattern, and of the thermal oxide film provided on the surface of the epitaxial layer, the remaining heat is on the polycrystalline region. It is characterized by comprising a portion that protrudes from the surface of the oxide film.

In general, according to the fourth invention of this application, when forming an alignment mark for an isolation region on a semiconductor body made of a silicon substrate and a silicon epitaxial layer on the substrate, the substrate has no element formation. a first step of forming an oxide film pattern in a region on a surface corresponding to the region; a second step of providing an epitaxial layer over the entire surface of the substrate including the oxide film pattern to form a semiconductor body; A third step of forming a thermal oxide film on the surface of the substrate by thermal oxidation treatment.

In carrying out the method of the fourth invention, it is preferable to grow a polycrystalline region on the upper side of the oxide film pattern and a single crystalline region on the remaining substrate surface in the epitaxial growth in the second step described above. good.

In general, according to the fifth invention of this application, an alignment mark for an isolation region is formed on a semiconductor body which is made up of a silicon substrate and a silicon epitaxial layer on the substrate and has a buried layer formed therein. A first oxide film pattern is formed in a region of the surface of the substrate corresponding to the non-element formation region, and a second oxide film pattern is formed in a region of the surface corresponding to the element formation region. After the formation of the first and second oxide film patterns, a high concentration impurity region to become a buried layer is placed in the exposed region of the substrate.
a second step of forming the second oxide film pattern; a third step of removing the second oxide film pattern; and epitaxial growth is performed on the entire surface of the substrate including the first oxide film pattern to form a polycrystalline region on the upper side of the first oxide film and the remainder. a fourth step of forming a semiconductor body with the high concentration impurity region as a buried layer by providing an epitaxial layer each having a single crystal region on the substrate surface of the substrate;
A fifth step of forming a thermal oxide film is included.

(Function) According to the first invention, an oxide film pattern to be used as an alignment mark is provided in advance on the surface area of the substrate corresponding to the non-element forming area, and then epitaxial growth is performed on the entire surface of the substrate including the oxide film pattern. After that, the epitaxial layer is mainly removed from the non-device forming region to form the oxide film pattern v! The exposed oxide film pattern serves as a substantial alignment mark. Therefore, the process of forming this alignment mark is extremely simple and can be incorporated into the manufacturing process of semiconductor devices, and furthermore, since this alignment mark is provided virtually fixedly on the substrate, If the photomask for forming the isolation region is positioned using this as a reference, the accuracy of positioning the isolation region will be improved compared to the conventional method. Therefore, it becomes easy to design a highly integrated semiconductor device.

The second invention of this application is to create an alignment mark that is necessary for providing an isolation region in the semiconductor body after the buried layer is formed, during the manufacturing process of a semiconductor device having a buried layer within the semiconductor body. This is the formation method.

According to the second invention, an oxide film pattern to be used as an alignment mark is provided in an area on the surface of the substrate corresponding to the non-element forming area, and an oxide film pattern is provided on the surface of the substrate corresponding to the element forming area. Inside, oxide film patterns with impurity introduction windows used to form multiple individual buried layers are formed together in the same process, and high-concentration impurity layers for the buried layers are formed together. After forming the layer, only the oxide pattern for the alignment mark remains and all other oxide patterns are removed, and then epitaxial growth is performed on the entire surface of the substrate to form the semiconductor body, and then the polycrystalline The oxide film pattern left on the substrate is exposed by utilizing the difference in etching speed between silicon and single crystal silicon, and this exposed oxide film pattern is used as an alignment mark.

In the case of the second invention, the same effect as the first invention can be expected, and based on the fact that the isolation region can be positioned with high precision using this alignment mark, the buried layer and the isolator are The relationship between the position and the ration area can be set more accurately in advance. As a result, in the case of the present invention, it is easier to design a higher degree of integration than in the past, and the proximity or contact between the buried layer and the isolation region, which is one of the causes of deterioration of device characteristics, can be avoided. This can be avoided more reliably than before.

According to the structure of the alignment mark of the third invention described above, it has a three-layer structure consisting of an oxide film pattern, a polycrystalline region in the epitaxial layer, and a thermal oxide film. It has a protruding part of the film, and the step of this protruding part is substantially shaped like Ili directly above the edge of the oxide film pattern, so there is no substantial positional deviation between the oxide film pattern and the protruding part. .

Further, the fourth and fifth inventions described above are methods for forming the alignment mer/) of the third invention described above, and in both methods, the surface of the silicon epitaxial layer formed on the substrate is Thermal oxidation forms protrusions.

The speed of this thermal oxidation is different between the polycrystalline region and the single crystalline region of the epitaxial layer, and is faster in the polycrystalline region. Therefore, in thermal oxidation treatment performed within the same period of time, a thick oxide film is formed on the surface of the polycrystalline region and a thin oxide film is formed on the surface of the single crystal region. Therefore, in the entire oxide film, the surface is formed to protrude more on the polycrystalline region than on the single crystal. Moreover, the above-mentioned polycrystalline region is substantially formed only on the upper side of the oxide film pattern, and the protruding portion of the thermal oxide film is also substantially formed only on the surface of the polycrystalline region, so this protruding portion is As already mentioned in the explanation of the third invention, the position of the oxide film pattern does not substantially deviate from the position of the oxide film pattern formed on the substrate as a design reference. In either case, a protruding portion can be formed at substantially the same position as the design reference oxide film pattern by a simple method of forming an oxide film pattern, followed by epitaxial growth and thermal oxidation treatment of the surface of the epitaxial layer.

By using the alignment mark according to any of the third, fourth, and fifth inventions described above, the step of the protruding portion of the thermal oxide film can be used to position the photomask for forming the isolation region. , the accuracy of positioning the isolation region is improved compared to the conventional method.

(Embodiments) Hereinafter, embodiments of the present invention will be described with reference to the drawings.

Note that the figures referred to below are only schematic illustrations to enable understanding of the present invention, and therefore, the dimensions, shapes, arrangement relationships, etc. of each component shown in the figures are not limited to the illustrated examples. It should also be understood that the following description of the embodiments is merely a description of preferred embodiments. Also,
In the cross-sectional view, hatching etc. representing the cross section are partially omitted.

This first invention is an alignment process that is necessary in the process of providing an isolation region for forming an element region in the epitaxial layer of a semiconductor body in which a silicon epitaxial layer is provided on a silicon substrate. This is a method of forming a mark, and a preferred embodiment thereof will be described.

Figures 1 (A) to (C) are process diagrams used to explain the first invention, and each figure shows the cross-sectional structure of the structure obtained at the main process steps, so the alignment marks are focused on. It is shown in a cross-sectional view.

First, in the first step, a silicon substrate 100! After preparing the silicon oxide film and forming a silicon oxide film on its surface by thermal oxidation or other appropriate method, oxidation is performed in the region 102 on the surface corresponding to the non-element forming region, such as the grid line region, in a photolithography process. A film pattern +04 is formed. In this embodiment, the substrate 100 is of P type, and the oxide film pattern 1
The planar shape projected onto the substrate surface of 04 is any suitable shape, preferably a stripe shape with an appropriate width according to the design.

Next, in a third step, an epitaxial layer 106 having an arbitrary thickness according to the design is provided on the entire surface of the substrate 100 including this oxide film pattern 104, and a semiconductor body 108 is formed. This epitaxial growth method does not matter, but in any case, if the base is single crystal silicon,
The epitaxial layer +06 grows as a silicon single crystal, and if the underlying layer is a silicon oxide film, it grows as a silicon polycrystal, so the oxide film pattern +04
The region of the epitaxial layer 106 substantially above becomes a silicon polycrystalline layer 106a, and the other region becomes a silicon single crystal layer +06b. The cross-sectional structure of the structure obtained at this stage is shown in FIG. 1(B).

Next, in a third step, a portion of the epitaxial layer 106 of this semiconductor body 108, which is mainly a polycrystalline silicon layer, is etched to a depth that reaches the surface of the substrate 100 using any suitable method depending on the design, such as plasma etching. Then, it is removed to expose the oxide film pattern +04, and this exposed oxide film pattern itself makes a substantial alignment mark (1
10) is formed. Further, this single crystal silicon layer 106b is a substantial element forming region 1 of the semiconductor body 108.
It becomes 12. The cross-sectional structure of the structure obtained at this stage is shown in FIG. 1(C).

In reality, each of the above-mentioned steps can be incorporated into the required steps of the semiconductor device manufacturing process.

Such an alignment mark 110 may be provided at an appropriate location in a predetermined area on the substrate +00 where no element is formed. Preferably, the alignment units 110 are provided perpendicularly to each other on the substrate 100. FIG. 3 is a partial plan view showing the state in this case, and the dimensions are different from those in FIG. 1(C). 1(C) corresponds to a sectional view taken along the line II in the figure. In addition, in this FIG. 3, the alignment mark 11
0 is shown with diagonal lines to emphasize it.

Alignment marks 110 yen formed in this way in the post-process of manufacturing semiconductor devices! The required isolation @ area (not shown) is provided in the epitaxial layer +08 by performing mask alignment using the same method.

For this reason, a photomask is used to form a resist pattern for forming an isolation region as in the prior art, and the state of this photomask is shown in the partial plan view of FIG. Although this figure is shown with dimensions different from those in each figure in FIG. 1, as shown in FIG. 4, this photomask 11
4 is provided with a key-shaped alignment mark 116 (indicated by diagonal lines in the figure). This key-shaped alignment mark 116 corresponds to, for example, corner areas for four intersections of the alignment marks 110. Provided at appropriate intervals from each other. By aligning the masks so that each side of the alignment mark 116 is parallel to the alignment marks 110 in two orthogonal directions at equal intervals, the mask alignment can be easily and/or with high precision. In FIG. 4, the outline of the alignment mark 110 is indicated by a dotted line, and the element formation area ((112 in FIG. 1(C) and FIG. 3) is
The area of the photomask 114 corresponding to the area shown in FIG. Note that the illustrated photomask 114 is shown with a mask pattern for an isolation region omitted.

As is clear in this example, the alignment mark 110 is provided on the surface of the substrate 100, and even after epitaxial growth, the epitaxial layer is partially removed to expose the mark. Therefore, at the time of mask alignment, it is possible to align the photomask's photomask alignment mark with the alignment mark 110, which is located at the designed position on the substrate without pattern shift, so the mask can be aligned with higher precision than before. It is possible to make adjustments.

Next, a preferred embodiment of the second invention will be described by taking as an example the manufacturing process of a bipolar type semiconductor device having an N+ buried layer.

FIGS. 5(A) to 5(K) are manufacturing process diagrams of a semiconductor device used to explain the second invention, and each figure is a partial sectional view showing the cross-sectional structure of a structure obtained at the main process step. be.

First, in the first step, a P-type silicon substrate 2007&
A silicon oxide film 202 having a thickness of 3,000 to 10,000 Å is formed on the entire surface of the substrate 200 by thermal oxidation or any other suitable method (FIG. 5(A)).
). Subsequently, this oxide film 202 is patterned by photoetching. In this case, there are two types of oxide film patterns to be formed. A first oxide film pattern 204 is a pattern for an alignment mark and is formed in a region 206 on a surface of the substrate 200 corresponding to a non-element formation region, which will be described later. The second oxide film pattern 208 has an element type 5! which will be described later. FIG. 5(B)
You will get a structure as shown in . This second oxide film pattern 2
08 has a window 208a% for introducing impurities into the substrate 200 for forming a buried layer to be described later.

In the next second step, impurities are introduced into the exposed regions of the substrate 200 where the first and second oxide film patterns 204 and 208 are formed to form a high concentration impurity region to be replaced with a buried layer. Therefore, in this embodiment, preferably, a wrinkle film 212 containing antimony as an impurity is appropriately provided on the entire surface of the substrate 200 including the oxide films 204 and 208 by a conventional method (see FIG. 5(C). )
). Next, this silica film 2+218. A thermal oxidation treatment is performed on the provided structure to diffuse antimony to an appropriate depth in the substrate 200 to form an N-type high concentration impurity layer 214.
CH2 (D)), by this thermal oxidation treatment, the silica film 212 has become an oxide film 216 that is integrated with the oxide films 204 and 208. Further, this impurity introduction may be performed by ion implantation or the like, and other suitable impurities can be used as the impurity.

In the next third step, a portion of the first oxide film pattern 204 of this oxide film 216 is left to remain.
The remaining oxide film portion including the second oxide film pattern 208 described above is removed. Therefore, the first oxide film pattern 204 of the oxide film 216 in the state shown in FIG.
The part except for was removed by photo-etching, as shown in Figure 5 (
The state shown in E) is obtained.

In the next fourth step, an epitaxial layer 218 is formed on the entire surface of the substrate 200 including the first oxide film pattern 204 to form a semiconductor body 220 to obtain the state shown in FIG. , this epitaxial layer 218
2. As is well known, as a silicon layer doped with an N-type impurity such as phosphorus, a silicon layer is formed on the upper side of the first oxide film 204 to a thickness of 2 to 20 um by an appropriate method. A polycrystalline region 218a is formed, and a silicon single crystal region 21 is formed on the remaining substrate surface.
8b is formed. In addition, this epitaxial layer 218
, the high concentration impurity region 214 (FIG. 5(E))
A portion of the impurity enters into the epitaxial layer, and this impurity region expands a little to become an N◆ type buried layer 222.

In the next fifth step, mainly this polycrystalline region tlf2
18a! The substrate surface is removed to expose the first oxide film pattern 204 shown in FIG. 5(F) as an alignment mark. Therefore, in this embodiment, a resist layer 226 is provided on the entire upper surface of the structure shown in FIG.
26a is opened (FIG. 5(G)'), and then appropriate etching such as plasma etching is performed to remove this polycrystalline region 218a to the surface of the substrate 200 and form the groove 2.
28 is formed, and a first oxide film pattern 2 is formed in this groove 228.
14 is exposed as an alignment mark 230, and then the resist layer 226 is appropriately removed (FIG. 500).
.

Note that the substrate region corresponding to the region occupied by this groove 228 is a non-element forming region 232a, which becomes, for example, a grid line region, while the remaining epitaxial layer region is an element forming region 232b.

In this way, through the first to fifth steps described above, the alignment mark 230v? is formed on the semiconductor body 220 having the buried layer 222. It can be shaped.

Next, such an alignment mark 230 is used for mask alignment with a photomask to form an element formation region 232b.
An example of a process will be described in which an isolation region is provided in the semiconductor device and bipolar transistors are formed in element regions separated from each other by the isolation region. However, here, the process of forming the isolation region will be mainly explained.

First, the entire surface of the structure as shown in FIG. A transparent protective film 300 is formed.

Preferably, this protective film 300 is applied to the semiconductor body 2, for example.
This is a silicon oxide film formed by the heat treatment in step 20.

After that, a resist layer 302 is applied to the entire upper surface of this oxidized l11300, including the alignment mark 230, using photorin technology! form (Figure 5 (■)). In this embodiment, the resist layer 302 is preferably a positive resist layer that allows the alignment mark 230 underneath to be seen through.

Next, a photomask 400 on which a mask pattern for forming an isolation region has been formed in advance is aligned with this alignment mark 230 (FIG. 5(J)). A transparent pattern for the isolation area is shown as 402, other opaque areas are shown with diagonal lines, and key-shaped matching marks (shown with diagonal lines in the figure) 9404 are provided.
6, and a partial plan view thereof is schematically shown in FIG. FIG. 6 shows the photomask 400 aligned with the semiconductor body 220, but in order to avoid complicating the diagram, only the alignment mark 230 is shown as a component on the semiconductor body 220 side by a dashed line. . In addition, the cross section taken along the line V-V in FIG. 6 is shown in FIG.
) corresponds to the portion of the photomask 400 shown in FIG.

Mask alignment in this case is performed in the same manner as described with reference to FIG. I will do it as I see fit.

Next, as a photolithography process, the resist layer 302 is
A window 304 for forming an isolation region is formed,
Thereafter, using this window, a window 306 is opened in the oxide film 300 serving as the lower protective film (FIG. 5(K)).

Thereafter, the resist layer 302 is removed, and a suitable P-type impurity is introduced at a high concentration to an appropriate depth into the silicon single crystal region 218b by vapor phase diffusion, for example, to form the silicon single crystal region 218b. A partially high concentration impurity layer 30
8 (FIG. 5(K)), and then heat treatment is performed to thermally diffuse the impurity into the silicon single crystal region around the high concentration impurity layer 308, thereby converting that region into a high concentration impurity region. This region and the impurity layer 308 form an isolation region 310 substantially as designed (see FIG.
By this heat treatment, the surface of the isolation region 3100 is also oxidized to become an oxide film 312 that is integrated with the protective film 300. Further, they are surrounded by this isolation reed region 310 and are electrically isolated from each other, and are each a silicon single crystal region (218b in FIG. 5(K)).
The remaining region becomes the element region 314.

Next, after removing this oxide film 312 and the alignment mark (oxide film) 230 by an appropriate method, the base region 320 consisting of a P-type diffusion region is emitter and collector regions 322 and 324 consisting of N+ type diffusion regions;
Form each of them. Each of these areas 320.322.3
24, the surface of the semiconductor body 220 in which each structure Fjj and precepts are formed is also coated with an oxide film 3.
16 is formed, so after opening a window in this oxide film 316 to make contact with the diffusion layer 320, 322, 324 for each electrode, each electrode (wiring layer) 32 is formed.
6.328.330 respectively. As a result, N.P.
An N-type bipolar transistor is formed.

3.4. Next, the third, fourth and third preferred embodiments of the third invention will be described in the same manner as the already explained preferred embodiment of the second invention. The process will be explained using an example.

In the following explanation, duplicate explanations of steps common to the embodiment of the second invention explained with reference to FIG. 5 and constituent components shown in the drawings will be avoided unless specifically mentioned. Therefore, its explanation will be omitted. In the following description, the first oxide film pattern 204 described in FIG. 5 functions as a design reference alignment mark for the alignment mark of the present invention. Also,
In the embodiment shown in FIG. 5, the thickness of the epitaxial layer is 2 to 2.
In this example, the film thickness was set to 6 to 2 urn.
0L1m.

7(A) to 7(') are manufacturing process diagrams of semiconductor devices provided for explanation of the third, fourth, and third inventions, and each figure shows a cross-sectional structure of a structure obtained in the main process steps. FIG.

First, an embodiment of the alignment mark forming method according to the third invention will be described.

According to this embodiment, the first step to the fourth step is as shown in FIG. 5(A) from the first step to the fourth step of the second invention.
Since the same steps as those described with reference to (F) are obtained, the explanation thereof will be omitted.

In this embodiment, in the next fifth step, the structure obtained in the previous step (see FIG. 5(F)) is heat-treated to form an epitaxial layer 218 having a polycrystalline region 218a and a single-crystalline region 218b. A thermal oxide film 500 is formed on the entire surface (FIG. 7(A)). In this case, the thermal oxide film 500 is made of Si
It is an O2 film, and its thickness is set to an appropriate thickness, preferably 3.
The value is within the range of 000λ to 5000λ, and it is a transparent film that can be seen through at least the first oxide film pattern 204 provided as an alignment mark for design standards on the lower side. . On the other hand, this thermal oxide film 500
is the thickest part 50 on the polycrystalline t*218a
0a, and a portion 500b whose film thickness is thinner than that on the single crystal region 218b, and this portion 500a is thinner than the portion 500b.
It forms a protruding part that protrudes upward from the surface of.

Therefore, this protruding portion 500b and other portions 500b
There is a gap between the two. The reason why such a difference in level occurs is that the polycrystalline formed on the first oxide film pattern 204 and the single crystalline formed on the silicon substrate have different crystal grain sizes, so oxidation occurs on the respective surfaces. This is because the oxidation rate is faster in polycrystals than in single crystals.

Note that this polycrystalline region 218a and the substrate region corresponding to the region occupied by this region 218a form an element non-forming region 230.
a, which is, for example, a grid line area, and on the other hand,
The remaining epitaxial layer region etc. is the element formation region 232b.
It is.

Further, the alignment marks may be provided on the substrate 200 in a predetermined area where no element is formed, but preferably they are provided on the substrate 200 so as to be perpendicular to each other.

FIG. 8 is a plan view showing the state in this case, focusing on the orthogonal portions of the alignment marks, and although the dimensions are different from those in FIG. The corresponding portion of A) corresponds to the cross-sectional view taken along the line ■-■ in the figure. Therefore, in the plan view of FIG. 8, the first oxide film pattern 2 below the transparent oxide film 500 is
04 is emphasized and its outline is shown with broken lines, and the pattern portion is shown with diagonal lines, and an oxide film 500 is provided on the entire surface above it. And in this figure, oxidation f
The lower side of the protruding portion 500a of i500 is a line area corresponding to the grid element non-forming area 230a, and the lower side of the remaining thinner portion 500b is the element forming area 232.
It is b.

As described above, through the first to fifth steps described above, the first oxide film pattern 204, the polycrystalline region 218a, and the protruding portion 500 are formed on the semiconductor body 220 having the buried layer 222.
It is possible to form the main body of the alignment mark 510 consisting of a.

Next, as already explained with reference to FIG. 5, an isolation region is provided in the element formation region 232b by using the alignment mark 510 for mask alignment with a photomask, and the isolation regions are separated from each other in this isolation region. An example of a process for forming a bipolar transistor in the device region will be described. However, here, the process of forming the isolation region will be mainly explained.

First, using photolithography, the alignment mark 5 is
A resist layer 5 is formed on the entire upper surface of this oxide film 500 including 10.
Do the 12 o-kata precepts (Figure 7 (B)). In this embodiment, the resist layer 512 is preferably a positive resist layer that is transparent to the lower alignment mark 510%.

Next, a photomask 400 on which a mask pattern for forming an isolation region, similar to that already explained with reference to FIG.
Perform mask alignment for (Figure 7 (C)), and
Since this photomask 400 has already been explained,
The explanation will be omitted.

Mask alignment in this case is performed by aligning the protruding portions 510 of the alignment marks 510, in which each side of the key-shaped alignment mark 404 faces, in the same manner as described with reference to FIG.
This is done so that it is parallel to each side of 0a and at equal intervals between corresponding sides.

Next, as a photolithography process, a resist layer 512 is
forming a window 514 for forming an isolation region;
Thereafter, using this window, a window 516 is opened in the oxide film 500 as the lower protective film (FIG. 7CD)).

Thereafter, the resist layer 512 is removed and, for example, a suitable P-type impurity is introduced at a high concentration to an appropriate depth into the silicon single crystal region 218b by vapor phase diffusion to form the silicon single crystal region 2+8b7a. Partially high concentration impurity layer 5
18 (FIG. 7(D)), followed by heat treatment to thermally diffuse impurities into the silicon single crystal region around the high concentration impurity layer 518, and convert that region into a high concentration impurity region. This region and the impurity layer 518 form an isolation region 520 substantially as designed (see FIG.
E)). Note that by this heat treatment, the surface of the isolation region 520 is also oxidized to become an oxide film 522 that is integrated with the protective film 500. Also, this isolation region W
t520 and are electrically isolated from each other, each having a silicon single crystal region (218b in FIG. 7(D)).
The remaining region (indicated by ) becomes the element region 524 (
Figure 7 (E)”).

Next, in accordance with the conventional technique for forming constituent regions of a bipolar element, a base region 530 consisting of a P-type diffusion region, and then an emitter and collector region 530 consisting of an N-type diffusion region.
32 and 534, respectively. Each of these areas 53
0, 532. During the heat treatment performed during the formation of 534,
Since an oxide film 326 is also formed on the surface of the semiconductor body 220 in which components are incorporated into each structure 15, this oxide film 32
After opening windows for contacting the diffusion layers 530, 532 and 534 for each electrode in 6, the respective electrodes (wiring layers) 536, 538, 540! Provide each. As a result, an NPN type bipolar transistor is formed.

As is clear from the embodiments described with reference to FIGS. 7(A) to 7(F) above, the alignment mark 5 of the third invention
Reference numeral 10 indicates a first oxide film pattern 204 provided on a substrate 200 as a design reference alignment mark, and a silicon polycrystalline region 2 formed above the first oxide film pattern 204 by silicon epitaxial growth.
18a and a protruding portion 500a of a thermal oxide film formed roughly on the surface of this polycrystalline region 218a by thermal oxidation 15! I can see that it has been done. This polycrystalline region tli218a is formed almost perpendicularly to the surface of the substrate 200, directly above the first oxide film pattern 204, and
The protruding portion 500a of the thermal oxide film also forms this polycrystalline region 218a.
is formed directly above the In FIGS. 7(A) to 7('), these polycrystalline regions 218a and protruding portions 500a are shown in a state where they are formed to be wider than the width of the first oxide film pattern 204 in the direction parallel to the substrate surface. Even if the thickness of the epitaxial layer is 20 um, the spread width is much shorter than 8 um, and the deviation width can be considered as substantially zero. The protruding portion 500a formed on the front surface side is located substantially directly above the first oxide film pattern, and the corner (slightly inclined) forming the step of this protruding portion 500a is used as an alignment mark. However, the mask pattern can be aligned with the same high precision as alignment using the reference first oxide film pattern.

In addition, the above-mentioned FIGS. 5(A) to (M) and FIG. 7(A)
In the embodiment described with reference to ~(''), the method for forming the alignment mark was explained on the premise of manufacturing a bipolar semiconductor device having an N+ buried layer. However, when focusing on the alignment mark 510 itself, may include the steps of the alignment mark forming method of the fourth invention.

That is, according to the method of the fourth invention, first, in the first step, an oxide film pattern 204 is formed in a region on the surface of the substrate 200 corresponding to the non-element formation region (see FIGS. 5A and 5).
B)).

Next, in a second step, an epitaxial layer 218 is provided on the entire surface of the substrate including this oxide film pattern 204 to form a semiconductor body 220 (FIG. 5(F)). By the growth of this epitaxial layer 218, a polycrystalline region 218a is formed above the oxide film pattern and a single crystalline region 218b is formed on the remaining substrate surface (FIG. 5(F)).

Next, in the third step, this epitaxial layer 218
By providing a thermal oxide film 500 on the surface of the oxide film pattern 218, at least a region of the thermal oxide film above the oxide film pattern 218 is made to protrude (FIG. 7(A)). As described above, the protruding portion 500a of the thermal oxide film 500 formed in this way is formed substantially directly above the oxide film pattern 204, so the corner of the protruding portion 500a is aligned with the photomask. It can be used as a mark. Each step of the fourth invention can also be included continuously or separately in the actual manufacturing process of a semiconductor device.

The invention is not limited only to the embodiments described above, but can be subjected to many variations and modifications.

(Effects of the Invention) As is clear from the above description, according to the first and second inventions of this application, an oxide film pattern is provided in advance on the element non-formed region of the substrate before epitaxial growth. After the epitaxial growth, this oxide film pattern lFr is exposed and used as an alignment mark, so there is no pattern shift of the alignment mark as in the conventional method, and therefore a mask pattern for forming an isolation region is provided. The photomask can be aligned with this alignment mark more easily and with better positioning accuracy than before.

Further, according to the fourth and third inventions described above, a mark serving as an alignment reference is formed in advance on a silicon substrate as an oxide film pattern, and silicon is epitaxially grown on the silicon substrate to form a single polycrystalline region. When an epitaxial layer having a crystalline region is formed and then the surface of this epitaxial layer is thermally oxidized, due to the difference in oxidation rate at the surface of the polycrystalline region and that at the surface of the single crystalline region, An oxide film whose surface is more protruding than the single crystal region is formed on the polycrystalline region. A step is created between the protruding portion of the oxide film on the polycrystalline region and the remaining oxide film portion on the single crystal region. This protruding portion is formed substantially directly above the oxide film pattern provided on the substrate. Therefore, according to the alignment mark of the third invention formed according to the methods of the fourth and third inventions, the step of the protruding portion can be used as a mask alignment mark for forming an isolation region after epitaxial growth. By doing so, it is possible to match masks with higher precision than before.

According to the invention of the present application, as a result of being able to perform mask alignment with such high positioning accuracy, it is possible to provide an isolation region as designed, and therefore it is possible to achieve high integration of bipolar semiconductor devices and to It is possible to significantly improve the breakdown voltage between the device regions in which each semiconductor device is built, and to prevent deterioration of the characteristics of each device.

[Brief explanation of drawings]

FIGS. 1(A) to (C) are process diagrams for explaining the alignment mark forming method of the first invention, and FIGS. 2(A) to (D
) is an explanatory diagram of a method of forming alignment marks to explain the conventional problems, and FIG. 3 is a partial diagram schematically showing an example in which alignment marks are provided orthogonally to each other on a substrate according to the first invention. FIG. 4 is a partial plan view schematically showing a photomask when an isolation 9M region is formed using an alignment mark formed by the alignment mark forming method of the first invention; FIG. 5(A) to 5(M) are process diagrams for explaining the alignment mark forming method of the second invention and for explaining the manufacturing of a semiconductor device by forming an isolation region using this alignment mark, respectively; 7(A) to (" ) is a process diagram showing an example of an alignment mark manufacturing process, which serves to explain the third, fourth, and third inventions; FIG. 8 provides an explanation of the third, fourth, and third inventions;
FIG. 3 is a partial plan view of an alignment mark. +00.200...Silicon substrate +02.206...Substrate surface region 104 corresponding to the non-element formation region...Oxide film pattern 106.218...Epitaxial layer 06a, 218
a... Polycrystalline region 06b, 218b... Single crystal region 08.220... Semiconductor body 10.230.510... Alignment mark 12.
...Element formation region 14...Photomask 16...Alignment marks 202, 216, 312, 316, 522...
Oxide film 204...First oxide film pattern (or oxide film pattern) 208...Second oxide film pattern 210...Substrate surface area 212 corresponding to the element formation area
... Silica film 214 ... High concentration impurity layer (N raw mineral dispersion layer) 222 ...
・Embedded layer 226.302.512...Resist layer 226a, 3
04.306...Window 228--Groove 232a...Element non-formation region 232b...Element formation region 300...Protective film (oxide film) 308.518...High concentration impurity layer 310.520 ...Isolation Yoshi territory 1f4314
．． 524...Element region 320.530...Base region 322.532...Emitter region 324.534...Collector region 326, 328.330.536.538.540...
...Electrode (wiring layer) 400...Photomask 402...Mask pattern 404...Key-shaped alignment mark 500...Thermal oxide film 500a...Protruding portion 500b...Thin film thickness portion.

Claims (7)

[Claims] (1) When forming an alignment mark for an isolation region on a semiconductor body consisting of a silicon substrate and a silicon epitaxial layer on the substrate, oxidation is performed in the area on the surface of the substrate corresponding to the non-device forming area. a first step of forming a film pattern; a second step of forming a semiconductor body by providing an epitaxial layer over the entire surface of the substrate including the oxide film pattern; and a region of the epitaxial layer at least above the oxide film pattern. A method for forming an alignment mark, comprising: a third step of removing a portion of the oxide film pattern to expose the oxide film pattern as an alignment mark. (2) In the alignment mark forming method according to claim 1, an epitaxial layer having a polycrystalline region above the oxide film pattern and a single crystalline region on the remaining substrate surface is provided in the epitaxial growth of the second step, and An alignment mark forming method characterized in that in the third step, mainly the polycrystalline region portion of the epitaxial layer is removed. (3) When forming an alignment mark for an isolation region on a semiconductor body consisting of a silicon substrate and a silicon epitaxial layer on the substrate with a buried layer formed inside, a first step of forming a first oxide film pattern in a region on a corresponding surface and a second oxide film pattern in a region on the surface corresponding to an element formation region; In the exposed region of the substrate after formation, a high concentration impurity region to be a buried layer is formed.
a second step of forming the second oxide film pattern; a third step of removing the second oxide film pattern; and after the third step, performing epitaxial growth on the entire surface of the substrate including the first oxide film pattern on the upper side of the first oxide film pattern. a fourth step of forming an epitaxial layer having a polycrystalline region and a single crystalline region on the remaining substrate surface to form a semiconductor body with the high concentration impurity region as a buried layer; A method for forming an alignment mark, comprising: a fifth step of removing the first oxide film pattern to the substrate surface to expose the first oxide film pattern as an alignment mark. (4) Among the oxide film pattern provided in a region on the surface of the silicon substrate corresponding to the non-element formation region, and the silicon epitaxial layer provided on the substrate surface including the oxide film pattern, a polycrystalline region on the oxide film pattern; and a portion of the thermal oxide film provided on the surface of the epitaxial layer that is on the polycrystalline region and protrudes from the surface of the remaining thermal oxide film. An alignment mark that is characterized by: (5) When forming an alignment mark for an isolation region on a semiconductor body consisting of a silicon substrate and a silicon epitaxial layer on the substrate, oxidation is performed in the area on the surface of the substrate corresponding to the non-device forming area. a first step of forming a film pattern; a second step of forming a semiconductor body by providing an epitaxial layer on the entire surface of the substrate including the oxide film pattern; and a thermal oxidation treatment on the surface of the epitaxial layer. An alignment mark forming method comprising: a third step of forming a film. (6) The alignment mark forming method according to claim 5, further comprising providing an epitaxial layer having a polycrystalline region above the oxide film pattern and a single crystalline region on the remaining substrate surface in the epitaxial growth of the second step. Characteristic alignment mark formation method. (7) When forming an alignment mark for an isolation region on a semiconductor body consisting of a silicon substrate and a silicon epitaxial layer on the substrate with a buried layer formed therein, a first step of forming a first oxide film pattern in a region on a corresponding surface and a second oxide film pattern in a region on the surface corresponding to an element formation region; In the exposed region of the substrate after formation, a high concentration impurity region to be a buried layer is formed.
a second step of forming the second oxide film pattern; a third step of removing the second oxide film pattern; and epitaxial growth is performed on the entire surface of the substrate including the first oxide film pattern to form a polycrystalline region on the upper side of the first oxide film and a remaining polycrystalline region. a fourth step of forming a semiconductor body with the high concentration impurity region as a buried layer by providing an epitaxial layer each having a single crystal region on the substrate surface of the substrate;
and a fifth step of forming a thermal oxide film.