JPH03262155A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enable a fine pattern to be easily formed later in two wells respectively equally in accuracy by a method wherein the upside of the certain conductivity type well of a semiconductor device provided with twin wells is set level with that of an opposite conductivity type well adjacent to the former. CONSTITUTION:After an epitaxial growth layer 7 is formed, a second mask 9 is provided so as to cover the first region of the layer 7 keeping the second region exposed, the second region is selectively oxidized using the second mask 9 as a mask to form a second oxide film 11, and then the second oxide film 11 is removed to so as to relax the step induced to the upside of the epitaxial growth layer 7. If a first oxide film 3 and the second oxide film 11 are formed equal in thickness, the upside of a certain conductivity type well 12 can be aligned with that of an opposite conductivity type well 10a in height. A P channel MOSFET and an N channel MOSFET are formed in the first and the second region respectively. By this setup, a fine pattern can be formed in a device provided with twin wells, so that a device of this design can be highly integrated.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a method of manufacturing a semiconductor device, particularly a method of manufacturing a semiconductor device having twin wells, in which the heights of the upper surfaces of a well of one conductivity type and an adjacent well of an opposite conductivity type are made equal to each other. forming a first mask that exposes a first region forming a well of one conductivity type in a semiconductor substrate and covering a second region adjacent to the first region forming a well of an opposite conductivity type; and the first
introducing an impurity of one conductivity type into the first region using a mask, and then selectively thermally oxidizing the first region to form a first oxide film; After introducing an impurity of the opposite conductivity type into the second region using the oxide film as a mask, the first mask is removed, and then the first
forming a second mask that covers the first region of the epitaxial growth layer and exposes the second region; introducing an impurity of an opposite conductivity type into the second region using a mask as a mask, and then selectively thermally oxidizing the second region to form a second oxide film;
introducing an impurity of one conductivity type into the first region using a mask of the second oxide film, and then removing the second oxide film; It is constructed using a semiconductor device manufacturing method that aligns the heights of wells.

[Industrial application field]

The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a semiconductor device having twin wells.

FIG. 2 is a diagram for explaining the twin well. N-type wells (first region) and P-type wells (second region) formed in a semiconductor substrate are arranged alternately, and CMO
3, a device such as B i CMO3 is formed.

[Conventional technology]

FIGS. 3(a) to 3(g) are cross-sectional views showing a conventional process for forming twin wells, and the conventional example will be described below.

A P-type substrate 1 is thermally oxidized to form an oxide film 2, and a mask 3 is formed to expose a first region and cover a second region adjacent thereto (see FIG. 3(a)).

Using mask 3 as a mask, arsenic (As') is applied to the first region.
), the first region is selectively thermally oxidized to form an oxide film 4 (see FIGS. 3(b) and (c)).
.

Using the oxide film 4 as a mask, boron (B) is applied to the second region.
(See FIG. 3(d)).

After removing the oxide films 2 and 4, a diffusion process is performed.

An N'' type buried layer 5a and a P'' type buried layer 6 are formed (see FIG. 3(e)).

After removing the surface notamage layer, an epitaxial growth layer 7 is grown (see FIG. 3(f)).

After growing a thin oxide film, a resist mask with an opening in the first region is formed, phosphorus (P') ions are implanted, and the resist mask is removed. Next, a resist mask with an opening in the second region is formed, ions of boron (B1) are implanted, and the resist mask is removed. Then 1100'C
, 60 minutes of well diffusion treatment, and N-type well 12. P
A mold well 10a is formed (see FIG. 3(g)).

By the way, in this conventional method, the heights of the upper surfaces of the N-type well 12 and the P-type well 13 are different and a step difference occurs. This step causes a focus shift in subsequent fine pattern formation, and even if the opening width of the mask is the same, the width of the pattern formed in the N-type well 12 and the width of the pattern formed in the P-type well 10a are different. It was causing problems.

[Problem to be solved by the invention]

An object of the present invention is to provide a method that allows the heights of the upper surfaces of the N-type well 12 and the P-type well 13 to be made equal, and subsequent fine pattern formation can be easily performed with equal accuracy in both wells.

[Means for Solving the Problem] The above problem is to expose a first region of a semiconductor substrate 1 forming a well of one conductivity type, and expose a second region adjacent to the first region forming a well of an opposite conductivity type. A first mask 3 covering the region is formed, and an impurity of one conductivity type is introduced into the first region using the first mask 3 as a mask, and then the first region is selectively thermally oxidized. forming a first oxide film 4 using the first oxide film 4 as a mask; and removing the first mask 3 after introducing impurities of the opposite conductivity type into the second region using the first oxide film 4 as a mask; Subsequently, a step of growing an epitaxial growth layer 7 in the first region and the second region, and a second mask 9 covering the first region of the epitaxial growth layer 7 and exposing the second region are performed. After forming an impurity of the opposite conductivity type into the second region using the second mask 9 as a mask, selectively thermally oxidize the second region to form a second oxide film 11. and a step of introducing an impurity of one conductivity type into the first region using the second oxide film 11 as a mask, and then removing the second oxide film 11. one conductivity type well 12 formed in the region and the opposite conductivity type well 1 formed in the second region.
This problem can be solved by a method of manufacturing a semiconductor device in which the heights of the upper surfaces of 0a are made the same.

1 Effect] In the present invention, covering the region of node 1 after epitaxial growth,
By selectively thermally oxidizing the second region using a second mask 9 that exposes the second region to form a second oxide film 11, and then removing the oxide film 11 of the node 2, The difference in level created in the epitaxial growth layer 7 is alleviated.

If the thickness of the first oxide film 3 and the thickness of the second oxide film 11 are made equal, one conductivity type well 12 and the opposite conductivity type well 10
The heights of the top surfaces of a can be perfectly aligned.

〔Example〕

FIGS. 1(a) to 1(k) are cross-sectional views showing steps for explaining the present invention in detail, and the following description will be made with reference to these figures.

Refer to FIG. 1(a) As a semiconductor substrate 1, a P type (100) S with a resistance of 10 Ωcm is used.
Using an i-substrate, the surface was oxidized with hydrochloric acid at 950°C to a thickness of 2
00 people's oxide film 2 is formed.

A silicon nitride film with a thickness of 1500 nm is formed by low pressure CVD. A resist mask is provided on the N buried layer and the second region, which opens a first region in which an N-type well is to be formed and covers a second region in which a P-type well is to be formed adjacent to the first region. formation and reactive ion enquenching (R
A first mask 3 is formed by etching the silicon nitride film using IE). .

Referring to FIG. 1(b), arsenic (As') ions are implanted using the first mask 3 as a mask. The implantation conditions were 70 keV and a dose of 4 E.
It is 15 cm-2. This forms an N type implantation region in the first region.

FIG. 1(c) Remove the reference resist and use the first mask 3 as a mask" 4.9
The first region is selectively oxidized by wet oxidation at 00.degree. C. to form a first oxide film 4 with a thickness of 4000. An N-type region 5 is formed under the first oxide film 4.

Refer to FIG. 1(cl), the first mask 3 is removed by wet etching. 1st
Using the oxide film 4 as a mask, boron (B) ions are implanted into the second region. The implantation conditions are 40 keV and a dose IE of 13 cm-2. This forms a P-type implanted region in the second region.

After removing the first oxide film 4 by wet etching, see FIG. 1(e), 9
Hydrochloric acid oxidation is performed at 50°C to form an oxide film with a thickness of 200 nm on the surface. Next, a buried layer diffusion process is performed in nitrogen at 1150° C. for 190 minutes to form an N'' buried layer 5a and a P'' type buried layer 6. Thereafter, the oxide film on the surface of 9 is removed.

Referring to FIG. 1(f), epitaxial growth is performed on the N-type buried layer 5a and the P'-type buried layer 6 to form a non-doped epitaxial growth layer 7 with a thickness of 1.5 μm.

Referring to FIG. 1(g), oxidation is performed with hydrochloric acid at 950° C. to form an oxide film 8 with a thickness of 200 μm on the surface.

A silicon nitride film with a thickness of 1500 nm is formed by low pressure CVD. A resist mask is formed to open the second region, and the silicon nitride film is etched by RIE.
A mask 9 is formed.

Using the second mask 9 as a mask, ions of boron (B) are implanted. The implantation conditions are 180 keV dose 2E
It is 12 cm-2. This forms a P-type implanted region in the second region.

The resist shown in FIG. 1(h) is removed and the second mask 9 is used as a mask 90
Selectively oxidize the second region by wet oxidation at 0°C,
A second oxide film 11 having a thickness of 4000 wafers is formed. A P'' type region 10 is formed under the second oxide film 11.

Refer to FIG. 1(i), the second mask 9 is removed by wet etching. Second
Using the oxide film 11 as a mask, phosphorus (P) ions are implanted into the first region. The implantation conditions were 180 keV and a dose of 3E 12 cm-2. This forms an N type implantation region in the first region.

Refer to FIG. 1(j), the second oxide film 11 is removed by wet etching. 9
Hydrochloric acid oxidation is carried out at 50''C to form an oxide film with a thickness of 200 mm on the surface.Next, well diffusion treatment is carried out in nitrogen at 1100[deg.]C for 160 minutes to form an N-type well 12 and a P-type well 10a. Thereafter, the oxide film on the surface is removed.The upper surfaces of the N-type well I2 and the P-type well 10 are at the same height.

FIG. 1(k) shows an example in which CMO3 is formed in an N-type well 12 and a P-type well 10 whose upper surfaces have the same height by a normal method.
is the field oxide film, 14.18 is the gate oxide film,
15.19 is the gate electrode, 16.20 is the source, +
721 represents a drain.

A P-channel MO3FET is formed in the first region, and an N-channel MO3FET is formed in the second region.

The dimensional accuracy of both is equivalent.

Although a P-type substrate was used in this embodiment, the above-described process can be applied as is even if an N-type substrate is used.

Furthermore, it is clear that the present invention is not limited to CMO3 but can also be applied to B1 CMOS bipolar transistors and the like as long as the device is formed in a twin well.

1 [Effects of the Invention] As explained above, according to the present invention, a fine pattern can be formed with high precision in a device having twin wells, and this greatly contributes to the high integration of such semiconductor devices.

[Brief explanation of drawings]

FIGS. 1(a) to 1(k) are cross-sectional views showing steps for explaining an embodiment. Figure 2 is a whistle diagram (a) to explain twin wells.
7(g) are sectional views showing steps for explaining a conventional example. In the figure, ■ is a semiconductor substrate, the P-type substrate 2 is an oxide film 3 is a mask, and the first mask 4 is an oxide film. 5 is the N'' type region 5a is the N'' buried layer 2 6 is the P'' type buried layer 7 is the epitaxial growth layer 8 is the oxide film 9 is the second mask 10 is the P1 type region 10a is the P type well. 11 is the second The oxide film 12 is the N-type well 13, the field oxide film 14, and 18 the gate oxide film.15 and 19 are the gate electrodes 16, 20 is the source 17, and 21 is the drain. L/'I-+- ← \t to negative C one C\

Claims (1)

[Scope of Claims] A first region of a semiconductor substrate (1) that exposes a first region forming a well of one conductivity type and covers a second region adjacent to the first region that forms a well of an opposite conductivity type. forming a mask (3), and using the first mask (3) as a mask,
introducing an impurity of one conductivity type into the region, and then selectively thermally oxidizing the first region to form a first oxide film (4); After introducing an impurity of the opposite conductivity type into the second region using a mask, the first mask (
3) and subsequently growing an epitaxial growth layer (7) on the first region and the second region; forming a second mask (9) that exposes a region; and using the second mask (9) as a mask to expose the second
introducing impurities of opposite conductivity type into the region, and then selectively thermally oxidizing the second region to form a second oxide film (11); introducing an impurity of one conductivity type into the first region using a mask, and then removing the second oxide film (11); (12) A method for manufacturing a semiconductor device, characterized in that the heights of the upper surfaces of the opposite conductivity type wells (10a) formed in the second region are made the same.