JPH0339842U - - Google Patents

Info

Publication number
JPH0339842U
JPH0339842U JP9988889U JP9988889U JPH0339842U JP H0339842 U JPH0339842 U JP H0339842U JP 9988889 U JP9988889 U JP 9988889U JP 9988889 U JP9988889 U JP 9988889U JP H0339842 U JPH0339842 U JP H0339842U
Authority
JP
Japan
Prior art keywords
insulating substrate
wiring board
printed wiring
push
bonding pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9988889U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9988889U priority Critical patent/JPH0339842U/ja
Publication of JPH0339842U publication Critical patent/JPH0339842U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Die Bonding (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図イないしハは本考案における一実施例概
略構成図、第２図は第１図Ｂ−Ｂ′断面図、第３
図イおよびロは従来例説明図である。 １……印刷配線板、２……ダイランド、３……
ベアチツプ、４……ボンデイング・パツド、５…
…ワイヤー、６……プツシユ・バツク可能な絶縁
基板、７……開口、８……貫通孔、９……スリツ
ト、１０……封止樹脂。 Figures 1A to 3C are schematic configuration diagrams of an embodiment of the present invention, Figure 2 is a sectional view taken along line B-B' in Figure 1, and Figure 3 is a cross-sectional view taken along line B-B' in Figure 1.
Figures A and B are explanatory diagrams of a conventional example. 1...Printed wiring board, 2...Dieland, 3...
Bear tip, 4... Bonding pad, 5...
... wire, 6 ... push-back insulating substrate, 7 ... opening, 8 ... through hole, 9 ... slit, 10 ... sealing resin.

Claims (1)

【実用新案登録請求の範囲】 絶縁基板上に回路、ダイランド２、およびボン
デイング・パツド４が形成されている印刷配線板
１において、 当該印刷配線板１の一部を打ち抜いてプツシユ
・バツク可能な状態に嵌め込まれている絶縁基板
６と、 当該プツシユ・バツク可能な絶縁基板６と前記
印刷配線板１とで形成されるスリツト９に開けら
れた貫通孔８と、 前記プツシユ・バツク可能な絶縁基板６上に設
けられたダイランド２と、 当該ダイランド２上に載置されている半導体ベ
アチツプ３と、 当該半導体ベアチツプ３と上記印刷配線板１の
ボンデイング・パツト４とを接続するワイヤー５
と、 半導体ベアチツプ３、ボンデイング・パツド４
およびワイヤー５を覆う部分と前記貫通孔８の内
部とを一体にモールドする樹脂１０と、 を備えたことを特徴とする印刷配線板。[Claim for Utility Model Registration] A printed wiring board 1 in which a circuit, a die land 2, and a bonding pad 4 are formed on an insulating substrate, in a state where a part of the printed wiring board 1 can be punched out and pushed back. an insulating substrate 6 fitted into the push-back insulating substrate 6; a through-hole 8 formed in a slit 9 formed by the push-back insulating substrate 6 and the printed wiring board 1; and the push-back insulating substrate 6. A die land 2 provided above, a semiconductor bare chip 3 placed on the die land 2, and a wire 5 connecting the semiconductor bare chip 3 and the bonding pad 4 of the printed wiring board 1.
, semiconductor bare chip 3, bonding pad 4
and a resin 10 that integrally molds a portion covering the wire 5 and the inside of the through hole 8.
JP9988889U 1989-08-29 1989-08-29 Pending JPH0339842U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9988889U JPH0339842U (en) 1989-08-29 1989-08-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9988889U JPH0339842U (en) 1989-08-29 1989-08-29

Publications (1)

Publication Number Publication Date
JPH0339842U true JPH0339842U (en) 1991-04-17

Family

ID=31648920

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9988889U Pending JPH0339842U (en) 1989-08-29 1989-08-29

Country Status (1)

Country Link
JP (1) JPH0339842U (en)

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