JPH033755U - - Google Patents

Info

Publication number
JPH033755U
JPH033755U JP1989064353U JP6435389U JPH033755U JP H033755 U JPH033755 U JP H033755U JP 1989064353 U JP1989064353 U JP 1989064353U JP 6435389 U JP6435389 U JP 6435389U JP H033755 U JPH033755 U JP H033755U
Authority
JP
Japan
Prior art keywords
power supply
electrode pad
metal wire
thin metal
load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1989064353U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989064353U priority Critical patent/JPH033755U/ja
Publication of JPH033755U publication Critical patent/JPH033755U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H10W72/5473—Dispositions of multiple bond wires multiple bond wires connected to a common bond pad
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/926—Multiple bond pads having different sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/936—Multiple bond pads having different shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】
第１図は本考案に係る電源用ＩＣの一実施例を
示す部分断面を含む正面図、第２図は本考案の変
形例を示す電源用ＩＣの部分断面を含む正面図、
第３図は第１図及び第２図の電源用ＩＣを使用し
た場合の回路構成図、第４図は電源用ＩＣ及びメ
モリＩＣを実装したプリント基板を示す平面図で
ある。第５図は従来の電源用ＩＣを使用した場合
の回路構成図、第６図は第５図の電源用ＩＣ及び
メモリＩＣを実装したプリント基板を示す平面図
である。 ２１……電源用半導体集積回路装置（電源用Ｉ
Ｃ）、２３……半導体素子、２４……入力用電極
パツド、２５……出力用電極パツド、２６……入
力用外部リード、２８……出力用外部リード、２
９，３０……金属細線。

Claims (1)

  1. 【実用新案登録請求の範囲】 直流電源に接続される入力用電極パツドと、負
    荷に接続されて安定化した電源電圧を負荷に供給
    する出力用電極パツドとを有する安定化電源用半
    導体素子の上記各電極パツドを外部リードに金属
    細線で接続したものにおいて、 上記出力用電極パツドと対応する外部リードを
    それぞれ複数設け、各電極パツドと外部リードと
    を金属細線で接続したことを特徴とする電源用半
    導体集積回路装置。
JP1989064353U 1989-05-31 1989-05-31 Pending JPH033755U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989064353U JPH033755U (ja) 1989-05-31 1989-05-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989064353U JPH033755U (ja) 1989-05-31 1989-05-31

Publications (1)

Publication Number Publication Date
JPH033755U true JPH033755U (ja) 1991-01-16

Family

ID=31595223

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989064353U Pending JPH033755U (ja) 1989-05-31 1989-05-31

Country Status (1)

Country Link
JP (1) JPH033755U (ja)

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