JPS61199056U - - Google Patents
Info
- Publication number
- JPS61199056U JPS61199056U JP8374285U JP8374285U JPS61199056U JP S61199056 U JPS61199056 U JP S61199056U JP 8374285 U JP8374285 U JP 8374285U JP 8374285 U JP8374285 U JP 8374285U JP S61199056 U JPS61199056 U JP S61199056U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- package body
- terminal
- package
- registration request
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
第１図は本考案の一実施例を示す外観図である
。 １……パツケージ本体、２，３，４，５……ピ
ン端子、Ｌ１，Ｌ２……端子間隔。
。 １……パツケージ本体、２，３，４，５……ピ
ン端子、Ｌ１，Ｌ２……端子間隔。
Claims (1)
- 電子回路等に使用される集積回路チツプを封入
したパツケージ本体と、前記パツケージ本体の両
側面に取り付けられ少なくとも１つの端子間隔が
他の端子間隔と異なる複数のピン端子とを含むこ
とを特徴とする集積回路パツケージ。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8374285U JPS61199056U (ja) | 1985-06-03 | 1985-06-03 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8374285U JPS61199056U (ja) | 1985-06-03 | 1985-06-03 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61199056U true JPS61199056U (ja) | 1986-12-12 |
Family
ID=30632647
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8374285U Pending JPS61199056U (ja) | 1985-06-03 | 1985-06-03 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61199056U (ja) |
-
1985
- 1985-06-03 JP JP8374285U patent/JPS61199056U/ja active Pending