JPH033753U - - Google Patents
Info
- Publication number
- JPH033753U JPH033753U JP6438489U JP6438489U JPH033753U JP H033753 U JPH033753 U JP H033753U JP 6438489 U JP6438489 U JP 6438489U JP 6438489 U JP6438489 U JP 6438489U JP H033753 U JPH033753 U JP H033753U
- Authority
- JP
- Japan
- Prior art keywords
- external lead
- glass
- sealed
- lead terminal
- insulating base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 5
- 239000011521 glass Substances 0.000 claims description 3
- 238000007789 sealing Methods 0.000 description 1
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
第１図は本考案のガラス封止型半導体素子収納
用パツケージの一実施例を示す分解斜視図、第２
図ａは第１図に示したパツケージにおける封止後
の状態を示す断面図、第２図ｂはその要部拡大断
面図、第３図は従来のガラス封止型半導体素子収
納用パツケージの一例を示す分解斜視図、第４図
は第３図に示したパツケージの封止後の状態を示
す断面図である。
１……絶縁基体、２……蓋体、３……絶縁容器
、４……外部リード端子、５……貫通孔、６０ａ
，６０ｂ……ガラス層。
FIG. 1 is an exploded perspective view showing an embodiment of the glass-sealed semiconductor device storage package of the present invention;
Figure a is a cross-sectional view showing the package shown in Figure 1 after sealing, Figure 2 b is an enlarged cross-sectional view of the main part, and Figure 3 is an example of a conventional glass-sealed package for housing semiconductor elements. FIG. 4 is a sectional view showing the package shown in FIG. 3 in a sealed state. 1...Insulating base, 2...Lid, 3...Insulating container, 4...External lead terminal, 5...Through hole, 60a
, 60b...Glass layer.
Claims (1)
基体と蓋体とで外部リード端子を挟持し、前記ガ
ラス層を溶融一体化することにより半導体素子を
内部に気密封止するガラス封止型半導体素子収納
用パツケージにおいて、前記外部リード端子の絶
縁基体外周辺が位置する部位に、該外部リード端
子の全幅をＡとしたとき、 ０．４Ａ≦Ｂ≦０．８Ａ 但し、Ｂは前記外部リード端子の幅方向におけ
る最大内径寸法 を満足する貫通孔を形成したことを特徴とする
ガラス封止型半導体素子収納用パツケージ。[Claims for Utility Model Registration] External lead terminals are sandwiched between an insulating base and a lid, the main surfaces of which are in contact with each other and a glass layer is adhered thereto, and the glass layers are melted and integrated to form a semiconductor element inside. In a glass-sealed semiconductor device storage package to be sealed, the outer periphery of the insulating base of the external lead terminal is located at a portion where the total width of the external lead terminal is A, 0.4A≦B≦0.8A. However, B is a glass-sealed package for housing a semiconductor element, characterized in that a through hole is formed that satisfies the maximum inner diameter dimension in the width direction of the external lead terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6438489U JPH033753U (en) | 1989-05-31 | 1989-05-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6438489U JPH033753U (en) | 1989-05-31 | 1989-05-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH033753U true JPH033753U (en) | 1991-01-16 |
Family
ID=31595283
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6438489U Pending JPH033753U (en) | 1989-05-31 | 1989-05-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH033753U (en) |
-
1989
- 1989-05-31 JP JP6438489U patent/JPH033753U/ja active Pending
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