JPH0334151B2 - - Google Patents
Info
- Publication number
- JPH0334151B2 JPH0334151B2 JP60034164A JP3416485A JPH0334151B2 JP H0334151 B2 JPH0334151 B2 JP H0334151B2 JP 60034164 A JP60034164 A JP 60034164A JP 3416485 A JP3416485 A JP 3416485A JP H0334151 B2 JPH0334151 B2 JP H0334151B2
- Authority
- JP
- Japan
- Prior art keywords
- word line
- mos transistor
- drain
- clamp circuit
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 claims description 9
- 230000006870 function Effects 0.000 description 11
- 230000015654 memory Effects 0.000 description 9
- 230000008878 coupling Effects 0.000 description 7
- 238000010168 coupling process Methods 0.000 description 7
- 238000005859 coupling reaction Methods 0.000 description 7
- 238000007667 floating Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Landscapes
- Dram (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60034164A JPS61194695A (ja) | 1985-02-22 | 1985-02-22 | ワ−ド線クランプ回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60034164A JPS61194695A (ja) | 1985-02-22 | 1985-02-22 | ワ−ド線クランプ回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61194695A JPS61194695A (ja) | 1986-08-29 |
| JPH0334151B2 true JPH0334151B2 (cs) | 1991-05-21 |
Family
ID=12406567
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60034164A Granted JPS61194695A (ja) | 1985-02-22 | 1985-02-22 | ワ−ド線クランプ回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61194695A (cs) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4764902A (en) * | 1985-07-01 | 1988-08-16 | Nec Corporation | Memory circuit with improved word line noise preventing circuits |
| JP2737293B2 (ja) * | 1989-08-30 | 1998-04-08 | 日本電気株式会社 | Mos型半導体記憶装置 |
| JP3226579B2 (ja) * | 1991-12-24 | 2001-11-05 | 沖電気工業株式会社 | 半導体記憶装置 |
| JP2842181B2 (ja) * | 1993-11-04 | 1998-12-24 | 日本電気株式会社 | 半導体メモリ装置 |
| DE19952258A1 (de) * | 1999-10-29 | 2001-05-10 | Infineon Technologies Ag | Integrierter Speicher |
| US6542427B2 (en) * | 2001-03-08 | 2003-04-01 | Micron Technology, Inc. | Power validation for memory devices on power up |
-
1985
- 1985-02-22 JP JP60034164A patent/JPS61194695A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61194695A (ja) | 1986-08-29 |
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