JPH033365A - Semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a semiconductor device in which electrodes are formed of polycrystalline films.

(b) Conventional Technology For example, in MOS transistors used in semiconductor memories, polycrystalline silicon is often used as electrodes. A typical structure of such a MOS transistor is shown in FIG. 3, and will be explained along with its manufacturing process.First, a thermal oxide film and a polycrystalline silicon film are sequentially deposited on the entire surface of a silicon substrate (1). , a superimposed body of gate oxide film (2) and gate electrode g (3) is left by patterning, and then when impurity diffusion is performed by ion implantation, impurities are added to the gate electrode (3) and the gate electrode (3) is doped. electrode(
3) serves as a mask to mask the drain (4) and source (5).
) is formed in a self-consistent manner.

The problem with the above structure is that when ions are implanted into the gate electrode, the implanted ions invade the substrate (1) under the gate electrode (3) due to a channeling effect, and there is a risk of deteriorating the transistor characteristics.

Therefore, as described in Japanese Patent Application Laid-Open No. 63-48865,
A structure has been proposed in which the implanted ions are prevented from entering the substrate by reducing the crystal grain size of polycrystalline silicon constituting the gate electrode. While such a structure is effective in blocking implanted ions, it tends to increase the resistivity of the gate electrode, since the resistivity of polycrystalline silicon is
This is because as the crystal grain size becomes smaller, it becomes larger.

(c) Problems to be Solved by the Invention Accordingly, the present invention aims to prevent the implanted ions from penetrating into the substrate when implanting ions into an electrode made of a polycrystalline film, and to prevent an increase in the resistivity of the electrode. The aim is to provide a structure that can be suppressed.

(d) Means for Solving the Problems The semiconductor device of the present invention is a device in which an electrode is formed of a polycrystalline film, in which the crystal grain size of the polycrystalline film is small on the back side of the electrode and large on the front side. It is characterized by

(E) Function In the present invention, the part with a smaller crystal grain size on the back side of the electrode prevents implanted ions from entering the substrate, and --i, the crystal grain size on the front side of the electrode The larger the area, the smaller the resistivity of the electrode.

(f) Examples An embodiment of the present invention will be described below with reference to FIG.

An oxide film (1) is formed on the silicon substrate (10) by a thermal oxidation method.
1) Form 300 people. Subsequently, 3000 polycrystalline dinophane films (12) were deposited on this film by thermal decomposition of 5 in 4 by low pressure CVD method (Fig. 1A), and the deposition temperature was 62°C.
Gradually lowered from 0"C to 560℃, pressure 0.5T
orr, 5iHa flow rate is 120cc/+nin. When the deposition temperature is about 575° C., the deposited silicon is in an amorphous state at low temperatures, and becomes polycrystalline at high temperatures. In FIG. 1A, the number (12a) indicates the amorphous portion, and the number (12b) indicates the polycrystalline portion.

Next, annealing is performed at 600° C. for 10 hours. As a result of this annealing, the amorphous portion (12a) in FIG. 1A becomes polycrystalline, and becomes a polycrystalline portion (12c) as shown in FIG. Regardless of whether it is in a crystalline or polycrystalline state, it depends on the deposition temperature during the CVD deposition, and such dependent characteristics are shown in FIG. As can be seen from the figure, the lower the deposition temperature, the larger the crystal grain size.

Therefore, in this case, the crystal grain size constituting the polycrystalline silicon film (12) gradually increases from the back side (that is, the substrate side) to the front side of the polycrystalline silicon film (12).

After that, a superimposed body of the gate oxide film (13) and the gate electrode layer 14) is left by buttering.For this buttering, SF is required for the polycrystalline silicon film (12).
, and for the oxide film (11), C
An RIE (reactive ion etching) method using a gas mainly composed of HFs is employed.

Finally, when impurity diffusion is performed by ion implantation, the impurity is completely added to the gate electrode (14), and the drain (IS) and source layer 16) are formed in a self-aligned manner using the gate electrode (14) as a mask. be done.

Phosphorus or the like is suitable as the implanted ion.

In the structure of the device obtained in this manner, the resistivity of the gate electrode does not increase because a portion with a large crystal grain size exists on the surface side of the gate electrode (14) made of polycrystal. Since a portion with a small crystal grain size exists on the back side of the gate electrode (14), the implanted ions are prevented from penetrating into the substrate (10) during ion implantation into the gate electrode (14).

In the above embodiment, the crystal grain size constituting the polycrystalline gate electrode (14) gradually increases from the back side to the front side of the gate electrode (14), but it is changed stepwise. In that case, polycrystalline silicon film (12)
Deposition is performed with the deposition temperature initially fixed at a high value, and when an appropriate film thickness is reached, the reaction gas supply is stopped and the deposition temperature is lowered, and when this temperature reaches a predetermined value, the deposition The temperature will be maintained and the reaction gas supply will be restarted.

In addition to polycrystalline silicon, other polycrystalline materials may also be used as the electrode material.

(G) Effects of the Invention According to the structure of the present invention, it is possible to prevent implanted ions from penetrating into the substrate under the electrode when ions are implanted into the electrode, without increasing the resistivity of the electrode made of a polycrystalline film. Therefore, the characteristics of the semiconductor device can be improved.

[Brief explanation of the drawing]

Figures 1A, B, and C are cross-sectional views of each process for manufacturing the device according to the present invention, Figure 2 is a curve diagram showing the relationship between deposition temperature and crystal grain size, and Figure 3 is a diagram showing the relationship between deposition temperature and crystal grain size. FIG. Figure 2 Figure 2 Wharf 1 Kameonkame (°C)

Claims (1)

[Claims] (1) A semiconductor device in which an electrode is formed of a polycrystalline film, wherein the crystal grain size of the polycrystalline film is smaller on the back side of the electrode and larger on the front side of the electrode.