JPH03289118A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH03289118A JPH03289118A JP2090446A JP9044690A JPH03289118A JP H03289118 A JPH03289118 A JP H03289118A JP 2090446 A JP2090446 A JP 2090446A JP 9044690 A JP9044690 A JP 9044690A JP H03289118 A JPH03289118 A JP H03289118A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- photomask
- same
- thermal expansion
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 26
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 239000000758 substrate Substances 0.000 claims abstract description 44
- 239000000463 material Substances 0.000 claims description 19
- 238000000034 method Methods 0.000 claims description 14
- 238000001259 photo etching Methods 0.000 claims description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 6
- 239000005350 fused silica glass Substances 0.000 abstract description 6
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 5
- 238000012216 screening Methods 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 238000000206 photolithography Methods 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 239000011521 glass Substances 0.000 description 4
- 239000010408 film Substances 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 239000012780 transparent material Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 239000000839 emulsion Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 235000013305 food Nutrition 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Landscapes
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
【発明の詳細な説明】
[産業上の利用分野]
本発明は、半導体装置の製造方法に係り、特にフォトエ
ツチングを用いた半導体装置の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a semiconductor device using photoetching.
[従来の技術]
従来より、シリコンウェハ上に半導体デバイスを形成す
る場合には、10枚前後のフォトマスクを用いて、順次
パターンニング(フォトリソグラフィ工程)と拡散とを
繰り返して、所望の不純物拡散構造の半導体装置を形成
していた。[Prior Art] Traditionally, when semiconductor devices are formed on silicon wafers, about 10 photomasks are used to sequentially repeat patterning (photolithography process) and diffusion to achieve desired impurity diffusion. A semiconductor device with a structure was formed.
その場合、各フォトマスクのパターンは、前の工程のフ
ォトマスクで形成されたシリコンウェハ上のパターンに
精確に重ね合わせる必要がある。In that case, the pattern of each photomask needs to be accurately superimposed on the pattern on the silicon wafer formed by the photomask in the previous process.
[発明が解決しようとする課題]
しかしながら、シリコンウェハの熱膨張係数は、約2.
6X10−’/度(degree)であるに対し、一方
フオドマスクの透明支持基体として通常用いられるガラ
スは、約9.5X 10−”/度(degree)であ
る。[Problems to be Solved by the Invention] However, the coefficient of thermal expansion of a silicon wafer is approximately 2.
6X 10-'/degree, while glass commonly used as a transparent support substrate for a food mask is about 9.5X 10-''/degree.
従って、前後する二つのフォトマスクを用いた露光焼付
は時に、温度差が2℃あっただけで、4インチウェハ(
直経約100m11+)の両端で1.4μmのパターン
ズレが生じてしまう。このことは、デバイス特性のバラ
ツキや歩留まりにも大いに影響する。Therefore, when exposing and printing using two photomasks in front of each other, sometimes a 4-inch wafer (
A pattern shift of 1.4 μm occurs at both ends of the diameter of approximately 100 m (11+). This greatly affects variations in device characteristics and yield.
その為、露光装置は温度管理が重要なポイントとなり、
その結果、装置の高価格化、メンテナンス負荷の問題が
生じている。Therefore, temperature control is an important point for exposure equipment.
As a result, problems have arisen, such as the increased cost of the equipment and the burden of maintenance.
更に、この問題はウェハの大口径化及びデバイスの微細
化に障害となる。Furthermore, this problem becomes an obstacle to increasing the diameter of wafers and miniaturizing devices.
[課題を解決するための手段1
本発明の半導体装置の製造方法は、基体上の半導体層に
感光性材料を塗布し、透明支持基体上の遮光材料によっ
て所定のパターンが形成されたフォトマスクを通して前
記感光性材料に光照射を行い、所定の感光性材料のパタ
ーンを形成し、フォトエツチングを行う半導体装置の製
造方法であって、
前記基体と前記透明支持基体とを同一もしくは実質的に
同一の熱膨張係数の材料としたことを特徴とする。[Means for Solving the Problems 1] The method for manufacturing a semiconductor device of the present invention involves applying a photosensitive material to a semiconductor layer on a substrate, and applying the photosensitive material through a photomask in which a predetermined pattern is formed using a light-shielding material on a transparent support substrate. A method for manufacturing a semiconductor device in which the photosensitive material is irradiated with light to form a predetermined photosensitive material pattern and photoetched, the substrate and the transparent supporting substrate being the same or substantially the same. It is characterized by being made of a material with a high coefficient of thermal expansion.
[作用]
本発明は、半導体層を形成する基体と、フォトマスクを
構成する透明支持基体とを同一もしくは実質的に同一の
熱膨張係数の材料とすることで、熱膨張係数の違いによ
る、感光性材料を塗布した基体と透明支持基体との位置
ズレを防ぎ、パターンズレを防ぐものである。[Function] In the present invention, the substrate forming the semiconductor layer and the transparent support substrate forming the photomask are made of materials with the same or substantially the same coefficient of thermal expansion. This prevents misalignment between the substrate coated with the transparent material and the transparent support substrate, thereby preventing pattern misalignment.
[実施例] 以下、本発明の実施例を図面を用いて詳細に説明する。[Example] Embodiments of the present invention will be described in detail below with reference to the drawings.
本実施例は、本発明をS OI (Silicon 0
nInsulator )技術による半導体装置の製造
工程に用いたものである。This example describes the present invention as an SOI (Silicon 0
This is used in the manufacturing process of semiconductor devices using nInsulator) technology.
第1図は本発明の半導体装置の製造方法の一実施例を示
す説明図である。FIG. 1 is an explanatory diagram showing an embodiment of the method for manufacturing a semiconductor device of the present invention.
同図において、1は半導体層を形成する基体となるSO
I基板(Silicon On Insulating
Substrate )で、厚さ525 gmの溶融石
英2の上にSi半導体層3が0.1μmの厚さで形成さ
れている。図示していないが、Si半導体層3上には熱
酸化膜が0.05μmの厚さで形成され、その上にゲー
ト電極用のW S i xが0.2μm厚さで形成され
ている。4はフォトレジストである。In the same figure, 1 is SO which becomes the substrate forming the semiconductor layer.
I-substrate (Silicon On Insulating)
A Si semiconductor layer 3 with a thickness of 0.1 μm is formed on a fused silica 2 with a thickness of 525 gm. Although not shown, a thermal oxide film is formed on the Si semiconductor layer 3 to a thickness of 0.05 μm, and a gate electrode W Si x is formed thereon to a thickness of 0.2 μm. 4 is a photoresist.
なお、ここで説明する工程は、Si半導体層を素子分離
するために、島状にエツチング分離したフォトリソグラ
フィ工程の後工程であり、ゲート電極のフォトリングラ
フィのための電極パターンを、表面に塗布されたフォト
レジスト4に焼き付けるフォトリングラフィ工程である
。The process described here is a post-process of the photolithography process in which the Si semiconductor layer is etched into islands in order to separate the elements, and an electrode pattern for photolithography of the gate electrode is applied to the surface. This is a photolithography process in which the photoresist 4 is printed.
フォトマスク5には、SOI基板1と同じ溶融石英が透
明支持基体となる透明支持基板6として用いられている
。透明支持基板6の厚さは約2mmであり、この透明支
持基板6の上にはゲート電極パターンに対応してパター
ン化された。厚さ約0.1μmの遮光用のCr膜7が設
けられている。このフォトマスク5を前工程のアライメ
ントマークを利用して位置決めした後、レジスト感光用
光9で照明し、フォトレジスト4にパターンの潜像を形
成する。In the photomask 5, the same fused quartz as the SOI substrate 1 is used as a transparent support substrate 6 serving as a transparent support base. The thickness of the transparent support substrate 6 was about 2 mm, and a pattern was formed on the transparent support substrate 6 to correspond to the gate electrode pattern. A light-shielding Cr film 7 having a thickness of approximately 0.1 μm is provided. After this photomask 5 is positioned using the alignment marks from the previous process, it is illuminated with resist exposure light 9 to form a latent image of a pattern on the photoresist 4.
本実施例に用いる露光装置は、フォトマスクとウェハ基
板(本実施例ではSOI基板)とを密着又は近接して露
光する等倍型露光装置である。The exposure apparatus used in this example is a 1-magnification type exposure apparatus that exposes a photomask and a wafer substrate (SOI substrate in this example) in close contact with each other or in close proximity.
なお、8は光源からの発射光を平行光に変換するレンズ
である。Note that 8 is a lens that converts the emitted light from the light source into parallel light.
本実施例においては、SOI基板もフォトマスクも、主
な基板材料は同一の溶融石英で構成されており、各々熱
膨張係数は0.55x 10−6/度(degree)
であり、各フォトリングラフィ工程間で温度がばらつい
ても、両者ともに同じ寸法で伸縮するため、相対的なト
ータルピッチエラ〜は生じない。In this example, the main substrate material of both the SOI substrate and the photomask is the same fused silica, and each has a thermal expansion coefficient of 0.55 x 10-6/degree.
Even if the temperature varies between photolithography steps, both expand and contract with the same dimensions, so no relative total pitch error occurs.
即ち、SOI基板の離れた二点間でフォトマスクを正し
い位置に合わせれば、SOI基板全面でフォトマスクの
パターンとSOI基板のパターンとを正確に重ね合わせ
ることが可能となり、微細なデバイス形成を正確に行う
ことができる。In other words, by aligning the photomask at the correct position between two separate points on the SOI substrate, it becomes possible to accurately overlap the photomask pattern and the SOI substrate pattern over the entire surface of the SOI substrate, allowing for accurate formation of minute devices. can be done.
更に、本発明を密着型イメージセンサ−の薄膜トランジ
スタ(TPT)等の大面積低コストのデバイスを形成す
る場合に適用し、透明な絶縁基板として、コーニング社
製7059のガラスを用いるとともに、フォトマスク材
料としてもコーニング社製7059のガラスを支持基板
としてエマルジョンマスクを形成し、パターンズレグに
用いたところ、300mmという大面積にもかかわらず
、良好なパターンの重ね合わせができた。ここでは、露
光装置としてミラープロジェクションタイプの等倍露光
装置を用いた。Furthermore, the present invention is applied to the formation of large-area, low-cost devices such as thin film transistors (TPT) for contact-type image sensors, and Corning's 7059 glass is used as the transparent insulating substrate, and a photomask material is used. However, when an emulsion mask was formed using Corning Co., Ltd. 7059 glass as a support substrate and used for pattern registration, good pattern overlay was achieved despite the large area of 300 mm. Here, a mirror projection type 1x exposure device was used as the exposure device.
なお、本発明において、熱膨張係数の違いから生ずるパ
ターンズレを防ぐという目的からは、感光性材料を塗布
する基体の熱膨張係数とフォトマスクとなる透明支持基
体の熱膨張係数とが一致することが望ましいが、周基体
の熱膨張係数は実質的に同一の熱膨張係数の材料であれ
ばよい。すなわち、感光性材料を塗布する基体と透明支
持基体との間にズレが生じても、作成する半導体装置の
特性に実用上に影響を与えなければ、熱膨張係数が同一
でない材料をもちいてもよい。好ましくは、一方の基体
の熱膨張係数が他方の基体の熱膨張係数の±lO%の範
囲内にあるものがよい。In addition, in the present invention, for the purpose of preventing pattern misalignment caused by differences in thermal expansion coefficients, the thermal expansion coefficient of the substrate to which the photosensitive material is coated and the thermal expansion coefficient of the transparent support substrate serving as the photomask must match. However, the surrounding substrate may be made of a material having substantially the same coefficient of thermal expansion. In other words, even if misalignment occurs between the substrate on which the photosensitive material is coated and the transparent support substrate, it is possible to use materials with different coefficients of thermal expansion as long as it does not affect the characteristics of the semiconductor device to be manufactured. good. Preferably, the coefficient of thermal expansion of one substrate is within the range of ±10% of the coefficient of thermal expansion of the other substrate.
また上記実施例においては、感光性材料を塗布する基体
及びフォトマスクとなる透明支持基体の両方について透
明な材質(溶融石英、ガラス)を用いたが、感光性材料
を塗布する基体については、必要に応じ不透明材料を用
いてもよい。Furthermore, in the above examples, transparent materials (fused silica, glass) were used for both the substrate on which the photosensitive material is applied and the transparent support substrate that becomes the photomask. Opaque materials may be used as appropriate.
[発明の効果]
以上詳細に説明したように、本発明の半導体装置の製造
方法によれば、露光装置の温度管理をしなくても、精確
なパターン重ね合わせが可能となり、大面積の半導体装
置、或は極微細の半導体デバイスを高歩留まりで形成す
ることが可能となる。[Effects of the Invention] As explained in detail above, according to the method for manufacturing a semiconductor device of the present invention, accurate pattern overlay is possible without temperature control of the exposure equipment, and large-area semiconductor devices can be manufactured. Alternatively, it becomes possible to form ultra-fine semiconductor devices with high yield.
第1図は本発明の半導体装置の製造方法の一実施例を示
す説明図である。
1:sOI基板、2:溶融石英、3:Si半導体層、4
:フォトレジスト、5:フォトマスク、6:透明支持基
板、7:Cr膜、8ニレンズ、9ニレジスト感光用光。FIG. 1 is an explanatory diagram showing an embodiment of the method for manufacturing a semiconductor device of the present invention. 1: sOI substrate, 2: Fused silica, 3: Si semiconductor layer, 4
: Photoresist, 5: Photomask, 6: Transparent support substrate, 7: Cr film, 8 Ni lens, 9 Ni resist exposure light.
Claims (2)
持基体上の遮光材料によって所定のパターンが形成され
たフォトマスクを通して前記感光性材料に光照射を行い
、所定の感光性材料のパターンを形成し、フォトエッチ
ングを行う半導体装置の製造方法であって、 前記基体と前記透明支持基体とを同一もしくは実質的に
同一の熱膨張係数の材料とした半導体装置の製造方法。(1) A photosensitive material is applied to a semiconductor layer on a substrate, and the photosensitive material is irradiated with light through a photomask in which a predetermined pattern is formed using a light-shielding material on a transparent support substrate. 1. A method of manufacturing a semiconductor device in which a pattern is formed and photoetching is performed, the method comprising forming the base and the transparent supporting base using materials having the same or substantially the same coefficient of thermal expansion.
熱膨張係数が他方の基体の熱膨張係数の±10%の範囲
である半導体装置の製造方法。(2) The method for manufacturing a semiconductor device according to claim 1, wherein, regarding the base body and the transparent support base, the coefficient of thermal expansion of one base body is within a range of ±10% of the coefficient of thermal expansion of the other base body. Production method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2090446A JP2854921B2 (en) | 1990-04-06 | 1990-04-06 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2090446A JP2854921B2 (en) | 1990-04-06 | 1990-04-06 | Method for manufacturing semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH03289118A true JPH03289118A (en) | 1991-12-19 |
JP2854921B2 JP2854921B2 (en) | 1999-02-10 |
Family
ID=13998847
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2090446A Expired - Fee Related JP2854921B2 (en) | 1990-04-06 | 1990-04-06 | Method for manufacturing semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2854921B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008129982A1 (en) * | 2007-04-19 | 2008-10-30 | Nikon Corporation | Substrate processing method and system, and device manufacturing method |
-
1990
- 1990-04-06 JP JP2090446A patent/JP2854921B2/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008129982A1 (en) * | 2007-04-19 | 2008-10-30 | Nikon Corporation | Substrate processing method and system, and device manufacturing method |
Also Published As
Publication number | Publication date |
---|---|
JP2854921B2 (en) | 1999-02-10 |
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