JPH03286563A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE:To enable the number of insulation film layers which are formed on a field-effect transistor(FET) to be reduced and obtain a high-performance and large-output semiconductor device, especially a monolithic microwave integrated circuit(MIC) by using the insulation film which does not include an intermediate dielectric film for forming a metal-insulator-metal(MIM) capacitor. CONSTITUTION:Etching treatment is performed with a photoresist 8 as a mask, a second insulation film at a part opposing an upper-layer electrode 6 on an MIM capacitor is eliminated, and an upper-layer electrode 6 on the MIM capacitor is exposed, thus constituting a semiconductor device including an FET 2 and an MIM capacitor 9 which are formed on a substrate. As a total thickness of insulation films (3 and 7) on the FET 2 becomes thinner, the capacitance of the FET 2 especially between a gate and a source becomes smaller and its output becomes larger, thus obtaining a semiconductor device with improved performance. Considering reliability, output size, etc., the thickness of the whole insulation films on the FET 2 is set to 200Angstrom -3000Angstrom (preferably approximately 1000Angstrom ).

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a semiconductor device, particularly a monolithic microwave integrated circuit (Mo
The present invention relates to a nolithic Microwave IC (hereinafter referred to as MMIC) and a method for manufacturing the same.

[Conventional technology]

Figure 3(g) shows the structure of the main part of a conventional MMIC,
FIGS. 3(a) to 3(f) are diagrams for explaining the manufacturing method.

As shown in FIG. 3(a), l is a substrate made of a compound semiconductor such as GaAs, and a gate electrode 2g, a source electrode 2S, and a train electrode 2d are first formed on the substrate l, and a field effect transistor ( 2 (hereinafter referred to as FET) is formed. FET2 is formed first because it is extremely difficult to form the above-mentioned fine pattern when forming the ultra-fine pattern of each element of the FET, which determines the main performance of the entire MMIC, if there are other elements. This is because it becomes FET2
After forming, a first insulating film 3 is formed to cover the entire surface of the substrate 1 and the FET 2 to protect the FET 2.

Next, as shown in FIG. 3(b), for example, M I M (Metal-InSulator-
Form the lower electrode 4 of the (Metal) capacitor.

Next, as shown in FIG. 3(c), the lower electrode 4, the first
An intermediate dielectric film 5 is formed to cover the insulating film 3 .

Next, as shown in FIG. 3(d), an upper layer electrode 6 facing the lower layer electrode 4 is formed on the intermediate dielectric film 5, and the MIM
A capacitor 9 is formed.

Next, as shown in FIG. 3(e), a second insulating layer M is formed to cover the upper layer electrode 6 and the intermediate dielectric film 5 and act as a protective film.
form 7.

Next, as shown in FIG. 3(f), the second insulation! A photoresist 8 is formed on the entire surface of I2, and patterned so that an opening 10 is formed in the MIM capacitor 9 portion.

Next, as shown in FIG. 3(g), etching is performed using the photoresist 8 as a mask to remove the second insulating film in the portion facing the upper electrode 6 of the MIM capacitor 9. The upper layer electrode 6 is exposed. As a result, the FET2 and M formed on the substrate are
An MMIC including an IM capacitor 9 is configured.

[Invention or problem to be solved]

Conventional semiconductor devices, especially MMICs, are configured as described above, so three insulating films, the first insulating film 3, the intermediate dielectric film 5, and the second insulating film 7, are formed on the FETZ. As a result, the overall dielectric constant of the insulating film and dielectric film as a whole increases. Therefore, the capacitance especially between the gate and source of FET2 increases, and the characteristics of FET2 deteriorate, and eventually the MM
There was a problem that the output performance of the entire IC was degraded.

This invention was made in order to solve the above-mentioned problems found in conventional MMICs, and by reducing the number of insulating films formed on FETs, high-performance, high-output semiconductor devices, In particular, it is aimed at obtaining MMIC.

(Means for Solving the Problems) A semiconductor device of the present invention includes, for example, an FET and an MIM capacitor formed on a compound semiconductor substrate, and the FET and MIM capacitor formed on a compound semiconductor substrate.
An insulating film formed on the ET is used as the insulating film, which does not include at least an intermediate dielectric film for forming the MIM capacitor.

In the method for manufacturing a semiconductor device of this invention, MI
After the intermediate dielectric film for forming the M capacitor is formed on the entire surface, at least the step of removing the intermediate dielectric film is included.

(Function) In the semiconductor device of the present invention, since there is no intermediate dielectric film for forming at least an MIM capacitor on the FET formed on the semiconductor substrate, the capacitance between the gate and source of the FET is reduced. However, it was experimentally confirmed that the output characteristics of the FET were improved as a result.

(Example) Hereinafter, a semiconductor device and a method for manufacturing the same according to the present invention will be described with reference to the drawings.

FIG. 1 is a diagram showing the manufacturing process of a first embodiment of the semiconductor device of the present invention.

In FIG. 1(a), l is a substrate made of a compound semiconductor such as GaAs, and the substrate has a thickness of, for example, 30 gems.
It has a thickness of ~400 p, m. First, a gate electrode 2g, a source electrode 2S, and a train electrode 2d are formed on a substrate l to form an FET 2. The source electrode and the train electrode are shown as shown for convenience, and of course, the positions may be reversed. As described in the explanation of the conventional semiconductor device manufacturing process, the FET 2 is first formed by:
This is because when forming an extremely fine pattern for each element of the FET, which determines the main performance of the entire MMIC, the presence of other elements makes it extremely difficult to form the above-mentioned fine pattern. After forming the FET 2, a first insulating film 3 for covering the entire surface of the substrate 1 and the FET 2 to protect the FET 2 is formed by 200 to 30 people using, for example, plasma CVD.
It is formed to a thickness of 0.00. As the first insulating film 3, for example, a SiO-based insulating film is used.

Next, as shown in FIG. 1(b), for example, an MIM (Metal-Insulator-
The lower electrode 4 of the (Metal) capacitor is formed using a method such as vapor deposition or a lift-off method.

Next, as shown in FIG. 1(C), an intermediate dielectric film 5 is formed by, for example, plasma CVD, covering the lower electrode 4 and the first insulating film 3.
It is formed to a thickness of 1,500 to 2,000 people using the D method. As the intermediate dielectric film 5, for example, a SiN-based insulating film is used.

Next, as shown in FIG. 1(d), an upper layer electrode 6 facing the lower layer electrode 4 is formed on the intermediate dielectric film 5 by a method such as vapor deposition or a lift-off method, thereby forming an MIM capacitor 9. .

Next, as shown in FIG. 1(e), a photoresist 11 is formed covering the upper layer electrode 6 and the intermediate dielectric film 5, and is patterned to form an opening 12 only above the FET 2.

Next, as shown in FIG. 1(f), etching is performed using the patterned photoresist 11 as a mask to remove only the portion of the intermediate dielectric film 5 above the FET 2. After that, the remaining photoresist 11 is removed.

When wet etching is used as the etching process, an etchant such as hydrofluoric acid (HF) is used, and when tri-etching is used, a gas such as carbon tetrafluoride (CF) is used. Ru. In this case, since the etching rate of SiN constituting the intermediate dielectric film 5 is about 5 to 10 times the etching rate of SiO constituting the first insulating film 3, a sufficient etching rate can be achieved in the above etching process. Earn money and say,
Only the intermediate dielectric film 5 on the FET 2 can be effectively removed.

Next, as shown in FIG. 1(g), a second insulating film 7 made of, for example, SiO or SiN is formed on the entire surface using, for example, plasma CVD to a thickness of 500 to 1000 mm.

Next, as shown in FIG. 1(h), a photoresist 8 is formed on the entire surface of the second insulating film 7, and patterned so that an opening 10 is formed in the MIM capacitor portion.

Next, as shown in FIG. 1(i), etching is performed using the photoresist 8 as a mask to remove the second insulating film in the portion facing the upper layer electrode 6 of the MIM capacitor. The electrode 6 is exposed. This allows the FET2 and MIM formed on the substrate to
A semiconductor device of the present invention including a capacitor 9 is constructed.

In the semiconductor device of the present invention, an insulating film (
The thinner the overall thickness of 3 and 7), the better the FET.
2, especially the capacitance between the gate and the source becomes smaller and the output becomes larger as shown in Figure 4, making it possible to obtain a semiconductor device with excellent performance, but on the other hand, the moisture resistance decreases, leading to problems with reliability. arise. As a result of the experiment, it was confirmed that there was no problem in terms of reliability even if the total thickness of the insulating film on the FET was reduced to 20.0 mm. Therefore, considering reliability, output size, etc., the total thickness of the insulating film on the FET 2 is set to 200 to 3000 Å, preferably about 10 Å.
It is set to 00 people.

In the first embodiment of the semiconductor device of the present invention shown in FIG. 1, an etching process is performed to remove the intermediate dielectric film 5 on the FET 2 (FIGS. 1(e) to 1(f)). , M.I.M.
Etching process for removing the second insulating film 7 on the capacitor 9 (FIG. 1(h) to t!s1(i))
or the intermediate dielectric M5 and the second insulator M7
This has the effect that even if the materials are different, each material can be etched with the optimum conditions.

FIG. 2 is a diagram showing the manufacturing process of a second embodiment of the semiconductor device of the present invention. In the same figure, Fig. 2(a) to Fig. 2(
The step cl) is similar to the steps shown in FIGS. 1(a) to 81(d). In this case, it is preferable that the first insulating film 3 is formed of SiO and the intermediate dielectric film 5 is formed of SiN.

Following the step of FIG. 2(d), a second insulating film 7 is formed to cover the entire upper electrode 6 and intermediate dielectric film 5 of the MIM capacitor 9, as shown in FIG. 2(e). It is preferable that the second insulating film 7 is formed of SiN like the intermediate dielectric film 5.

Next, as shown in FIG. 2(f), a photoresist 13 is formed on the entire surface of the second insulator M7, and openings 14 and 15 are formed in the MIM capacitor 9 part and the FET 2 part, respectively. Pattern it so that it looks like this.

Next, as shown in FIG. 2(g), the photoresist 1
3 was used as a mask to perform etching treatment, and MI
The second insulating film 7 on the M capacitor 9, the second insulating film 7 on the FET 2, and the intermediate dielectric film 5 are removed. In this case, as in the first embodiment shown in FIG. 1, in the case of wet etching, for example, a hydrofluoric acid (HF)-based etchant is used, and in the case of tri-etching, carbon tetrafluoride (CF) is used. Gases such as systems are used. The intermediate dielectric film 5 and the second insulating film 7 are made of SiN, which has a higher etching rate than SiO forming the first insulating film 3.
Therefore, only the intermediate dielectric film 5 and the second insulator M7 on the MIM capacitor 9 and the FET 2 can be removed rightward. This makes it possible to obtain an MMIC in which only the first insulating film 3 is formed on the FETZ, as shown in FIG. 2(g).

After the etching process, the remaining photoresist 13 is completely removed to obtain a semiconductor device according to a second embodiment of the present invention as shown in FIG. 2(g).

The second embodiment of the present invention shown in FIG. 2 is different from the first embodiment described above because the intermediate dielectric film 5 and the second insulating film 7 are etched and removed at the same time. Etching process is reduced.

Also in the embodiment shown in FIG. 2, the thickness of the insulating film on the FET 2, in this case only the N41 insulating film 3, is 200 Å to 300 Å.
0 Å, preferably about 1000 people.

(Effects of the Invention) As described above, according to the present invention, it is possible to obtain a highly reliable, high-performance semiconductor device that can obtain a large output by reducing the capacitance, especially between the gate and source of the FET. It comes. Moreover, since this invention does not require much change in the conventional MMIC manufacturing process shown in FIG. 3, there is no need for major changes in manufacturing equipment, and manufacturing costs will not increase by implementing this invention. . In the above embodiment, an MTM capacitor is formed in addition to the FET 2, and the first insulating film M3, the second insulating film 7, and the intermediate dielectric film 5 are used. In addition, other elements are added to the FET2
Even when a multilayer insulating film is formed on top of the FE, the method described in each of the above embodiments can be adopted.
It is possible to prevent the performance of FET 2 from deteriorating by reducing the number of insulating films on the TZ.

[Brief explanation of drawings]

1(a) to 1(i) are cross-sectional views illustrating the steps of manufacturing the semiconductor device of the first embodiment of the present invention shown in FIG. 1(i), and FIG. 2(a) 2(g) are cross-sectional views illustrating the steps of manufacturing the semiconductor device of the second embodiment of the present invention shown in FIG. 2(g), and FIGS. 3(a) to 3(g) ) is a cross-sectional view illustrating the process of manufacturing the conventional semiconductor device shown in FIG. 3(g), and FIG. FIG. 3 is a diagram showing the relationship with the total thickness of the insulating film formed. In Figure 1, 1... Semiconductor substrate, 2... Field effect transistor, 3.7... Insulating film, 4.6... MIM capacitor electrode, 5... Dielectric film, 8° 11...
Photorecipe, 9...MIM capacitor 10.12.
...Aperture. In Fig. 2, l...Semiconductor substrate, 2...Field effect transistor, 3.7...Insulating film, 4.6...MIM capacitor electrode, 5...Dielectric film, 8° 11...
Photoresist, 9... MIM capacitor 13... Photoresist, 14, ]5... Opening. I ¥ 1 (2) (2) (2) [2] (1) 3 Phytoresist 4 time 0 5 M mouth (2) (1) Ryo 3 day (2) th 000 000: 1000

Claims (6)

[Claims] (1) A field effect transistor configured on a semiconductor substrate, an MIM capacitor, and an insulating film formed on the field effect transistor, and the insulating film includes at least an intermediate dielectric film for forming the MIM capacitor. A semiconductor device characterized by not including: (2) The thickness of the insulating film on the field effect transistor is 200 mm
2. The semiconductor device according to claim 1, wherein the semiconductor device has a thickness of Å to 3000 Å. (3) A step of forming a field effect transistor on the semiconductor substrate, a step of forming a first insulating film on the field effect transistor, forming an MIM capacitor on the semiconductor substrate, and a structure of the MIM capacitor. At times, a step of laminating and forming a dielectric film of the MIM capacitor on the first insulating film, and a step of removing the dielectric film on at least the field effect transistor and depositing the first dielectric film on the field effect transistor. A method for manufacturing a semiconductor device, comprising the steps of leaving only an insulating film and forming at least a second insulating film on top of the field effect transistor. (4) The first insulating film is SiO, and the intermediate dielectric film is S
4. The method of manufacturing a semiconductor device according to claim 3, wherein the semiconductor device is iN. (5) forming a field effect transistor on the semiconductor substrate; forming a first insulating film on the field effect transistor; forming an MIM capacitor on the semiconductor substrate; A step of laminating and forming a dielectric film of the MIM capacitor on the first insulating film, a step of forming at least a second insulating film covering the MIM capacitor and the dielectric film, and the field effect A method for manufacturing a semiconductor device, comprising the step of removing another insulating film and the dielectric film so that only the first insulating film remains on the transistor. (6) The method for manufacturing a semiconductor device according to claim (5), wherein the first insulating film is SiO, and the dielectric film and the other insulating films are SiN.