JPH03284837A - Manufacture of semiconductor substrate - Google Patents

Manufacture of semiconductor substrate

Info

Publication number
JPH03284837A
JPH03284837A JP8662090A JP8662090A JPH03284837A JP H03284837 A JPH03284837 A JP H03284837A JP 8662090 A JP8662090 A JP 8662090A JP 8662090 A JP8662090 A JP 8662090A JP H03284837 A JPH03284837 A JP H03284837A
Authority
JP
Japan
Prior art keywords
gaas
substrate
layer
temperature
growth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8662090A
Other languages
Japanese (ja)
Inventor
Takayuki Nishimura
孝之 西村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Steel Corp
Original Assignee
Sumitomo Metal Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Metal Industries Ltd filed Critical Sumitomo Metal Industries Ltd
Priority to JP8662090A priority Critical patent/JPH03284837A/en
Publication of JPH03284837A publication Critical patent/JPH03284837A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To avoid defects such as dislocations caused by lattice mismatching created at the time of the growth of a GaAs layer and reduce the dislocation density of a GaAs growth substrate which is made to grow on an Si substrate by a method wherein, after an AlAs layer is made to grow at a low temperature, the GaAs layer is made to grow on the AlAs layer at a specific temperature at which the lattice constant agrees with the lattice constant of GaAs bulk. CONSTITUTION:If an AlAs layer is made to grow on an Si substrate at a low temperature (t1), the lattice constant of the low temperature growth AlAs layer on the Si substrate agrees with the lattice constant of AlAs bulk at the temperature (t1) (point P). If the temperature is elevated after that, the lattice constant of the low temperature growth AlAs layer on the Si substrate agrees with the lattice constant of GaAs bulk at a temperature (t2) (point K). If a GaAs layer is made to grow at the temperature (t2), the GaAs layer can be made to grow with the values of the lattice constants of the AlAs layer and the GaAs layer along the direction parallel with the Si substrate agreeing with each other. With this constitution, introduction of dislocations into the growth layer at the time of the growth of the GaAs layer can be avoided and, a dislocation density can be reduced compared to the dislocation density of a growth substrate made by a conventional GaAs low temperature growth method.

Description

【発明の詳細な説明】 Ll上Ω五里上! 本発明は半導体基板の製造方法、より詳細にはSi基板
上にGaAs成長層を有する半導体基板の製造方法に関
する。
[Detailed description of the invention] Ll upper Ω gori upper! The present invention relates to a method for manufacturing a semiconductor substrate, and more particularly to a method for manufacturing a semiconductor substrate having a GaAs growth layer on a Si substrate.

従)ヱ目支術 −Sに、GaAs等の化合物半導体は、Siでは実現で
きない種々の特徴を備えており、光あるいは高速デバイ
スに対する需要は大きい。これに対し、GaAs基板は
Si基板と比較して、基板が小さい、もろい、熱伝導性
が低い、価格ps非常に高いという欠点をもっている。
Compound semiconductors such as GaAs have various characteristics that cannot be realized with Si, and there is a great demand for optical or high-speed devices. On the other hand, compared to Si substrates, GaAs substrates have the disadvantages of being small, brittle, having low thermal conductivity, and being extremely expensive.

そこで、31基板上にGaAs層を成長させることがで
きれば、GaAsの持つ長所を生かしたまま、Siの利
点も備えたデバイスを実現することが可能となる。しか
し、室温でのSiの格子定数はa、、=5.4309人
、GaAsの格子定数はa QaAs=5.6533人
と、GaAsとSiとの間には格子定数の差が約4%も
あり、GaAs基板の場合と同様の成長条件では、直接
81基板上に単結晶のGaAs薄膜を成長させることは
困難であった。
Therefore, if a GaAs layer can be grown on the 31 substrate, it will be possible to realize a device that has the advantages of Si while taking advantage of the advantages of GaAs. However, the lattice constant of Si at room temperature is a,, = 5.4309, and the lattice constant of GaAs is a, QaAs = 5.6533, so there is a difference of about 4% in lattice constant between GaAs and Si. However, it was difficult to grow a single-crystal GaAs thin film directly on the 81 substrate under the same growth conditions as for the GaAs substrate.

しかしながら、MOCVD (有機金属の熱分解による
気相成長)法あるいはMBE(分子線エビクキシャル成
長)法を使用して、第2図に示したように、まず、約1
000°Cで31基板の表面を熱処理してクリーニング
した後、MOCVD法ならば450°C程度、MBE法
ならば400°C程度の低い温度で厚さ約200人のG
aAsを成長させる。成長をいったん中断してから基板
温度を上げ、2回目の成長を600〜750℃の高温で
行ない、数μm程度のGaAs層を形成するといった2
段階成長法によって、格子定数の差による格子不整合を
緩和してSi基板上にGaAs層を形成することに成功
している。
However, using the MOCVD (metal-organic pyrolysis vapor phase growth) method or the MBE (molecular beam eviaxial growth) method, as shown in Figure 2, approximately 1.
After heat-treating and cleaning the surface of the 31 substrate at 000°C, it is heated to a thickness of about 200 mm at a low temperature of about 450°C for the MOCVD method and 400°C for the MBE method.
Grow aAs. After the growth is stopped, the substrate temperature is raised, and a second growth is performed at a high temperature of 600 to 750°C to form a GaAs layer of several micrometers.
A stepwise growth method has been used to successfully form a GaAs layer on a Si substrate by alleviating the lattice mismatch caused by the difference in lattice constants.

上記のようにして、Si基板上にGaAsを成長させた
場合、成長層のGaAsの格子定数は、バルクのGaA
sとは異なり、さらに31基板に対して平行な方向と垂
直な方向とでもそれぞれ違ってくる。これは成長基板が
室温に冷却されるとき、基板全体は縮むが、GaAsと
51はそれぞれ熱膨張係数が異なるので、薄いGaAs
層はSi基板に引っ張られ、基板に対して平行方向では
伸ばされ、垂直方向では縮むこととなるためである。
When GaAs is grown on a Si substrate as described above, the lattice constant of GaAs in the grown layer is
s, and also differs in the direction parallel to and perpendicular to the 31 substrate. This is because when the growth substrate is cooled to room temperature, the entire substrate shrinks, but since GaAs and 51 have different coefficients of thermal expansion, thin GaAs
This is because the layer is pulled by the Si substrate, elongating in a direction parallel to the substrate and contracting in a direction perpendicular to the substrate.

第3図は、低温成長温度が450℃の場合のGaAsの
格子定数−温度曲線を示しており、31基板上において
Si基板に対して平行方向のGaAsの格子定数を  
 で、31基板上においてSi基板に対して垂直方向の
GaAsの格子定数を一一一−で及びGaAsバルクの
格子定数を   でそれぞれ表わした。
Figure 3 shows the lattice constant-temperature curve of GaAs when the low-temperature growth temperature is 450°C.
The lattice constant of GaAs in the direction perpendicular to the Si substrate on the 31 substrate is expressed by 111-, and the lattice constant of the GaAs bulk is expressed by .

第3図に示したように、低温成長温度450℃において
、Si基板に対して平行方向のGaAsの格子定数の値
、Si基板に対して垂直方向のGaAsの格子定数の値
及びGaAsバルクの格子定数の値が一致する。
As shown in Figure 3, at a low temperature growth temperature of 450°C, the value of the lattice constant of GaAs in the direction parallel to the Si substrate, the value of the lattice constant of GaAs in the direction perpendicular to the Si substrate, and the lattice of GaAs bulk. Constant values match.

明が ′しようとする課 上記従来の半導体基板の製造方法において、Si基板及
びSi基板に対して平行方向のGaAs層の熱膨張係数
はSi基板に対して平行方向のGaAs層の格子定数が
31基板の伸縮と一致することから、o8□=07y=
2.6XlO−’ deg−’であり、一方、GaAs
バルクの熱膨張係数はa aaag=6.5Xlo−’
 deg−である。
In the conventional semiconductor substrate manufacturing method described above, the coefficient of thermal expansion of the Si substrate and the GaAs layer in the direction parallel to the Si substrate is such that the lattice constant of the GaAs layer in the direction parallel to the Si substrate is 31. Since it corresponds to the expansion and contraction of the board, o8□=07y=
2.6XlO-'deg-', while GaAs
The bulk thermal expansion coefficient is aaaag=6.5Xlo-'
It is deg-.

このため、高温(650℃)でGaAs層をSi基板上
に成長させた場合、第3図に示したように、31基板に
対して平行方向のGaAs層の格子定数はa77=5.
6727.6aAsバルクの格子定数はa 、、、、:
 5.6772となり不一致が生しることとなる。この
ように格子定数に差があると、GaAs層の成長時に、
格子不整合による転位等の欠陥が発生しやすくなり、転
位密度はLX 10’/cm”程度となってしまい、G
aAs層の結晶性を低下させるという課題があった。
Therefore, when a GaAs layer is grown on a Si substrate at a high temperature (650°C), the lattice constant of the GaAs layer in the direction parallel to the 31 substrate is a77=5.
The lattice constant of 6727.6aAs bulk is a:
5.6772, resulting in a mismatch. If there is a difference in lattice constant in this way, during the growth of the GaAs layer,
Defects such as dislocations due to lattice mismatch are likely to occur, and the dislocation density is about LX 10'/cm", resulting in G
There was a problem of reducing the crystallinity of the aAs layer.

本発明はこれら課題に鑑み発明されたものであって、3
1基板上に成長させたGaAs層の転位密度を低減し、
GaAs層の結晶性が向上した半導体基板の製造方法を
提供することを目的としている。
The present invention was invented in view of these problems, and includes three
By reducing the dislocation density of the GaAs layer grown on one substrate,
It is an object of the present invention to provide a method for manufacturing a semiconductor substrate in which the crystallinity of a GaAs layer is improved.

課1を”するための E 上記した目的を達成するために本発明に係る半導体基板
の製造方法は、Si基板上にAlAsを低温で成長させ
た後、該AlAs層の格子定数がQaAsバルクの格子
定数と一致する温度において、前記AlAs層の上にG
aAsを成長させることを特徴としている。
In order to accomplish the above-mentioned object, the method for manufacturing a semiconductor substrate according to the present invention involves growing AlAs on a Si substrate at a low temperature, and then changing the lattice constant of the AlAs layer to that of the QaAs bulk. G on top of the AlAs layer at a temperature consistent with the lattice constant.
It is characterized by growing aAs.

作■ 第1図は、GaAs及びAlAsの格子定数−温度曲線
を示しており、GaAsバルクの格子定数をで、AlA
sバルクの格子定数を□で及び81基板上に低温成長A
lAs層を成長させた時のSi基板に対して平行方向の
AlAs層の格子定数を一一一一でそれぞれ表わした。
Figure 1 shows the lattice constant-temperature curves of GaAs and AlAs.
s Bulk lattice constant □ and low temperature growth A on 81 substrate
The lattice constants of the AlAs layer in the direction parallel to the Si substrate when the lAs layer is grown are expressed as 1111, respectively.

GaAsバルクの熱膨張係数はOaaAs=6.5Xl
O−’deg−’であり、一方、AlAsバルクの熱膨
張係数はa A、A、: 5.2X10−6deg−’
であるため、温度がt[℃]の時のGaAsバルク及び
AlAsバルクの格子定数はそれぞれ、 aoaAi=5.6533(146,5X10−’ t
)aAIA$=5.6605fl+5.2XlO−6t
)で表わされる。
The thermal expansion coefficient of GaAs bulk is OaaAs=6.5Xl
O-'deg-', while the thermal expansion coefficient of the AlAs bulk is a A, A,: 5.2X10-6deg-'
Therefore, the lattice constants of GaAs bulk and AlAs bulk when the temperature is t [℃] are aoaAi=5.6533(146,5X10-' t
)aAIA$=5.6605fl+5.2XlO-6t
).

まず、81基板上にAlAs層の低温成長を温度tて行
うと、31基板上の低温成長AlAs層の格子定数は、
温度t1におけるAlAsバルクの格子定数と致する(
P点)。
First, when the AlAs layer is grown at a low temperature on the 81 substrate at a temperature t, the lattice constant of the low temperature grown AlAs layer on the 31 substrate is
It corresponds to the lattice constant of the AlAs bulk at the temperature t1 (
P point).

その後昇温すると、AlAs層は薄いためSi基板に対
して平行方向において、Si基板の膨張と同し割合で膨
張し、S1基板に対して平行方向のAlAs層の格子定
数曲線である破線をたどることになる。すると、81基
板上の低温成長AlAs層の格子定数は、温度t2にお
いて、GaAsバルクの格子定数と一致する(K点)。
When the temperature is subsequently increased, the AlAs layer is thin, so it expands in the direction parallel to the Si substrate at the same rate as the expansion of the Si substrate, and follows the broken line, which is the lattice constant curve of the AlAs layer in the direction parallel to the S1 substrate. It turns out. Then, the lattice constant of the low temperature grown AlAs layer on the 81 substrate matches the lattice constant of the GaAs bulk at temperature t2 (point K).

従って、j+、jzがそれぞれ二段階成長法に適した温
度であれば、成長温度t2でGaAsを成長させること
により、Si基板に対して平行方向のA I As層の
格子定ヨクとGaAs層の格子定数とが一致した値にお
いてGaAs層を成長させることができ、格子整合を図
ることができる。
Therefore, if j+ and jz are respectively suitable temperatures for the two-step growth method, by growing GaAs at the growth temperature t2, the lattice constant of the A I As layer in the direction parallel to the Si substrate and the lattice constant of the GaAs layer can be changed. A GaAs layer can be grown at a value that matches the lattice constant, and lattice matching can be achieved.

31基板に450°CでAlAs層を成長させた時の基
板に対して平行方向のAlAs層の格子定数は、azz
a+As=5.6671(1+2.6XlO−6t)の
式で表わされ、上記の式で表わされた曲線がGaAsバ
ルクの格子定数曲線と交わる点にの温度はt2=630
℃となる。これは、GaAsの成長が可能な温度である
When an AlAs layer is grown on a 31 substrate at 450°C, the lattice constant of the AlAs layer in the direction parallel to the substrate is azz
It is expressed by the equation a+As=5.6671(1+2.6XlO-6t), and the temperature at the point where the curve expressed by the above equation intersects the lattice constant curve of the GaAs bulk is t2=630.
℃. This is the temperature at which GaAs can grow.

なお、低温成長温度を変化させることによって、GaA
sの成長温度を上下させることは可能である。
Note that by changing the low-temperature growth temperature, GaA
It is possible to increase or decrease the growth temperature of s.

従って上記した方法の如く、31基板上にAlAsを低
温で成長させた後、該AlAs層の格子定数がGaAs
バルクの格子定数と一致する温度において、前記AlA
s層の上にGaAsを成長させることによって、GaA
sの成長時に成長層への転位の導入が防止され、従来の
GaAs低温成長法の成長基板と比較して、転位密度が
低くなる。
Therefore, as in the method described above, after growing AlAs on a 31 substrate at a low temperature, the lattice constant of the AlAs layer becomes GaAs.
At a temperature consistent with the bulk lattice constant, the AlA
By growing GaAs on top of the s-layer, GaAs
During the growth of s, the introduction of dislocations into the grown layer is prevented, and the dislocation density is lowered compared to the growth substrate of the conventional GaAs low-temperature growth method.

衷亘コ 以下本発明に係る2段階成長法による半導体基板の製造
方法について説明する。
A method for manufacturing a semiconductor substrate using a two-step growth method according to the present invention will be described below.

まず、約1000°Cで81基板(p形あるいはp形、
(100)面、[011]方向へ2°オフ)の表面を数
分間熱処理してクリーニングした後、MOCVD法を用
いて、450℃の温度で厚さ約200人の低温AlAs
層を成長させる。成長をいったん中断した後、基板温度
を630℃まで上昇させ、GaAs層を3μm形成する
First, 81 substrate (p-type or p-type,
After cleaning the (100) surface (2° off in the [011] direction) by heat treatment for several minutes, a low-temperature AlAs film with a thickness of approximately 200 nm was deposited at a temperature of 450 °C using the MOCVD method.
Grow layers. After the growth is temporarily interrupted, the substrate temperature is raised to 630° C. and a 3 μm thick GaAs layer is formed.

このようにして得られた半導体基板の転位密度及び半導
体基板を用いて半導体レーザを製作したときのしきい値
電流の値を従来例と比較し、表1に示した。
The dislocation density of the semiconductor substrate thus obtained and the threshold current value when a semiconductor laser was manufactured using the semiconductor substrate were compared with those of a conventional example, and are shown in Table 1.

なお、比較のための従来例は、450℃の温度で厚さ約
200人の低温成長GaAs層を形成し、この後630
°CでGaAs層を3μm形成したものを使用した。
In the conventional example for comparison, a low-temperature grown GaAs layer with a thickness of about 200 layers was formed at a temperature of 450 degrees Celsius, and then a GaAs layer of about 630 layers thick was formed at a temperature of 450 degrees Celsius.
A 3 μm thick GaAs layer was formed at °C.

この結果からも明らかなように、上記した実施例によれ
ば、GaAs層をSi基板上に成長させるために、低温
でAlAs層を形成することによりAlAs層とその上
に成長させるGaAs層との間の格子定数の整合をした
後、高温でGaAs層を形成するという2段階成長法を
用いて、GaAs薄膜を31基板上に形成することによ
り、基板の転位密度を低減させることができ、従ってこ
のようにして作製された基板を用いて半導体素子を製造
することにより、素子特性を向上させることができる。
As is clear from this result, according to the above-mentioned example, in order to grow a GaAs layer on a Si substrate, the AlAs layer and the GaAs layer grown thereon are formed by forming the AlAs layer at a low temperature. By forming a GaAs thin film on a 31 substrate using a two-step growth method in which a GaAs layer is formed at high temperature after matching the lattice constant between By manufacturing a semiconductor device using a substrate manufactured in this manner, device characteristics can be improved.

発明の効果 以上の説明により明らかなように本発明に係る半導体基
板の製造方法は、81基板上にAlAsを低温で成長さ
せた後、該AlAs層の格子定数がGaAsバルクの格
子定数と一致する温度において、前記AlAs層の上に
GaAsを成長させているので、GaAs層の成長時の
格子不整合による転位等の欠陥の発生を防止し、Si基
板上に成長させたGaAs成長基板の転位密度を低減す
ることができ、GaAs層の結晶性を向上させることが
できる。従って、この製造方法を用いて形成した半導体
基板を用いて、半導体素子を作製すればその特性の向上
を図ることができる。
Effects of the Invention As is clear from the above explanation, in the method for manufacturing a semiconductor substrate according to the present invention, after AlAs is grown on an 81 substrate at a low temperature, the lattice constant of the AlAs layer matches the lattice constant of the GaAs bulk. Since GaAs is grown on the AlAs layer at a certain temperature, the occurrence of defects such as dislocations due to lattice mismatch during the growth of the GaAs layer is prevented, and the dislocation density of the GaAs growth substrate grown on the Si substrate is reduced. can be reduced, and the crystallinity of the GaAs layer can be improved. Therefore, if a semiconductor element is manufactured using a semiconductor substrate formed using this manufacturing method, the characteristics of the semiconductor element can be improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に係る半導体基板の製造方法を説明する
ためのAlAs層の成長をt1℃で行なったときのGa
Asバルク、AlAsバルク及び低温成長層である81
基板上のAlAs層の格子定数−温度曲線、第2図は従
来の方法を説明するための成長温度のプロファイルを示
す図、第3図はSi基板上に形成されたGaAs層の基
板に平行方向、垂直方向における及びGaAsバルクの
格子定数−温度曲線である。
Figure 1 shows the growth of a Ga layer when an AlAs layer is grown at t1°C to explain the method of manufacturing a semiconductor substrate according to the present invention.
As bulk, AlAs bulk and low temperature growth layer 81
The lattice constant-temperature curve of the AlAs layer on the substrate. Figure 2 shows the growth temperature profile for explaining the conventional method. Figure 3 shows the growth temperature profile of the GaAs layer formed on the Si substrate in the direction parallel to the substrate. , in the vertical direction and the lattice constant-temperature curve of the GaAs bulk.

Claims (1)

【特許請求の範囲】[Claims] (1)Si基板上にAlAsを低温で成長させた後、該
AlAs層の格子定数がGaAsバルクの格子定数と一
致する温度において前記AlAs層の上にGaAsを成
長させることを特徴とする半導体基板の製造方法。
(1) A semiconductor substrate characterized in that after AlAs is grown on a Si substrate at a low temperature, GaAs is grown on the AlAs layer at a temperature where the lattice constant of the AlAs layer matches the lattice constant of the GaAs bulk. manufacturing method.
JP8662090A 1990-03-30 1990-03-30 Manufacture of semiconductor substrate Pending JPH03284837A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8662090A JPH03284837A (en) 1990-03-30 1990-03-30 Manufacture of semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8662090A JPH03284837A (en) 1990-03-30 1990-03-30 Manufacture of semiconductor substrate

Publications (1)

Publication Number Publication Date
JPH03284837A true JPH03284837A (en) 1991-12-16

Family

ID=13892068

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8662090A Pending JPH03284837A (en) 1990-03-30 1990-03-30 Manufacture of semiconductor substrate

Country Status (1)

Country Link
JP (1) JPH03284837A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006012899A (en) * 2004-06-22 2006-01-12 Sharp Corp Semiconductor laser device and its manufacturing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006012899A (en) * 2004-06-22 2006-01-12 Sharp Corp Semiconductor laser device and its manufacturing method

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