JPH03276651A - Manufacture of hybrid integrated circuit - Google Patents
Manufacture of hybrid integrated circuitInfo
- Publication number
- JPH03276651A JPH03276651A JP7625190A JP7625190A JPH03276651A JP H03276651 A JPH03276651 A JP H03276651A JP 7625190 A JP7625190 A JP 7625190A JP 7625190 A JP7625190 A JP 7625190A JP H03276651 A JPH03276651 A JP H03276651A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- lead terminal
- exterior
- integrated circuit
- hybrid integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 15
- 239000011347 resin Substances 0.000 claims abstract description 58
- 229920005989 resin Polymers 0.000 claims abstract description 58
- 238000000576 coating method Methods 0.000 claims abstract description 17
- 239000011248 coating agent Substances 0.000 claims abstract description 16
- 238000000034 method Methods 0.000 claims abstract description 12
- 230000001681 protective effect Effects 0.000 claims abstract description 12
- 239000011253 protective coating Substances 0.000 claims abstract description 5
- 238000002844 melting Methods 0.000 claims description 5
- 230000008018 melting Effects 0.000 claims description 5
- 229910000679 solder Inorganic materials 0.000 claims description 4
- 239000002966 varnish Substances 0.000 abstract description 6
- 239000003822 epoxy resin Substances 0.000 abstract description 2
- 229920000647 polyepoxide Polymers 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 239000000088 plastic resin Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は混成集積回路の製造方法、特に外装コーティン
グ工程におけるリード端子のコーティングの見切り精度
に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a hybrid integrated circuit, and particularly to the accuracy of coating of lead terminals in an exterior coating process.
従来、混成集積回路を製造する場合には、第３図に示す
ように、電子部品を基板に搭載してからリード端子付け
を行い、しかる後、外装コーティングをするという製造
工程で行われていた。また第４図及び第５図は従来方法
の製造工程で外装コーティングを行った結果を示してお
り、１は基板２に搭載されている電子部品、３はリード
端子、４は外装用樹脂である。外装コーティングを行う
と、第５図に示すように９表面張力により、リード端子
３のテーパ形状を有する取付部Ａ（装置の基板への取付
部）にも外装用樹脂４が付着してしまい、混成集積回路
のリード端子３を装置の基板に挿入し、半田付けすると
きに、半田付は不良が発生していた。この場合、従来は
この対策として、取付部Ａの長いリード端子３を使用し
たり。Traditionally, when manufacturing hybrid integrated circuits, the manufacturing process involved mounting electronic components on a board, attaching lead terminals, and then applying an exterior coating, as shown in Figure 3. . Furthermore, Figures 4 and 5 show the results of exterior coating performed in the conventional manufacturing process, where 1 is the electronic component mounted on the board 2, 3 is the lead terminal, and 4 is the exterior resin. . When the exterior coating is applied, as shown in FIG. 5, the exterior resin 4 also adheres to the tapered attachment portion A of the lead terminal 3 (the attachment portion to the circuit board of the device) due to surface tension. When the lead terminals 3 of the hybrid integrated circuit were inserted into the board of the device and soldered, defects occurred in the soldering. In this case, as a conventional countermeasure, a long lead terminal 3 of the mounting part A is used.
或いは、外装コーテイング後に、リード端子３に付着し
た外装用樹脂４を機械的に剥離していた。Alternatively, after the exterior coating, the exterior resin 4 adhering to the lead terminals 3 is mechanically peeled off.
しかし、取付部の長いリード端子を使用する方法は、混
成集積回路の小形化の妨げとなり、また、外装コーテイ
ング後にリード端子に付着した外装用樹脂を機械的に剥
離する方法は、リード端子を破損するという危険を伴う
。However, the method of using lead terminals with long mounting parts impedes the miniaturization of hybrid integrated circuits, and the method of mechanically peeling off the exterior resin adhering to the lead terminals after exterior coating damages the lead terminals. There is a danger of doing so.
本発明は以上の欠点を除去するために、基板上に電子部
品を搭載し、入出力を含む外部との接続用リード端子を
半田付けした後に、外装用樹脂で外装コーティングを行
う混成集積回路のＮ遣方法において、上記リード端子及
び外装用樹脂と親和性を有しない保護用樹脂で上記リー
ド端子の取付部に保証コーティングを行った後、上記リ
ード端子、基板及び電子部品と親和性を有する外装用樹
脂で外装コーティングを行うことを特徴とする混成集積
回路の製造方法を提供するものである。In order to eliminate the above-mentioned drawbacks, the present invention has developed a hybrid integrated circuit in which electronic components are mounted on a board, lead terminals for connection with the outside including input and output are soldered, and then the exterior is coated with exterior resin. In the N method, after coating the mounting portion of the lead terminal with a protective resin that has no affinity with the lead terminal and exterior resin, the exterior coating is coated with a protective resin that has affinity with the lead terminal, board, and electronic components. The present invention provides a method for manufacturing a hybrid integrated circuit, which is characterized in that the exterior coating is performed using a plastic resin.
このような混成集積回路によれば、リード端子及び外装
用樹脂と親和性を有しない保護用樹脂で予めリード端子
の取付部に保護コーティングを行っているので、リード
端子の取付部に付着した外装用樹脂を容易に剥離するこ
とができる。According to such a hybrid integrated circuit, since the lead terminal mounting portion is coated in advance with a protective resin that has no affinity with the lead terminal and the exterior resin, the exterior coating adhering to the lead terminal mounting portion is coated in advance. The resin can be easily peeled off.
第１図及び８８２図は本発明の一実施例を説明するため
の図である。第１ＦＩ！Ｊは本発明の混成集積回路の製
造工程を示す図であり、電子部品１を基板２に搭載して
からリード端子３０半田付けを行いその後、外装用樹脂
４てコーティングする前にリード端子３及び外装用樹脂
４と親和性を有しない樹脂、即ちリード端子３と外装用
樹脂４とが接着しないようにリード端子３を保護する保
護用樹脂５．ｌＮえばワニス樹脂（溶融温度；５０’Ｃ
前後）のようにリード端子３及び外装用樹脂４と密着性
の悪い樹脂で上記リード端子３の取付部に保護コーティ
ングを行う、しかる後、リード端子３．基板２及び電子
部品１と親和性を有する外装用樹脂４、例えばエポキシ
樹脂（硬化温度；１００−１５０℃）のようにリード端
子３．基４ｉ！ｉｉ２及び電子部品１と密着性の良い樹
脂で外装コーティングを行っている。このような構造に
あっては、従来に比べてはるかに小さな機械的力で以て
、保護用樹脂５を容易に剥離できるので、リード端子３
に悪影響を与えることなく、外装用樹脂４も一緒に簡単
に剥離できる０次に、第２図は本発明におけるリード端
子３部分の拡大図であるが、リード端子３に塗布されて
いる保護用樹脂５１例えばワニス樹脂を剥離する方法と
して９同図に示すように、溶融した半田６にリード端子
３のワニス樹脂の塗布されている部分を浸すことにより
、溶融温度が５０℃程度のワニス樹脂を半田熱で溶かし
て、リード端子３からワニス樹脂及び該樹脂に付着して
いる外装用樹脂４を除去することができる。FIG. 1 and FIG. 882 are diagrams for explaining one embodiment of the present invention. 1st FI! J is a diagram showing the manufacturing process of the hybrid integrated circuit of the present invention, in which the electronic component 1 is mounted on the board 2, the lead terminals 30 are soldered, and then the lead terminals 3 and 30 are soldered before being coated with exterior resin 4. 5. A resin that has no affinity with the exterior resin 4, that is, a protective resin that protects the lead terminal 3 so that the lead terminal 3 and the exterior resin 4 do not adhere to each other. Varnish resin (melting temperature: 50'C)
As shown in (before and after), the mounting portion of the lead terminal 3 is coated with a resin that has poor adhesion to the lead terminal 3 and the exterior resin 4. After that, the lead terminal 3. Exterior resin 4 having affinity with substrate 2 and electronic component 1, such as epoxy resin (curing temperature: 100-150°C), is used as lead terminal 3. Base 4i! The exterior is coated with a resin that has good adhesion to ii2 and electronic component 1. With such a structure, the protective resin 5 can be easily peeled off with a much smaller mechanical force than in the past, so the lead terminal 3
Fig. 2 is an enlarged view of the lead terminal 3 portion in the present invention, and the protective resin 4 coated on the lead terminal 3 is 9 As shown in the same figure, a method for peeling off the resin 51, for example, varnish resin, is to immerse the varnish resin-coated portion of the lead terminal 3 in the melted solder 6, thereby removing the varnish resin with a melting temperature of about 50°C. The varnish resin and the exterior resin 4 attached to the resin can be removed from the lead terminal 3 by melting it with soldering heat.
以上述べたように本発明は、基板上に電子部品を搭載し
、入出力を含む外部との接続用リード端子を半田付けし
た後に、外装用樹脂で外装コーティングを行う混成集積
回路の製造方法において。As described above, the present invention provides a method for manufacturing a hybrid integrated circuit in which electronic components are mounted on a board, lead terminals for connection with the outside including input and output are soldered, and then the exterior is coated with exterior resin. .
上記リード端子及び外装用樹脂と親和性を有しない保護
用樹脂で上記リード端子の取付部に保護コーティングを
行った後、上記リード端子、基板及び電子部品と親和性
を有する外装用樹脂で外装コーティングを行うことを特
徴とする混成集積回路の製造方法である０本発明はこの
ような特徴を有するのて、リード端子の取付部に付着し
た外装用樹脂を容易に剥離することができる。After applying a protective coating to the mounting portion of the lead terminal with a protective resin that has no affinity with the lead terminal and the exterior resin, the exterior coating is applied with an exterior resin that has an affinity with the lead terminal, board, and electronic components. The present invention, which is a method for manufacturing a hybrid integrated circuit characterized by carrying out the above features, allows the exterior resin attached to the mounting portion of the lead terminal to be easily peeled off.
第１図及び第２図は本発明の一実施例を説明するための
図、第３図乃至第５図は従来の混成集積回路の製造方法
を説明するための図である。1 and 2 are diagrams for explaining one embodiment of the present invention, and FIGS. 3 to 5 are diagrams for explaining a conventional method of manufacturing a hybrid integrated circuit.
Claims (3)
の接続用リード端子を半田付けした後に、外装用樹脂で
外装コーティングを行う混成集積回路の製造方法におい
て、 上記リード端子及び外装用樹脂と親和性を有しない保護
用樹脂で上記リード端子の取付部に保護コーティングを
行った後、上記リード端子、基板及び電子部品と親和性
を有する外装用樹脂で外装コーティングを行うことを特
徴とする混成集積回路の製造方法。(1) In a method for manufacturing a hybrid integrated circuit in which electronic components are mounted on a board, lead terminals for connection with the outside including input/output are soldered, and then the exterior is coated with exterior resin, the lead terminals and exterior are coated with exterior resin. It is characterized by applying a protective coating to the mounting portion of the lead terminal with a protective resin that has no affinity with the electronic component resin, and then applying an exterior coating with an exterior resin that has an affinity with the lead terminal, the board, and the electronic component. A method for manufacturing a hybrid integrated circuit.
の接続用リード端子を半田付けした後に、外装用樹脂で
外装コーティングを行う混成集積回路の製造方法におい
て、 溶融温度が上記半田の溶融温度より低い保護用樹脂で上
記リード端子の取付部に保護コーティングを行った後、
上記リード端子、基板及び電子部品と親和性を有する外
装用樹脂で外装コーティングを行い、しかる後、上記リ
ード端子を加熱して上記保護用樹脂及び該樹脂に付着し
た外装用樹脂を除去することを特徴とする混成集積回路
の製造方法。(2) In a hybrid integrated circuit manufacturing method in which electronic components are mounted on a board and lead terminals for external connection including input/output are soldered, an exterior coating is applied with an exterior resin, and the melting temperature of the solder is as above. After applying a protective coating to the mounting part of the above lead terminal with a protective resin whose melting temperature is lower than that of
Exterior coating is performed with an exterior resin that is compatible with the lead terminal, the board, and the electronic component, and then the lead terminal is heated to remove the protective resin and the exterior resin that has adhered to the resin. A method for manufacturing a featured hybrid integrated circuit.
ド端子を加熱することを特徴とする請求項２記載の混成
集積回路の製造方法。(3) The method of manufacturing a hybrid integrated circuit according to claim 2, characterized in that a solder bath is used to heat the lead terminals with molten solder.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7625190A JPH03276651A (en) | 1990-03-26 | 1990-03-26 | Manufacture of hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7625190A JPH03276651A (en) | 1990-03-26 | 1990-03-26 | Manufacture of hybrid integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03276651A true JPH03276651A (en) | 1991-12-06 |
Family
ID=13599976
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7625190A Pending JPH03276651A (en) | 1990-03-26 | 1990-03-26 | Manufacture of hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03276651A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49122973A (en) * | 1973-03-28 | 1974-11-25 | ||
| JPS57192033A (en) * | 1981-05-22 | 1982-11-26 | Hitachi Ltd | Manufacture of semiconductor device |
-
1990
- 1990-03-26 JP JP7625190A patent/JPH03276651A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49122973A (en) * | 1973-03-28 | 1974-11-25 | ||
| JPS57192033A (en) * | 1981-05-22 | 1982-11-26 | Hitachi Ltd | Manufacture of semiconductor device |
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