JPH03250692A - Surface mounting method of printed-wiring board - Google Patents
Surface mounting method of printed-wiring boardInfo
- Publication number
- JPH03250692A JPH03250692A JP4596690A JP4596690A JPH03250692A JP H03250692 A JPH03250692 A JP H03250692A JP 4596690 A JP4596690 A JP 4596690A JP 4596690 A JP4596690 A JP 4596690A JP H03250692 A JPH03250692 A JP H03250692A
- Authority
- JP
- Japan
- Prior art keywords
- chip
- adhesive
- solder
- soldering
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims description 19
- 229910000679 solder Inorganic materials 0.000 claims abstract description 39
- 238000005476 soldering Methods 0.000 claims abstract description 28
- 239000000853 adhesive Substances 0.000 claims abstract description 21
- 230000001070 adhesive effect Effects 0.000 claims abstract description 21
- 239000006071 cream Substances 0.000 claims abstract description 15
- 229920001187 thermosetting polymer Polymers 0.000 claims abstract description 6
- 238000002844 melting Methods 0.000 claims abstract description 5
- 230000008018 melting Effects 0.000 claims abstract description 5
- 239000003822 epoxy resin Substances 0.000 abstract description 2
- 238000010438 heat treatment Methods 0.000 abstract description 2
- 229920000647 polyepoxide Polymers 0.000 abstract description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract 1
- 229910052802 copper Inorganic materials 0.000 abstract 1
- 239000010949 copper Substances 0.000 abstract 1
- 238000007598 dipping method Methods 0.000 abstract 1
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 10
- 230000007547 defect Effects 0.000 description 7
- 229910052742 iron Inorganic materials 0.000 description 5
- 238000007654 immersion Methods 0.000 description 4
- 238000007796 conventional method Methods 0.000 description 3
- 238000004806 packaging method and process Methods 0.000 description 3
- 230000002950 deficient Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000008642 heat stress Effects 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 235000019504 cigarettes Nutrition 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3415—Surface mounted components on both sides of the substrate or combined with lead-in-hole components
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、リード付きの部品とチップ部品とを混載した
プリント配線板の表面実装方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a surface mounting method for a printed wiring board on which leaded components and chip components are mixedly mounted.
（発明の背景）
プリント配線板には部品の実装方法が異なる種々の様式
のものがあり、大別すればスルーホール方式のものと、
チップマウント方式のものとに分けられる。(Background of the Invention) There are various types of printed wiring boards with different mounting methods for components, and they can be roughly divided into through-hole type,
It can be divided into chip mount type.
スルーホール方式のプリント配線板は、リード付きの部
品（ディスクリート部品）を、配線板に予め形成してお
いたスルーホールに挿入し、はんだ付けするものであり
、このはんだ付には通常静止浴あるいは噴流浴を用いる
浸漬はんだ付は法が用いられる。With through-hole printed wiring boards, parts with leads (discrete parts) are inserted into through-holes formed in advance on the wiring board and soldered.Soldering is usually done using a static bath or Immersion soldering using a jet bath is used.
チップマウント方式のもののはんだ付けは、リフローは
んだ付は法を用いる場合と、浸漬はんだ付は法を用いる
場合とがある。リフロー法は配線回路上のはんだ付は位
置（チップマウント用バッド）に予めクリームはんだを
塗布しておき、ここにクリームはんだの粘性を利用して
チップ部品を固定した後、電気炉や赤外線炉で加熱溶融
するものである。浸漬はんだ付は法はチップ部品を所定
位置に固定する必要があるため、チップ部品の中央部と
配線板とを接着剤で固着し、接着剤の固まった後溶融は
んだ浴に浸漬してはんだ付けをするものである。For soldering of chip mount type devices, reflow soldering may be used, and immersion soldering may be used. In the reflow method, when soldering on a wiring circuit, cream solder is applied in advance to the position (chip mounting pad), and after fixing the chip parts using the viscosity of the cream solder, the soldering process is performed using an electric furnace or an infrared furnace. It is heated and melted. Immersion soldering requires the chip components to be fixed in place, so the central part of the chip components and the wiring board are fixed with adhesive, and after the adhesive hardens, it is immersed in a molten solder bath and soldered. It is something that does.
一方近年エレクトロニクス製品の小型化が一層進み、ス
ルーホール方式とチップマウント方式とを併用すること
が多くなってきた。On the other hand, in recent years, electronic products have become more compact, and the through-hole method and chip mount method are increasingly being used together.
第２Ａ〜Ｃ図はこの場合のはんだ付は工程を示す図であ
る。この従来方法は、まずプリント配線板１０のチップ
マウント用パッド１２．１２間に熱硬化性接着剤１４を
塗布しＣ第２Ａ［ｇ）、この接着剤１４にチップ部品１
６の中央を接着してその端子を各バッド１２．１２に位
置合せする。そして全体を電気炉内などの加熱雰囲気中
に入れ、この接着剤１４を硬化させる（第２Ｂ図）。次
に配線板１０を表裏反転させ、リード付きのディスクリ
ート部品１８のリード２０．２０をスルーホール２２．
２２に上面から挿入する。この状態で下面を静止溶融は
んだ槽２４に浸漬すれば（第２Ｃ図）、スルーホール２
２．２２内に溶融したはんだが吸込まれ、チップ部品１
６の両端の端子部とバッド１２．１２とにはんだが付着
するものである。2A to 2C are diagrams showing the soldering process in this case. In this conventional method, first, a thermosetting adhesive 14 is applied between the chip mounting pads 12 and 12 of the printed wiring board 10.
Glue the center of 6 and align its terminal with each pad 12.12. Then, the whole is placed in a heated atmosphere such as in an electric furnace to harden the adhesive 14 (FIG. 2B). Next, the wiring board 10 is turned over, and the leads 20.
22 from the top. If the bottom surface is immersed in the stationary molten solder tank 24 in this state (Fig. 2C), the through hole 2
2. The molten solder is sucked into the chip part 1.
Solder is attached to the terminal portions at both ends of 6 and the pads 12 and 12.
しかしこの従来方法には、チップ部品１６とバッド１２
とのはんだ付は部に欠陥が発生し易いという問題があっ
た。その原因は、はんだ付けの際にはんだに含まれたフ
ラックスや、仮止めに用いた接着剤１４などが溶融はん
だの熱により分解してガスを発生し、このガスがチップ
部品１６の周囲、特にバッド１２を覆うように溜るため
である。第２０図中２６はこのガスを示している。However, in this conventional method, the chip component 16 and the pad 12 are
There was a problem in that soldering with 200 mm was easy to cause defects in the parts. The reason for this is that during soldering, the flux contained in the solder and the adhesive 14 used for temporary fixing decompose due to the heat of the molten solder and generate gas, and this gas is released around the chip component 16, especially This is because it accumulates so as to cover the pad 12. 26 in FIG. 20 indicates this gas.
このような欠陥は、チップ部品の実装密度が高まるにつ
れて一層発生しやすくなり、部品実装の高密度化の大き
な障害となっていた。Such defects become more likely to occur as the packaging density of chip components increases, and have become a major hindrance to increasing the density of component packaging.
またこのようなはんだ付けの欠陥があると、その欠陥位
置をはんだゴテにより手作業などではんだ付けを行って
おく必要が生じ、生産性が悪くなるばかりでなく、この
時のはんだゴテの熱によりチップ部品に熱ストレスが加
わり、チップ部品の信頼性が低下するという問題もあっ
た。In addition, if such a soldering defect occurs, it becomes necessary to manually solder the defective position using a soldering iron, which not only reduces productivity but also causes damage due to the heat of the soldering iron at this time. There was also the problem that thermal stress was applied to the chip components, reducing their reliability.
（発明の目的）
本発明はこのような事情に鑑みなされたものであり、リ
ード付き部品とチップ部品との混載する場合に、はんだ
付けの欠陥が発生することがなくなり、高密度実装が可
能になり、またはんだ（−１け欠陥個所のはんだゴテに
よるはんだ付けを行う必要がなくなるために生産性が良
く熱ストレスによるチップ部品の信頼性低下を招くこと
もなくなる、プリント配線板の表面実装方法を提供する
ことを目的とする。(Objective of the Invention) The present invention has been made in view of the above circumstances, and it eliminates the occurrence of soldering defects and enables high-density mounting when leaded components and chip components are mounted together. A surface mounting method for printed wiring boards that eliminates the need to solder or solder (-1) defective areas with a soldering iron, improves productivity, and eliminates the risk of deterioration in reliability of chip components due to heat stress. The purpose is to provide.
（発明の構成）
本発明によればこの目的は、次の構成により達成される
。すなわち、
スルーホールにリード付き部品をはんだ付けし、チップ
マウント用パッドにチップ部品をはんだ付けするプリン
ト配線板の表面実装方法において、
以下の各工程を有することを特徴とするプリント配線板
の表面実装方法：
■前記パッドにクリームはんだを塗布する工程：■前記
パッド間に熱硬化性接着剤を塗布する工程；
■チップ部品を接着剤に仮止めする工程■高温雰囲気中
で、前記接着剤を硬化させチップ部品を固着すると共に
、クリームはんだを溶融してチップ部品をはんだ付けす
る工程
■チップ部品搭載面と反対の面からリード付き部品のリ
ードをスルーホールに挿入し、チップ部品搭載面をはん
だ溶融槽に浸漬しはんだ付けする工程、
により達成される。(Configuration of the Invention) According to the present invention, this object is achieved by the following configuration. That is, a method for surface mounting a printed wiring board in which a leaded component is soldered to a through hole and a chip component is soldered to a chip mounting pad, and the surface mounting method for a printed wiring board is characterized by having the following steps. Method: ■ Step of applying cream solder to the pads: ■ Step of applying thermosetting adhesive between the pads; ■ Step of temporarily fixing the chip components to the adhesive ■ Curing the adhesive in a high temperature atmosphere The process of fixing the chip components and melting the cream solder to solder the chip components ■Insert the lead of the leaded component into the through hole from the opposite side to the chip component mounting surface, and melt the solder on the chip component mounting surface. This is accomplished by a process of immersion in a bath and soldering.
（実施例） 第１Ａ−Ｅ図は本発明の一実施例の断面図である。(Example) Figures 1A-E are cross-sectional views of one embodiment of the present invention.
プリント配線板５０にはスルーホール５２、５２と、チ
ップ部品マウント用パッド５４．５４が設けられている
（第１Ａ図）。ここにパッド５４．５４に予めクリーム
はんだ５６．５６を塗布しておく。この塗布は、例えば
メタルマスクを用いて印刷により行うことができる。次
に両バッド５４．５４間にはエポキシ樹脂などの熱硬化
性接着剤５８を塗布する（第１Ｂ図）。そしてチップ部
品６０の中央付近をこの接着剤５８に接着し、チップ部
品６０の両端子をパッド５４．５４に対向させて仮止め
する（第１Ｃ図）。The printed wiring board 50 is provided with through holes 52, 52 and chip component mounting pads 54, 54 (FIG. 1A). Cream solder 56.56 is applied to the pads 54.54 in advance. This application can be performed, for example, by printing using a metal mask. Next, a thermosetting adhesive 58 such as epoxy resin is applied between the pads 54, 54 (FIG. 1B). Then, the vicinity of the center of the chip component 60 is adhered to the adhesive 58, and both terminals of the chip component 60 are temporarily fixed so as to face the pads 54 and 54 (FIG. 1C).
次にこの配線板５０を電気炉などの高温雰囲気中に入れ
る。接着剤５８はこの熱により硬化する（第１Ｄ図）。Next, this wiring board 50 is placed in a high temperature atmosphere such as an electric furnace. The adhesive 58 is cured by this heat (FIG. 1D).
この時クリームはんだ５６．５６も同時に加熱されて溶
融し、チップ部品６０もパッド５４．５４にはんだ付け
される。図中６２はこのはんだ付は部を示す。At this time, the cream solder 56.56 is also heated and melted at the same time, and the chip component 60 is also soldered to the pad 54.54. In the figure, 62 indicates this soldering part.
配線板５０は表裏反転され、リード付き部品６４の各リ
ード６６．６６が上面からスルーホール５２．５２に挿
入され、さらに静止溶融はんだ槽６８に浸漬される（第
１Ｅ図）。この結果溶融はんだがスルーホール５２．５
２内に吸い上げられる。この時万−ガスの発生があって
ガスがパッド５４を覆っても、チップ部品６０はすてに
第１Ｄ図の工程においてはんだ６２によってはんだ付け
が済んでいるから、チップ部品６０のはんだ付けに欠陥
が生じるおそれはない。The wiring board 50 is turned over, each lead 66, 66 of the leaded component 64 is inserted from the top into the through hole 52, 52, and further immersed in the static molten solder bath 68 (FIG. 1E). As a result, the molten solder flows through the hole 52.5.
It is absorbed into 2. At this time, even if gas is generated and the gas covers the pad 54, the chip component 60 has already been soldered with the solder 62 in the process shown in FIG. There is no risk of defects occurring.
以上の実施例は静止溶融はんだ槽６６を用いているが、
噴流はんだ槽など、だの様式のはんだ槽であってもよい
。Although the above embodiment uses a stationary melting solder bath 66,
It may also be a solder bath in the form of a dash, such as a jet solder bath.
（発明の効果）
本発明は以上のように、チップ部品マウント用バッドに
予めクリームはんだを塗布しておく一方、チップ部品を
熱硬化性接着剤によって接着仮止めし、接着剤を加熱に
より硬化する時にクリームはんだも同時に溶融してチッ
プ部品をパッドにはんだ付けしておく。その後リード付
き部品をスルーホールに挿入して溶融はんだ槽に浸漬す
るものであるから、溶融はんだ槽への浸漬時に、はんだ
などから発生するガスが付着しても、チップ部品とパッ
ドとは既にクリームはんだによりはんだ付けが済んでい
るからチップ部品のはんだ付けに欠陥が生じることがな
い。従って高密度実装が可能になる。またこの欠陥があ
った時にはんだゴテによるはんだだ付けをする必要が生
じるから、生産性が低下し、はんだゴテによる熱ストレ
スがチップ部品の信頼性の低下を招くことになるが、本
発明によればこのような不都合がない。(Effects of the Invention) As described above, the present invention applies cream solder to the chip component mounting pad in advance, temporarily bonds the chip components with a thermosetting adhesive, and hardens the adhesive by heating. Sometimes cream solder is also melted at the same time to solder the chip components to the pads. After that, the leaded component is inserted into the through hole and immersed in the molten solder bath, so even if gas generated from solder adheres to the chip component and the pad, the cream has already formed. Since soldering is already done with solder, there are no defects in the soldering of chip components. Therefore, high-density packaging is possible. Furthermore, when this defect occurs, it becomes necessary to perform soldering using a soldering iron, which reduces productivity, and the heat stress caused by the soldering iron causes a reduction in the reliability of chip components. There are no inconveniences like cigarettes.
第１Ａ〜Ｅ図は本発明の一実施例の断面図、第２Ａ〜Ｃ
図は従来方法の工程を示す図である。
５０・・・プリント配線板、
５２・・・スルーホール、 ５４・・・パッド、５６・
・・クリームはんだ、５８・・・接着剤、６０・・・チ
ップ部品、
６２・・・はんだ付は部、
６４・・・リード付き部品、
６６・・・リード。1A to 1E are cross-sectional views of an embodiment of the present invention, and 2A to C are sectional views of an embodiment of the present invention.
The figure is a diagram showing the steps of a conventional method. 50... Printed wiring board, 52... Through hole, 54... Pad, 56...
... Cream solder, 58 ... Adhesive, 60 ... Chip parts, 62 ... Soldering parts, 64 ... Parts with leads, 66 ... Leads.
Claims (1)
プマウント用パッドにチップ部品をはんだ付けするプリ
ント配線板の表面実装方法において、 以下の各工程を有することを特徴とするプリント配線板
の表面実装方法： （ａ）前記パッドにクリームはんだを塗布する工程；（
ｂ）前記パッド間に熱硬化性接着剤を塗布する工程； （ｃ）チップ部品を接着剤に仮止めする工程；（ｄ）高
温雰囲気中で、前記接着剤を硬化させチップ部品を固着
すると共に、クリームはんだを溶融してチップ部品をは
んだ付けする工程； （ｅ）チップ部品搭載面と反対の面からリード付き部品
のリードをスルーホールに挿入し、チップ部品搭載面を
はんだ溶融槽に浸漬しはんだ付けする工程。[Claims] A surface mounting method for a printed wiring board in which leaded components are soldered to through holes and chip components are soldered to chip mounting pads, the printed wiring characterized by having the following steps: Board surface mounting method: (a) Step of applying cream solder to the pad; (
b) Applying a thermosetting adhesive between the pads; (c) Temporarily fixing the chip components to the adhesive; (d) Curing the adhesive and fixing the chip components in a high temperature atmosphere; , the process of melting the cream solder and soldering the chip components; (e) Inserting the leads of the leaded component into the through hole from the opposite side to the chip component mounting surface, and immersing the chip component mounting surface in a solder melting bath. The process of soldering.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4596690A JPH03250692A (en) | 1990-02-28 | 1990-02-28 | Surface mounting method of printed-wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4596690A JPH03250692A (en) | 1990-02-28 | 1990-02-28 | Surface mounting method of printed-wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03250692A true JPH03250692A (en) | 1991-11-08 |
Family
ID=12733979
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4596690A Pending JPH03250692A (en) | 1990-02-28 | 1990-02-28 | Surface mounting method of printed-wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03250692A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110662365A (en) * | 2019-09-25 | 2020-01-07 | 安徽熙泰智能科技有限公司 | Micro-display wire welding method and wire welding equipment |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6125669A (en) * | 1984-07-13 | 1986-02-04 | Natl House Ind Co Ltd | Method for filling caulking material into joint part of facing material |
-
1990
- 1990-02-28 JP JP4596690A patent/JPH03250692A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6125669A (en) * | 1984-07-13 | 1986-02-04 | Natl House Ind Co Ltd | Method for filling caulking material into joint part of facing material |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110662365A (en) * | 2019-09-25 | 2020-01-07 | 安徽熙泰智能科技有限公司 | Micro-display wire welding method and wire welding equipment |
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