JPS63177584A - Assembly of hybrid integrated circuit - Google Patents

Assembly of hybrid integrated circuit

Info

Publication number
JPS63177584A
JPS63177584A JP62009243A JP924387A JPS63177584A JP S63177584 A JPS63177584 A JP S63177584A JP 62009243 A JP62009243 A JP 62009243A JP 924387 A JP924387 A JP 924387A JP S63177584 A JPS63177584 A JP S63177584A
Authority
JP
Japan
Prior art keywords
chip components
flux
board
chip
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62009243A
Other languages
Japanese (ja)
Inventor
鳥羽 進
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP62009243A priority Critical patent/JPS63177584A/en
Publication of JPS63177584A publication Critical patent/JPS63177584A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81905Combinations of bonding methods provided for in at least two different groups from H01L2224/818 - H01L2224/81904
    • H01L2224/81907Intermediate bonding, i.e. intermediate bonding step for temporarily bonding the semiconductor or solid-state body, followed by at least a further bonding step

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 この発明は、回路基板の表裏両面にチップ部品を搭載し
、これらチップ部品をはんだリフロー法により一括して
回路基板にはんだ付けして成る混成集積回路の組立方法
に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for assembling a hybrid integrated circuit, in which chip components are mounted on both the front and back surfaces of a circuit board, and these chip components are soldered to the circuit board all at once using a solder reflow method.

〔従来の技術〕[Conventional technology]

頭記のように回路基板の表裏両面にチップ部品を搭載し
てはんだリフロー法により一括はんだ付けする際には、
特に基板の裏面側に搭載したチップ部品がはんだ付は工
程の際に脱落するのを防止するために、あらかじめチッ
プ部品を基板上に仮止め保持しておく必要がある。この
仮止め手段として従来では一般に接着剤を使用してチッ
プ部品を基板上に仮止め固定している。
As mentioned above, when mounting chip components on both the front and back sides of a circuit board and soldering them all at once using the solder reflow method,
In particular, in order to prevent chip components mounted on the back side of the board from falling off during the soldering process, it is necessary to temporarily hold the chip components on the board in advance. Conventionally, as this temporary fixing means, an adhesive is generally used to temporarily fix the chip component on the substrate.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

ところで、上記のように回路基板上へのチップ部品の仮
止め手段として接着剤を使用した方法では次記のような
問題点がある。すなわち、(1)基板上にチップ部品を
搭載した状態で接着剤を硬化させるために、特別に接着
剤硬化工程が必要となる。
However, the method of using an adhesive as a temporary fixing means for chip components on a circuit board as described above has the following problems. That is, (1) a special adhesive curing process is required in order to cure the adhesive with the chip component mounted on the substrate.

(2)チップ部品が接着剤で基板上に固定されていると
、続くはんだリフロ一工程で溶融したはんだの表面張力
によるセルフアライメント効果が阻害され、はんだ付は
部の仕上がり状態が不安定となる。
(2) If the chip components are fixed on the board with adhesive, the self-alignment effect due to the surface tension of the molten solder during the subsequent solder reflow process will be inhibited, and the finished state of the soldered parts will be unstable. .

(3)チップ部品のはんだ付は後も接着剤は除去されず
にチップ部品を固着したままの状態にあるため、製品使
用時の熱サイクルにより基板とチップ部品との間のはん
だ付は部に接着剤に起因する熱応力が加わってはんだ付
は部が剥離するおそれがある。
(3) Even after soldering of chip components, the adhesive is not removed and the chip components remain fixed, so the soldering between the board and the chip components may deteriorate due to the heat cycle during product use. There is a risk that soldered parts may peel off due to thermal stress caused by the adhesive.

なお前記した接着剤による仮止め方法の他にチップ部品
をはんだペーストのみで仮止め保持させる方法も一部で
実施されているが、特に基板の裏面側に搭載したチップ
部品ははんだリフロ一工程の途中ではんだペーストが溶
融した際に重量の重いチップ部品がその重みで脱落して
しまうことがあり不具合が派生する。
In addition to the above-mentioned temporary fixing method using adhesive, some methods have also been implemented in which chip components are temporarily fixed using only solder paste, but chip components mounted on the back side of the board are particularly difficult to use in the soldering reflow process. When the solder paste melts during the process, the weight of the heavy chip components may cause them to fall off, causing problems.

この発明の目的は、接着剤のようにチップ部品を基板上
に強固に固着せず、かつはんだ付は後に容易に除去でき
る仮止め材を使用して基板の裏面側に搭載するチップ部
品を所定位置に仮止め保持することにより、はんだ付は
部に悪影響を及ぼすことなく基板の表裏両面に搭載した
チップ部品を基板へ一括はんだ付けできるようにした安
価で信頌性の高い混成集積回路の組立方法を提供するこ
とにある。
The object of this invention is to use a temporary fixing material that does not firmly fix chip components on a board like adhesives, but can be easily removed after soldering, to secure chip components to be mounted on the back side of the board. Assembling a low-cost and highly reliable hybrid integrated circuit that allows chip components mounted on both the front and back surfaces of the board to be soldered to the board at once by temporarily holding them in place without adversely affecting the soldering parts. The purpose is to provide a method.

〔問題点を解決するための手段〕[Means for solving problems]

上記問題点を解決するために、この発明によれば、回路
基板の裏面側におけるチップ部品搭載位置に合わせて該
箇所にチップ部品を仮止めするペースト状のはんだ用フ
ラックスを塗布する工程と、前記フラックスの塗布面上
にチップ部品を搭載して仮止めする工程と、回路基板の
表面を上向きにしてこの基板上にチップ部品を搭載する
工程と、前記工程で回路基板の表裏両面に搭載した各チ
ップ部品をはんだリフロー法により一括してはんだ付け
する工程と、前記フラックスを洗浄して除去する工程と
を経て混成集積回路を組み立てるものとする。
In order to solve the above-mentioned problems, according to the present invention, there is provided a step of applying paste-like solder flux for temporarily fixing the chip component at the location on the back side of the circuit board in accordance with the location where the chip component is mounted; A process of mounting and temporarily fixing the chip components on the flux coated surface, a process of mounting the chip components on the circuit board with the surface facing upward, and a process of mounting the chip components on both the front and back sides of the circuit board in the above process. A hybrid integrated circuit is assembled through a step of soldering the chip components all at once using a solder reflow method and a step of cleaning and removing the flux.

〔作用〕[Effect]

上記のように基板上に塗布したペースト状のはんだ用フ
ラックス層を挟んでチップ部品を回路基板に搭載するこ
とにより、チップ部品は粘度の高いフラックスの粘着力
によりその位置に安定よく仮止め保持されるようになる
。またフラックスは接着剤のように硬化せずペースト状
を保っているので、はんだリフロ一工程の際にはんだ付
は部のセルフアライメント効果を極端に妨げることがな
い、しかもフラックスはチップ部品はんだ付は後の洗浄
工程で容易に除去される。
By mounting the chip components on the circuit board across the paste-like solder flux layer applied to the board as described above, the chip components are stably and temporarily held in place by the adhesive force of the highly viscous flux. Become so. In addition, since flux does not harden like adhesives and remains in a paste state, it does not significantly impede the self-alignment effect of soldering parts during the soldering reflow process. Easily removed in a subsequent cleaning step.

〔実施例〕〔Example〕

第1図はこの発明の実施例による混成集積回路の組立工
程図、第2図ないし第4図はそれぞれ第1図の組立工程
における途中段階での組立状態図を示すものであり、図
中1は回路基板、1a+ lbは基板1の表面および裏
面、2はペースト状のはんだ用フラックス、3は回路基
板1の表裏両面に形成された導体パターン上の所定箇所
にあらかじめ印刷されたはんだペースト、4は回路基板
1の表面側に実装されるチップ部品、5は回路基板1の
裏面側に実装されるチップ部品、5aはチップ部品5の
接続リードである。
FIG. 1 is an assembly process diagram of a hybrid integrated circuit according to an embodiment of the present invention, and FIGS. 2 to 4 are assembly state diagrams at intermediate stages in the assembly process of FIG. 1a+lb is a circuit board, 1a+lb is the front and back sides of the board 1, 2 is a paste-like solder flux, 3 is a solder paste pre-printed at a predetermined location on the conductor pattern formed on both the front and back sides of the circuit board 1, 4 5 is a chip component mounted on the front side of the circuit board 1, 5 is a chip component mounted on the back side of the circuit board 1, and 5a is a connection lead of the chip component 5.

次に混成集積回路の組立方法に付いて説明すると、まず
第1図の工程Iで基板1の裏面1bを上向きにし、この
状態でチップ部品5が搭載される位置に合わせて基板上
にペースト状のはんだ用フラックス2が適量宛塗布され
る(第2図)、なおこのフラックス2は、例えばディス
ペンサ塗布法により自動工程で行われる。
Next, to explain the method for assembling a hybrid integrated circuit, first, in step I of FIG. An appropriate amount of solder flux 2 is applied (FIG. 2). This flux 2 is applied in an automatic process, for example, by a dispenser application method.

次に工程■では前記工程!で塗布されたフラックス2の
塗布面上にチップ部品5を搭載して軽(押し付け、フラ
ックス2の粘着力によりチップ部品5をその位置に仮止
め固定する(第3図)、なおこの状態ではチップ部品5
の接続リード5aがはんだペースト3に接している。続
いて工程■に移り、チップ部品5を仮止め支持したまま
の状態で基板全体を温度80〜140℃8時間1〜20
分程度で加熱乾燥し、フラックス2に含まれているアル
コール系溶剤を除去してフラックスの粘度を上げ、チッ
プ部品5との結着力を高める。またこの加熱乾燥により
、後段で行うはんだリフロ一工程の際にフラックス2の
沸騰、溶剤の飛散が生じるのを防止し、基板1の下面側
に搭載されているチップ部品5を脱落させることなく安
定保持させることができるようになる。
Next, step ■ is the step mentioned above! Mount the chip component 5 on the coated surface of the flux 2, and use the adhesive force of the flux 2 to temporarily fix the chip component 5 in that position (Fig. 3). Part 5
The connecting lead 5a is in contact with the solder paste 3. Next, proceed to step (2), where the entire board is heated at a temperature of 80 to 140°C for 8 hours 1 to 20 minutes while the chip component 5 is temporarily supported.
The flux is dried by heating for about a minute to remove the alcoholic solvent contained in the flux 2, increase the viscosity of the flux, and increase the bonding force with the chip component 5. In addition, this heating and drying prevents boiling of the flux 2 and scattering of the solvent during the solder reflow process performed later, and stabilizes the chip components 5 mounted on the bottom side of the board 1 without falling off. You will be able to hold it.

ここで回路基板10表裏を引っ繰り返し、工程■では基
板1の表面1aを上向きにした状態で基板上の所定箇所
に既に印刷済みのはんだペースト3の上にチップ部品4
を搭載する(第4図)。
Here, the circuit board 10 is turned over again, and in step (2), with the front surface 1a of the board 1 facing upward, a chip component 4 is placed on the solder paste 3 that has already been printed at a predetermined location on the board.
(Figure 4).

上記工程で基板1の表裏両面にチップ部品4゜5が搭載
されると、次の工程Vでは基板1の表面1aを上向きに
したままの姿勢で仮組立体の全体をリフロー炉内に搬入
し、はんだリフロー法により各チップ部品4,5を一括
して基板1にはんだ付けする。なおこのはんだリフロ一
工程の過程でもフラックス2は粘着力を維持しているの
で、基板1の裏面側に搭載したチップ部品が自重で脱落
することがない。
After the chip components 4°5 are mounted on both the front and back sides of the board 1 in the above process, in the next step V, the entire temporary assembly is carried into a reflow oven with the front surface 1a of the board 1 facing upward. Then, the chip components 4 and 5 are collectively soldered to the substrate 1 by a solder reflow method. Note that since the flux 2 maintains its adhesive strength even during this solder reflow process, the chip components mounted on the back side of the substrate 1 will not fall off due to their own weight.

上記のはんだ付は工程の後に、続く工程■で洗浄工程に
移り、はんだ付は部の残渣を含めて同時にいままでチッ
プ部品5を仮止め保持していたフラックス2を除去する
。なおこの洗浄工程は在来のはんだ付は部洗浄設備をそ
のまま利用して行われる0以上で混成集積回路の全組立
工程が終了する。
After the above-mentioned soldering process, a cleaning process is carried out in the following process (2), and at the same time, the flux 2 that has temporarily held the chip component 5 is removed, including the soldering part residue. Note that this cleaning process is performed by using conventional soldering cleaning equipment as is, and the entire assembly process of the hybrid integrated circuit is completed when the soldering process is 0 or more.

〔発明の効果〕〔Effect of the invention〕

以上述べたようにこの発明によれば、回路基板の裏面側
におけるチップ部品搭載位置に合わせて該箇所にチップ
部品を仮止めするペースト状のはんだ用フラックスを塗
布する工程と、前記フラックスの塗布面上にチップ部品
を搭載して仮止めする工程と、回路基板の表面を上向き
にしてこの基板上にチップ部品を搭載する工程と、前記
工程で回路基板の表裏両面に搭載した各チップ部品をは
んだリフロー法により一括してはんだ付けする工程と、
前記フラックスを洗浄して除去する工程とを経て回路を
組み立てるようにしたことにより、安価に入手できるは
んだ用フラックスの持つ粘着力を利用してチップ部品を
安定よく回路基板の裏面側に仮止め保持させることがで
き、かつ従来の接着剤による仮止め固定手段のようには
んだリフロ一時における溶融はんだの表面張力によるチ
ップ部品のセルフアライメント効果を妨げることがなく
、しかも既設のはんだ付は洗浄設備をそのまま活用して
はんだ付は後にフラックスを洗浄除去し得る等、複雑な
工程、設備を必要とすることなしに回路基板の表裏両面
に搭載したチップ部品を一括はんだ付けして回路を組み
立てることができる。
As described above, according to the present invention, there are a step of applying a paste-like soldering flux for temporarily fixing the chip components to the chip component mounting position on the back side of the circuit board; There is a process of mounting and temporarily fixing chip components on top of the circuit board, a process of mounting chip components on this board with the surface of the circuit board facing upward, and a process of soldering each chip component mounted on both the front and back sides of the circuit board in the above process. A process of soldering all at once using the reflow method,
By assembling the circuit through the process of cleaning and removing the flux, the chip components can be stably held temporarily on the back side of the circuit board by utilizing the adhesive strength of the inexpensively available soldering flux. It also does not interfere with the self-alignment effect of chip components due to the surface tension of molten solder during temporary solder reflow, unlike conventional temporary fixing methods using adhesives.Furthermore, the existing soldering and cleaning equipment can be used as is. The flux can be washed and removed after soldering, and circuits can be assembled by collectively soldering chip components mounted on both the front and back sides of a circuit board without requiring complicated processes or equipment.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明実施例による混成集積回路の組立工程の
フロー図、第2図ないし第4図はそれぞれ第1図におけ
る工程1.n、IVの組立状態図である。各図において
、 1:回路基板、1a:基板の表面、1b;基板の裏面、
2:はんだ用フラックス、3:はんだペースト、4.5
:チップ部品。 第1図
FIG. 1 is a flowchart of the assembly process of a hybrid integrated circuit according to an embodiment of the present invention, and FIGS. 2 to 4 respectively show steps 1 to 4 in FIG. FIG. In each figure, 1: circuit board, 1a: front side of the board, 1b: back side of the board,
2: Solder flux, 3: Solder paste, 4.5
: Chip parts. Figure 1

Claims (1)

【特許請求の範囲】 1)回路基板の表裏両面にチップ部品を搭載し、これら
チップ部品をはんだリフロー法により基板へ一括しては
んだ付けする混成集積回路の組立方法であって、回路基
板の裏面側におけるチップ部品搭載位置に合わせて該箇
所にチップ部品を仮止めするペースト状のはんだ用フラ
ックスを塗布する工程と、前記フラックスの塗布面上に
チップ部品を搭載して仮止めする工程と、回路基板の表
面を上向きにしてこの基板上にチップ部品を搭載する工
程と、前記工程で回路基板の表裏両面に搭載した各チッ
プ部品をはんだリフロー法によりはんだ付けする工程と
、前記フラックスを洗浄して除去する工程とを経て回路
を組み立てることを特徴とする混成集積回路の組立方法
。 2)特許請求の範囲第1項記載の組立方法において、回
路基板の裏面側にチップ部品を搭載した状態でチップ部
品を仮止めしているフラックスを加熱乾燥することを特
徴とする混成集積回路の組立方法。
[Scope of Claims] 1) A method for assembling a hybrid integrated circuit in which chip components are mounted on both the front and back sides of a circuit board and these chip components are soldered to the board all at once using a solder reflow method, the method comprising: A step of applying paste-like solder flux to temporarily fix the chip component to the chip component mounting position on the side, a step of mounting the chip component on the surface coated with the flux and temporarily fixing the chip component, A process of mounting chip components on the board with the surface of the circuit board facing upward, a process of soldering each chip component mounted on both the front and back sides of the circuit board in the above process by a solder reflow method, and a process of cleaning the flux. 1. A method for assembling a hybrid integrated circuit, which comprises assembling a circuit through a step of removing the circuit. 2) The method for assembling a hybrid integrated circuit according to claim 1, characterized in that the flux temporarily fixing the chip components is heated and dried while the chip components are mounted on the back side of the circuit board. Assembly method.
JP62009243A 1987-01-19 1987-01-19 Assembly of hybrid integrated circuit Pending JPS63177584A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62009243A JPS63177584A (en) 1987-01-19 1987-01-19 Assembly of hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62009243A JPS63177584A (en) 1987-01-19 1987-01-19 Assembly of hybrid integrated circuit

Publications (1)

Publication Number Publication Date
JPS63177584A true JPS63177584A (en) 1988-07-21

Family

ID=11714964

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62009243A Pending JPS63177584A (en) 1987-01-19 1987-01-19 Assembly of hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPS63177584A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03136297A (en) * 1989-10-20 1991-06-11 Matsushita Electric Ind Co Ltd Mounting of electronic component
JP2010245126A (en) * 2009-04-01 2010-10-28 Denso Corp Both-side simultaneous reflow soldering method
KR20160118984A (en) * 2015-04-02 2016-10-12 헤레우스 도이칠란트 게엠베하 운트 코. 카게 A method for the manufacture of a substrate arrangement, a substrate arrangement, a method for bonding an electronic component with a substrate arrangement, and an electronic component

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60149193A (en) * 1984-01-14 1985-08-06 石井 銀弥 Flux composition for screen printing

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60149193A (en) * 1984-01-14 1985-08-06 石井 銀弥 Flux composition for screen printing

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03136297A (en) * 1989-10-20 1991-06-11 Matsushita Electric Ind Co Ltd Mounting of electronic component
JP2010245126A (en) * 2009-04-01 2010-10-28 Denso Corp Both-side simultaneous reflow soldering method
KR20160118984A (en) * 2015-04-02 2016-10-12 헤레우스 도이칠란트 게엠베하 운트 코. 카게 A method for the manufacture of a substrate arrangement, a substrate arrangement, a method for bonding an electronic component with a substrate arrangement, and an electronic component
CN106057690A (en) * 2015-04-02 2016-10-26 贺利氏德国有限及两合公司 Substrate structure, manufacturing method thereof, electronic component and a method for bonding electronic component with a substrate structure
JP2016197723A (en) * 2015-04-02 2016-11-24 ヘレウス ドイチェラント ゲーエムベーハー ウント カンパニー カーゲー Method for manufacturing board structure, board structure, method for bonding electronic component to board structure, and electronic component

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