JP2016197723A - Method for manufacturing board structure, board structure, method for bonding electronic component to board structure, and electronic component - Google Patents

Method for manufacturing board structure, board structure, method for bonding electronic component to board structure, and electronic component Download PDF

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Publication number
JP2016197723A
JP2016197723A JP2016074054A JP2016074054A JP2016197723A JP 2016197723 A JP2016197723 A JP 2016197723A JP 2016074054 A JP2016074054 A JP 2016074054A JP 2016074054 A JP2016074054 A JP 2016074054A JP 2016197723 A JP2016197723 A JP 2016197723A
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Japan
Prior art keywords
substrate
electronic component
initial
binder
sticking agent
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JP2016074054A
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Japanese (ja)
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JP6347798B2 (en
Inventor
シェーファー ミヒャエル
Michael Schaefer
シェーファー ミヒャエル
シュミット ウォルフガング
Wolfgang Schmidt
シュミット ウォルフガング
ハインリック アンドレアス
Hinrich Andreas
ハインリック アンドレアス
イサベル バレラ−マリン マリア
Isabel Barrera-Marin Maria
イサベル バレラ−マリン マリア
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Heraeus Deutschland GmbH and Co KG
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Heraeus Deutschland GmbH and Co KG
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Publication of JP2016197723A publication Critical patent/JP2016197723A/en
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Publication of JP6347798B2 publication Critical patent/JP6347798B2/en
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Abstract

PROBLEM TO BE SOLVED: To provide adhesiveness sufficient for improving the reliability when transporting an electronic component from the mounted position to a sintered position.SOLUTION: In a method for bonding an electronic component 50 to a board structure 10, the board structure 10 is removed from a support member by using a nozzle 40, positioned on the electronic component 50, and the first surface 22 of a board 20 is arranged oppositely to the electronic component 50. The nozzle 40 acts on the second surface 23 of the board 20. The board structure 10 is set on the electronic component 50, and since only an initial sticking agent 30 is in contact with the electronic component 50, a gap is formed between a bonding material 25 and the component 50.SELECTED DRAWING: Figure 7

Description

本発明は、電子部品を結合するための基板構造を製造するための方法に関する。さらに、本発明は、電子部品と結合するための基板構造に関する。本発明は、さらに、電子部品を基板構造と結合するための方法に関する。本発明はまた、電子部品を基板と結合するための方法に関する。さらに、本発明は、基板構造と結合する電子部品に関する。   The present invention relates to a method for manufacturing a substrate structure for bonding electronic components. The invention further relates to a substrate structure for coupling with electronic components. The invention further relates to a method for coupling an electronic component with a substrate structure. The invention also relates to a method for bonding an electronic component with a substrate. Furthermore, the present invention relates to an electronic component that is coupled to a substrate structure.

パワーエレクトロニクスにおいて、例えば顧客によってのみ適用される必要のある、乾燥焼結ペーストを備えた基板または構成要素を準備することは既知の技術である。生産処理において、構成要素、特に最初に乾燥された焼結ペーストで基板に取り付けられる電子部品は、当該構成要素を、取り付けられた場所から焼結される場所に搬送している間にスリップする可能性がある。   In power electronics, for example, it is a known technique to prepare a substrate or component with a dry sintered paste that only needs to be applied by the customer. In the production process, components, especially electronic components that are attached to the substrate with the initially dried sintered paste, can slip while transporting the component from the installed location to the location where it is sintered. There is sex.

この点において、構成要素が、特に電子部品が、熱を同時に適用しつつ乾燥焼結ペースト上にセットされることは既知の技術である。多くの電子部品に対して、熱を加えることによるそのような装着が不適切な搬送ロバスト性のみをもたらすことがわかっている。これは、曲がった構成要素、および／または汚染された表面、および／または不適当な表面のため、電子部品が、装着された場所から焼結された位置への搬送の信頼性を高めることを可能にするには接着性が不充分であるためである。したがって、装着はされているが、マスクもしくは金型によって未だはんだ付けまたは焼結されていない電子部品を固定すること、またはバネによって時間のかかる方法で電子部品をクランプすることは既知の技術である。   In this respect, it is a known technique that the components, in particular the electronic components, are set on the dry sintered paste while simultaneously applying heat. For many electronic components, it has been found that such mounting by applying heat only results in inadequate transport robustness. This is because of the bent components and / or contaminated surfaces and / or improper surfaces, the electronic components can be transported more reliably from the mounted location to the sintered position. This is because the adhesiveness is insufficient to make it possible. It is therefore a known technique to fix an electronic component that has been mounted but not yet soldered or sintered by means of a mask or mold, or to clamp the electronic component in a time-consuming manner by means of a spring. .

前記先行技術に基づいて、本発明の目的は、電子部品と結合するための基板構造を製造する方法を明示することであり、電子部品が、装着された場所から焼結される位置に搬送されている間、充分な搬送ロバスト性がもたらされることである。   Based on the above prior art, the object of the present invention is to specify a method of manufacturing a substrate structure for bonding with an electronic component, where the electronic component is transported from a mounted location to a position where it is sintered. While providing sufficient transport robustness.

さらに、本発明の目的は、電子部品と結合するための基板構造を明示することであり、基板構造は、装着はされているが、未だはんだ付けまたは焼結されていない構成が、基板構造上で充分な搬送ロバスト性を有するよう設計される。   Furthermore, an object of the present invention is to clearly show a substrate structure for coupling with an electronic component, and the substrate structure is mounted but not yet soldered or sintered. It is designed to have sufficient transport robustness.

さらに、本発明の目的は、電子部品を基板と結合するための方法を明示することである。さらに、本発明の目的は、基板構造と結合される電子部品を明示することである。   Furthermore, it is an object of the present invention to specify a method for bonding an electronic component with a substrate. Furthermore, it is an object of the present invention to specify the electronic components that are coupled to the substrate structure.

本発明によれば、前記目的は、電子部品と結合するための基板構造を製造するための方法に関して、請求項１の発明の主題により実現され、基板構造に関して、請求項９の発明の主題により実現され、電子部品を基板構造と結合するための方法に関して、請求項１７の発明の主題により実現され、電子部品を基板と結合する方法に関して、請求項２２の発明の主題により実現され、電子部品に関して、請求項３１の発明の主題により実現される。   According to the invention, the object is achieved by the subject matter of claim 1 with respect to a method for manufacturing a substrate structure for coupling with an electronic component, and by the subject matter of claim 9 with respect to a substrate structure. Realized and realized by the subject matter of the invention of claim 17 with respect to a method for coupling an electronic component with a substrate structure, and realized with the subject matter of claim 22 with respect to a method of coupling an electronic component with a substrate. Is realized by the subject matter of claim 31.

本発明は、電子部品と結合するための基板構造を製造する方法を明示するという概念に基づいており、そのような方法は、以下のステップ、すなわち、
第１の面および第２の面を有する基板、特に、ＤＣＢ基板、ＰＣＢ基板、またはリードフレームを準備するステップ、
基板の第１の面のいくつかの部分上へ初期固着剤を塗布するステップを含む。 The present invention is based on the concept of specifying a method for manufacturing a substrate structure for bonding with an electronic component, such a method comprising the following steps:
Providing a substrate having a first surface and a second surface, in particular a DCB substrate, a PCB substrate or a lead frame;
Applying an initial sticking agent onto some portions of the first side of the substrate.

本発明の方法を用いて製造された基板構造は、電子部品とのその後の結合を可能にするよう機能する。   The substrate structure manufactured using the method of the present invention functions to allow subsequent bonding with electronic components.

本発明の方法の実施形態の好ましい形式において、結合材が、特に、初期固着剤を塗布する前に、基板の第１の面のいくつかの部分上に塗布される。結合材は、基板の第１の面を完全にはカバーしない。初期固着剤および結合材の両方が、基板の第１の面上に塗布される。   In a preferred form of embodiment of the method of the present invention, a binder is applied on several portions of the first side of the substrate, particularly before applying the initial sticking agent. The binder does not completely cover the first side of the substrate. Both the initial sticking agent and the binder are applied on the first side of the substrate.

結合材は焼結ペーストであり、特に、銀を含む焼結ペースト、はんだ、導電接着剤、または接着膜であり、基板を電子部品と実際に接着させるよう機能する。初期固着剤は、初期固着、すなわち、基板を電子部品上に、または電子部品を基板上に、一時的に取り付けるためにのみ機能する。初期固着、すなわち付着を用いて、構成要素が、装着された場所から焼結される位置に搬送されるのに充分な特性を生成する。初期固着剤は、仮固着剤である。言い換えると、初期固着剤は、基板構造、すなわち基板と、電子部品との一時的な固着を可能にする固着剤である。   The binder is a sintered paste, and in particular, a sintered paste containing silver, solder, a conductive adhesive, or an adhesive film, and functions to actually bond the substrate to the electronic component. The initial sticking agent functions only for initial sticking, i.e., temporarily mounting the substrate on the electronic component or the electronic component on the substrate. Initial sticking, or adhesion, is used to generate sufficient properties for the component to be transported from its place of attachment to a location where it is sintered. The initial sticking agent is a temporary sticking agent. In other words, the initial adhesive agent is an adhesive agent that enables temporary fixation between the substrate structure, that is, the substrate and the electronic component.

初期固着剤は、はんだおよび／または接着剤の形態とすることができる。特に、初期固着剤は、２０〜４５重量％の熱可塑性ポリマー、４０〜７０重量％の有機溶媒、１０〜２５重量％の無機充填剤粒子、および０〜０．５重量％の他の添加物を含む接着剤である。   The initial sticking agent can be in the form of solder and / or adhesive. In particular, the initial sticker is 20-45 wt% thermoplastic polymer, 40-70 wt% organic solvent, 10-25 wt% inorganic filler particles, and 0-0.5 wt% other additives. It is an adhesive containing.

初期固着剤の熱可塑性ポリマーは、例えば、ガラス転移温度が６０〜１２０℃である。ガラス転移温度の決定は、ＤＤＣによって、すなわちダイナミック差熱量測定によって、またはＤＳＣによって、すなわち示差走査熱量測定によって、加熱速度１０Ｋ／分で実行される。   The thermoplastic polymer of the initial fixing agent has, for example, a glass transition temperature of 60 to 120 ° C. The determination of the glass transition temperature is carried out at a heating rate of 10 K / min by DDC, ie by dynamic differential calorimetry, or by DSC, ie by differential scanning calorimetry.

熱可塑性ポリマーは、特に（メタ）アクリル共重合体の形態とすることができる。熱可塑性（メタ）アクリル共重合体のモル質量範囲は、３５０００〜７００００ｇ／ｍｏｌ（Ｍｗ＝３５０００〜７００００ｇ／ｍｏｌ）とすることができる。モル質量範囲は、ゲル浸透クロマトグラフィー（ＧＰＣ）により決定する。ゲル浸透クロマトグラフィーに対して、以下、すなわち、固定相としてのポリスチロールゲル、移動相としてのテトラヒドロフラン、ポリスチロール基準を適用する。   The thermoplastic polymer can be in particular in the form of a (meth) acrylic copolymer. The molar mass range of the thermoplastic (meth) acrylic copolymer can be 35000-70000 g / mol (Mw = 35000-70000 g / mol). The molar mass range is determined by gel permeation chromatography (GPC). For gel permeation chromatography, the following applies: polystyrene gel as stationary phase, tetrahydrofuran as mobile phase, polystyrene standards.

４０〜７０重量％の有機溶媒は、３０〜１００重量％のテルピネオールを含む。   40-70% by weight of the organic solvent contains 30-100% by weight of terpineol.

１０〜２５重量％の無機充填剤粒子は、５〜２０μｍの、好ましくは５〜１０μｍの粒子サイズ（ｄ５０）を有する。前記無機充填剤粒子は、例えば酸化アルミニウムおよび／または二酸化シリコンの形態とすることができる。粒子サイズ（ｄ５０）の決定は、好ましくはレーザ回折法により行われる。   10-25% by weight of inorganic filler particles have a particle size (d50) of 5-20 μm, preferably 5-10 μm. The inorganic filler particles can be, for example, in the form of aluminum oxide and / or silicon dioxide. The particle size (d50) is preferably determined by laser diffraction.

０〜０．５重量％の他の添加物は、例えば湿潤剤の形態とすることができる。   Other additives from 0 to 0.5% by weight can be, for example, in the form of wetting agents.

接着剤を用いて、特に、特定の組成、すなわち特定の配合組成を有する接着剤を用いて、均一に分散された初期固着剤点、特に接着点を、計算可能な最終高さで生成することができる。   Using an adhesive, in particular with a specific composition, i.e. an adhesive having a specific formulation, to produce a uniformly dispersed initial sticker point, in particular an adhesive point, with a calculable final height. Can do.

初期固着剤は、分注、浸漬、または噴射処理によって、基板の第１の面上に塗布することができる。特に、初期固着剤は、半球状接着点、すなわち半球状の点の形態で塗布される。   The initial sticking agent can be applied onto the first surface of the substrate by a dispensing, dipping or spraying process. In particular, the initial sticking agent is applied in the form of hemispherical adhesion points, i.e. hemispherical points.

基板上に塗布される初期固着剤、特に、基板上に塗布される初期固着剤および基板上に塗布される結合材は乾燥させることができる。言い換えると、基板は、塗布された初期固着剤、および／または塗布された結合材と共に乾燥処理を受ける。乾燥処理は、１００〜１５０℃の対象物温度で、２〜３０分間、実行することができる。   The initial sticking agent applied on the substrate, in particular the initial sticking agent applied on the substrate and the binder applied on the substrate can be dried. In other words, the substrate undergoes a drying process with the applied initial sticking agent and / or the applied binder. The drying process can be performed at an object temperature of 100 to 150 ° C. for 2 to 30 minutes.

乾燥処理、すなわち初期乾燥処理が実行されると、塗布された初期固着剤の厚さが、当該乾燥処理、すなわち初期乾燥処理によって、乾燥処理、すなわち初期乾燥処理後に薄くなる。   When the drying process, that is, the initial drying process is executed, the thickness of the applied initial fixing agent is reduced by the drying process, that is, the initial drying process, after the drying process, that is, the initial drying process.

本発明の実施形態のさらなる形式において、塗布された初期固着剤を伴う基板、特に、塗布された初期固着剤および塗布された結合材を伴う基板は、当該基板の第１の面が支持部材に対面して配置されるように支持部材上に位置付けることができ、初期固着剤および／または結合材が、支持部材と少なくとも接着結合する。したがって、基板は、支持部材上に配置することができ、基板構造は、基板、初期固着剤、任意選択的に接触材および任意選択的に支持部材を備え、別の生産施設に、または別の処理装置に移動することができる。初期固着剤のみが、支持部材と接着結合することが可能である。小さなギャップが、例えば、支持部材と、任意選択的に存在する結合材との間に存在するであろう。   In a further form of embodiment of the present invention, a substrate with an applied initial sticking agent, in particular a substrate with an applied initial sticking agent and an applied binder, wherein the first side of the substrate is the support member. It can be positioned on the support member to be placed face-to-face, and the initial adhesive and / or binder is at least adhesively bonded to the support member. Thus, the substrate can be placed on a support member, and the substrate structure comprises a substrate, an initial sticker, optionally a contact material and optionally a support member, in another production facility, or in another It can be moved to the processing device. Only the initial sticking agent can be adhesively bonded to the support member. A small gap may exist, for example, between the support member and the optionally present binder.

初期固着剤は、結合材の側で基板の第１の面の少なくともいくつかの部分上に塗布される。初期固着剤は、分注、浸漬、または噴射処理によって、結合材の側に塗布される。例えば、初期固着剤は、結合材の側で少なくとも１つの接着点として塗布することができる。さらに、初期固着剤は、結合材の側で棒の形態で基板の第１の面上に塗布されると考えることができる。同じように、初期固着剤によって、結合材の全ての側を囲むことが可能である。   The initial sticking agent is applied on at least some portions of the first side of the substrate on the side of the binder. The initial sticking agent is applied to the binder side by dispensing, dipping or spraying. For example, the initial sticking agent can be applied as at least one point of adhesion on the side of the binder. Furthermore, it can be considered that the initial sticking agent is applied on the first side of the substrate in the form of a rod on the side of the binder. In the same way, it is possible to enclose all sides of the binder with an initial sticking agent.

初期固着剤は、結合材より厚くなるように、基板の第１の面に塗布することができる。言い換えると、初期固着剤は、垂直方向に、結合材の上部に突出する。初期固着剤は、結合材より材料厚が大きい。任意選択的な乾燥処理、すなわち初期乾燥処理の前では、初期固着剤は、乾燥処理、すなわち初期乾燥処理の後より厚い。   The initial sticking agent can be applied to the first surface of the substrate so as to be thicker than the binder. In other words, the initial sticking agent protrudes in the vertical direction on top of the binder. The initial fixing agent has a material thickness larger than that of the binder. Prior to the optional drying process, i.e. the initial drying process, the initial fixing agent is thicker than after the drying process, i.e. the initial drying process.

さらに、本発明は、電子部品と結合するための基板構造を明示するという概念に基づいており、当該基板構造は、上記した発明の方法で製造されることが好ましい。本発明の基板構造は、第１の面と第２の面とを有する基板を備え、初期固着剤が、基板の第１の面のいくつかの部分に塗布される。   Furthermore, the present invention is based on the concept of specifying a substrate structure for coupling with an electronic component, and the substrate structure is preferably manufactured by the method of the invention described above. The substrate structure of the present invention comprises a substrate having a first surface and a second surface, and an initial sticking agent is applied to several portions of the first surface of the substrate.

基板は、ＤＣＢ基板、ＰＣＢ基板、またはリードフレームの形態とすることができる。   The substrate can be in the form of a DCB substrate, a PCB substrate, or a lead frame.

初期固着剤は、はんだおよび／または接着剤とすることができる。特に、初期固着剤は、２０〜４５重量％の熱可塑性ポリマー、４０〜７０重量％の有機溶媒、１０〜２５重量％の無機充填剤粒子、および０〜０．５重量％の他の添加物を含む接着剤の形態をとる。接着剤およびその組成物に関して、ならびに接着剤の個々のパラメータを決定する方法に関して、上記した方法と関連してすでに記載した補足説明を参照する。かかる補足説明はまた、基板構造に対して適用される。   The initial sticking agent can be a solder and / or an adhesive. In particular, the initial sticker is 20-45 wt% thermoplastic polymer, 40-70 wt% organic solvent, 10-25 wt% inorganic filler particles, and 0-0.5 wt% other additives. It takes the form of an adhesive containing. With regard to the adhesive and its composition, and with respect to the method for determining the individual parameters of the adhesive, reference is made to the supplementary explanation already given in connection with the method described above. Such supplemental explanation also applies to the substrate structure.

さらに、結合材は、基板の第１の面のいくつかの部分に塗布されることが好ましい。したがって、初期固着剤および結合材の両方を、基板の第１の面上に塗布することができる。初期固着剤は、基板構造上への電子部品の初期固着において、および、電子部品に塗布するための方法においてその役割を果たす。対照的に、結合材は、実際に固定する、すなわち、基板構造と電子部品とを効率的および恒久的に結合するよう機能する。結合材は、焼結ペースト、特に銀、はんだ、導電接着剤、または接着膜を含む焼結ペーストとすることができる。   Furthermore, the binder is preferably applied to some parts of the first side of the substrate. Thus, both the initial sticking agent and the binder can be applied on the first side of the substrate. The initial sticking agent plays its role in the initial sticking of the electronic component onto the substrate structure and in the method for applying to the electronic component. In contrast, the bonding material functions to actually fix, i.e., to efficiently and permanently bond the substrate structure and the electronic component. The binder can be a sintered paste, particularly a sintered paste comprising silver, solder, conductive adhesive, or adhesive film.

初期固着剤は、結合材の側で基板の第１の面の少なくともいくつかの部分上に塗布される。初期固着剤は、結合材の側で、滴、半球、または棒の形態となるように設計することができる。本発明の実施形態の１つの形式において、結合材は、初期固着剤によって全ての側を囲まれることが可能である。   The initial sticking agent is applied on at least some portions of the first side of the substrate on the side of the binder. The initial sticking agent can be designed to be in the form of drops, hemispheres or rods on the side of the binder. In one form of an embodiment of the present invention, the binder can be surrounded on all sides by an initial sticking agent.

初期固着剤は、結合材より厚くなるよう設計されることが好ましい。言い換えると、初期固着剤は、垂直方向において、結合材の上部に突出する。   The initial sticking agent is preferably designed to be thicker than the binder. In other words, the initial sticking agent protrudes above the binder in the vertical direction.

実施形態のさらなる形式において、基板構造は、支持部材を有し、当該支持部材は、初期固着剤、および／または結合材で少なくとも接着結合される。基板は、基板の第１の面が支持部材と対面して配置されるように、当該支持部材に対して位置付けられる。支持部材は、基板構造を第１の製造設備から別の製造設備に、または第１の製造装置から別の製造装置に搬送することを可能にするよう機能する。支持部材は、例えば接着力の低い支持膜の形態とすることができる。   In a further form of embodiment, the substrate structure has a support member, which is at least adhesively bonded with an initial adhesive and / or a binder. The substrate is positioned relative to the support member such that the first surface of the substrate is disposed facing the support member. The support member functions to allow the substrate structure to be transferred from the first manufacturing facility to another manufacturing facility or from the first manufacturing device to another manufacturing device. The support member can be in the form of a support film having a low adhesive force, for example.

さらに、本発明は、電子部品を基板構造と結合する方法を明示するという概念に基づく。特に、基板構造は、本発明の基板構造、および／または説明する本発明の方法を用いて製造された基板構造の形態とすることができる。電子部品を基板構造と結合する本発明の方法は、以下のステップ、すなわち、
・基板構造と電子部品とを、基板の第１の面が電子部品と対面して配置されるように、互いに位置付けるステップと、
・初期固着剤を基板の第１の面のいくつかの部分に塗布することによって、電子部品に基板構造を初期固着するステップと、
・基板構造を電子部品と結合するステップとを含む。 Furthermore, the present invention is based on the concept of demonstrating how to combine the electronic component with the substrate structure. In particular, the substrate structure can be in the form of a substrate structure of the present invention and / or a substrate structure manufactured using the inventive method described. The method of the present invention for combining an electronic component with a substrate structure comprises the following steps:
Positioning the substrate structure and the electronic component relative to each other such that the first surface of the substrate is disposed facing the electronic component;
Initial bonding of the substrate structure to the electronic component by applying an initial bonding agent to some portions of the first side of the substrate;
Combining the substrate structure with the electronic component.

基板構造と電子部品とを、基板の第１の面が電子部品と対面して配置されるように、互いに位置付けるステップは、一方で、基板構造を電子部品上にセットするよう実行することができる。実施形態のさらなる形式において、電子部品が基板構造上に装着されることが考えられる。   The step of positioning the substrate structure and the electronic component relative to each other such that the first side of the substrate faces the electronic component can be performed on the one hand to set the substrate structure on the electronic component. . In a further form of embodiment, it is conceivable that the electronic component is mounted on the substrate structure.

基板構造と電子部品とを互いに対して位置付けるステップの後、基板構造を電子部品と初期固着するステップが行われる。前記初期固着は、基板の第１の面のいくつかの部分上に塗布される初期固着剤を用いて実行される。この目的のために、熱を加えることが好ましい。加える温度は１００〜１５０℃が好ましく、その結果、初期固着剤が熱によって活性化され、したがって、基板構造が、電子部品と初期固着することができる。初期固着処理によって、搬送ロバスト性が、初期固着において基板構造と結合された電子部品に対して実現することができ、電子部品は、ベルトコンベヤで供給された結果、揺さぶられて緩くなることを無くすことができる。代わりに、電子部品は、初期固着位置に維持される。   After the step of positioning the substrate structure and the electronic component relative to each other, a step of initial fixing the substrate structure to the electronic component is performed. The initial sticking is performed using an initial sticking agent applied on several portions of the first side of the substrate. For this purpose, it is preferable to apply heat. The applied temperature is preferably 100 to 150 ° C. As a result, the initial fixing agent is activated by heat, and thus the substrate structure can be initially fixed to the electronic component. With the initial sticking process, transport robustness can be achieved for electronic components that are combined with the substrate structure in the initial sticking, and the electronic parts are not shaken and loosened as a result of being fed by the belt conveyor. be able to. Instead, the electronic component is maintained in the initial secured position.

電子部品は、半導体、ＤＣＢ基板、またはＰＣＢ基板の形態とすることができる。時間の観点から、基板構造を電子部品と結合するステップは、初期固着処理の後に行う。基板構造を電子部品と結合するステップは、例えば、焼結、プレス、またははんだ処理によって行うことができる。基板構造は、電子部品と共に焼結されることが好ましい。この目的のために、基板構造は、結合材、特に焼結ペーストを有する。   The electronic component can be in the form of a semiconductor, a DCB substrate, or a PCB substrate. From a time point of view, the step of bonding the substrate structure to the electronic component is performed after the initial fixing process. The step of bonding the substrate structure to the electronic component can be performed, for example, by sintering, pressing, or soldering. The substrate structure is preferably sintered with the electronic component. For this purpose, the substrate structure has a binder, in particular a sintered paste.

電子部品を基板構造と結合する本発明の方法と関連した初期固着剤に関し、初期固着剤と関連してすでに記載した補足説明を参照する。また、初期固着剤および結合材の互いの配置に関して、すでに記載した補足説明を参照する。   With respect to the initial sticker associated with the method of the present invention for bonding an electronic component to a substrate structure, reference is made to the supplementary explanation already given in connection with the initial sticker. Reference is also made to the supplementary explanation already given with regard to the arrangement of the initial fixing agent and the binder.

電子部品と固着された基板構造は、当該基板構造を電子部品と結合するために処理炉に搬送されることが好ましい。処理炉は、例えば、加圧焼結炉、リフロー炉、またはラミネート窯の形態とすることができる。焼結処理の間、または加圧焼結処理の間、初期固着剤の有機成分および／またはポリマー成分は、そのほとんどが蒸発する。   The substrate structure secured to the electronic component is preferably transported to a processing furnace to couple the substrate structure with the electronic component. The processing furnace can be in the form of, for example, a pressure sintering furnace, a reflow furnace, or a laminating furnace. During the sintering process or during the pressure sintering process, most of the organic and / or polymer components of the initial sticking agent evaporate.

初期固着剤の有機成分および／またはポリマー成分は、気化する、および／または熱分解される。基板構造を電子部品と結合するステップの間、初期固着剤によって形成された電子部品との結合は取り除かれ、特に、焼失および／または溶解される。   The organic component and / or polymer component of the initial sticking agent is vaporized and / or pyrolyzed. During the step of bonding the substrate structure with the electronic component, the bond with the electronic component formed by the initial fixing agent is removed, in particular burned out and / or dissolved.

基板構造を電子部品と結合するステップの後、特に、焼結、または加圧焼結、および／またははんだ付け、および／またはプレス処理の後、初期固着剤の無機充填剤材料が、基板構造の第１の面でのほとんどの部分に、すなわち、排他的に、存在している。したがって、ほとんどの部分に対して、すなわち、排他的に、初期固着剤の無機充填剤材料が残っている。言い換えると、説明したような初期固着剤は、仮固着剤の形態をとり、実際の結合の後、すなわち、基板構造を電子部品と実際に恒久的に結合した後、ほとんどの部分に対して、または、完全に、取り除かれる。   After the step of bonding the substrate structure with the electronic component, in particular after sintering or pressure sintering, and / or soldering and / or pressing, the initial filler inorganic filler material is It exists in most parts of the first face, ie exclusively. Thus, for the most part, ie exclusively, the initial filler inorganic filler material remains. In other words, the initial sticking agent as described takes the form of a temporary sticking agent and, for the most part, after the actual bonding, i.e. after the substrate structure is actually permanently bonded to the electronic component, Or completely removed.

初期固着剤の組成物において、２０〜４５重量％の熱可塑性ポリマーが選択されることが好ましく、ガラス転移温度が、初期固着処理の間に基板構造に作用する温度未満であるような、特に１００〜１５０℃の温度未満であるようなガラス転移温度であることが好ましい。   In the composition of the initial fixing agent, it is preferred that 20 to 45% by weight of the thermoplastic polymer is selected, in particular such that the glass transition temperature is less than the temperature acting on the substrate structure during the initial fixing process. It is preferable that the glass transition temperature be less than ~ 150 ° C.

本発明のさらなる態様は、電子要素を基板、特に、ＤＣＢ基板、ＰＣＢ基板、またはリードフレームと結合する方法に基づき、基板は、第１の面と第２の面とを有し、本方法は、以下のステップ、すなわち、
・第１の面および第２の面を有する電子部品を準備するステップと、
・電子部品の第１の面の、および／または基板の第１の面のいくつかの部分上へ初期固着剤を塗布するステップとを含む。 A further aspect of the invention is based on a method of bonding an electronic element to a substrate, in particular a DCB substrate, a PCB substrate or a lead frame, the substrate having a first side and a second side, the method comprising: The following steps:
Providing an electronic component having a first surface and a second surface;
Applying an initial adhesive on the first side of the electronic component and / or on some parts of the first side of the substrate.

基板の第１の面の、および／または電子部品の第１の面のいくつかの部分に、特に、初期固着剤を塗布する前に、結合材を塗布することが可能である。結合材は、基板の第１の面を、および／または電子部品の第１の面を、完全にはカバーしない。初期固着剤および結合材の両方を、基板の第１の面上に塗布することができる。   It is possible to apply a binder to the first side of the substrate and / or to some parts of the first side of the electronic component, in particular before applying the initial fixing agent. The binder does not completely cover the first side of the substrate and / or the first side of the electronic component. Both initial sticking agent and binder can be applied on the first side of the substrate.

結合材は焼結ペーストであり、特に、銀を含む焼結ペースト、はんだ、導電接着剤、または接着膜であり、基板を電子部品と実際に接着させるよう機能する。初期固着剤は、初期固着、すなわち、基板を電子部品上に、または電子部品を基板上に、一時的に取り付けるためにのみ機能する。初期固着、すなわち付着を用いて、構成要素が、装着された場所から焼結される位置に搬送されるのに充分な特性を生成する。初期固着剤は仮固着剤である。言い換えると、初期固着剤は、基板と電子部品との一時的な固着を可能にする固着剤である。   The binder is a sintered paste, and in particular, a sintered paste containing silver, solder, a conductive adhesive, or an adhesive film, and functions to actually bond the substrate to the electronic component. The initial sticking agent functions only for initial sticking, i.e., temporarily mounting the substrate on the electronic component or the electronic component on the substrate. Initial sticking, or adhesion, is used to generate sufficient properties for the component to be transported from its place of attachment to a location where it is sintered. The initial sticking agent is a temporary sticking agent. In other words, the initial fixing agent is a fixing agent that enables temporary fixing between the substrate and the electronic component.

初期固着剤は、はんだおよび／または接着剤の形態とすることができる。特に、初期固着剤は、２０〜４５重量％の熱可塑性ポリマー、４０〜７０重量％の有機溶媒、１０〜２５重量％の無機充填剤粒子、および０〜０．５重量％の他の添加物を含む接着剤である。   The initial sticking agent can be in the form of solder and / or adhesive. In particular, the initial sticker is 20-45 wt% thermoplastic polymer, 40-70 wt% organic solvent, 10-25 wt% inorganic filler particles, and 0-0.5 wt% other additives. It is an adhesive containing.

初期固着剤の熱可塑性ポリマーは、例えば、６０〜１２０℃のガラス転移温度を有する。ガラス転移温度の決定は、ＤＤＣによって、すなわち、ダイナミック差熱量測定によって、またはＤＳＣによって、すなわち、示差走査熱量測定によって、加熱速度１０Ｋ／分で実行される。   The thermoplastic polymer of the initial fixing agent has a glass transition temperature of 60 to 120 ° C., for example. The determination of the glass transition temperature is performed at a heating rate of 10 K / min by DDC, ie by dynamic differential calorimetry, or by DSC, ie by differential scanning calorimetry.

熱可塑性ポリマーは、特に（メタ）アクリル共重合体の形態とすることができる。熱可塑性（メタ）アクリル共重合体のモル質量範囲は、３５０００〜７００００ｇ／ｍｏｌ（Ｍｗ＝３５０００〜７００００ｇ／ｍｏｌ）とすることができる。モル質量範囲は、ゲル浸透クロマトグラフィー（ＧＰＣ）により決定する。ゲル浸透クロマトグラフィーに対して、以下の、すなわち、固定相としてのポリスチロールゲル、移動相としてのテトラヒドロフラン、ポリスチロール基準を適用する。   The thermoplastic polymer can be in particular in the form of a (meth) acrylic copolymer. The molar mass range of the thermoplastic (meth) acrylic copolymer can be 35000-70000 g / mol (Mw = 35000-70000 g / mol). The molar mass range is determined by gel permeation chromatography (GPC). For gel permeation chromatography, the following applies: polystyrene gel as stationary phase, tetrahydrofuran as mobile phase, polystyrene standards.

４０〜７０重量％の有機溶媒は、３０〜１００重量％のテルピネオールを含む。   40-70% by weight of the organic solvent contains 30-100% by weight of terpineol.

１０〜２５重量％の無機充填剤粒子は、５〜２０μｍの、好ましくは、５〜１０μｍの、粒子サイズ（ｄ５０）を有する。前記無機充填剤粒子は、例えば、酸化アルミニウムおよび／または二酸化シリコンの形態とすることができる。粒子サイズ（ｄ５０）の決定は、好ましくはレーザ回折法により行われる。   10-25% by weight of the inorganic filler particles have a particle size (d50) of 5-20 μm, preferably 5-10 μm. The inorganic filler particles can be, for example, in the form of aluminum oxide and / or silicon dioxide. The particle size (d50) is preferably determined by laser diffraction.

０〜０．５重量％の他の添加物は、例えば湿潤剤の形態とすることができる。   Other additives from 0 to 0.5% by weight can be, for example, in the form of wetting agents.

接着剤を用いて、特に特定の組成、すなわち、特定の配合組成を有する接着剤を用いて、均一に分散された初期固着剤点、特に接着点を、計算可能な最終高さで生成することができる。   Using adhesives, particularly with a specific composition, i.e., adhesives with a specific formulation, to produce uniformly dispersed initial sticker points, especially adhesive points, with a final height that can be calculated. Can do.

初期固着媒体は、電子部品の第１の面上に、および／または基板の第１の面上に、分注、浸漬、または噴射処理によって塗布することができる。特に、初期固着剤は、半球状接着点、すなわち半球状の点の形態で塗布される。   The initial fixation medium can be applied on the first side of the electronic component and / or on the first side of the substrate by a dispensing, dipping or spraying process. In particular, the initial sticking agent is applied in the form of hemispherical adhesion points, i.e. hemispherical points.

塗布された初期固着剤、特に、塗布された初期固着剤および塗布された結合材は乾燥させることができる。言い換えると、電子部品、および／または基板は、塗布された初期固着剤、および／または塗布された結合材と共に、乾燥処理を受ける。乾燥処理は、１００〜１５０℃の対象物温度で、２〜３０分間、実行することができる。   The applied initial sticking agent, in particular the applied initial sticking agent and the applied binder, can be dried. In other words, the electronic component and / or the substrate is subjected to a drying process with the applied initial fixing agent and / or the applied binder. The drying process can be performed at an object temperature of 100 to 150 ° C. for 2 to 30 minutes.

乾燥処理、すなわち初期乾燥処理が実行されると、塗布された初期固着剤の厚さが、当該乾燥処理、すなわち初期乾燥処理によって、乾燥処理、すなわち初期乾燥処理後に薄くなる。   When the drying process, that is, the initial drying process is executed, the thickness of the applied initial fixing agent is reduced by the drying process, that is, the initial drying process, after the drying process, that is, the initial drying process.

初期固着剤は、結合材の側で、電子部品の第１の面の、および／または基板の第１の面の、少なくともいくつかの部分上に塗布することができる。初期固着剤は、分注、浸漬、または噴射処理によって、結合材の側に塗布される。例えば、初期固着剤は、結合材の側で少なくとも１つの接着点として塗布することができる。さらに、初期固着剤は、結合材の側で棒の形態で基板の第１の面上に塗布されると考えることができる。同じように、初期固着剤によって、結合材の全ての側を囲むことが可能である。   The initial sticking agent may be applied on at least some portions of the first side of the electronic component and / or the first side of the substrate on the binder side. The initial sticking agent is applied to the binder side by dispensing, dipping or spraying. For example, the initial sticking agent can be applied as at least one point of adhesion on the side of the binder. Furthermore, it can be considered that the initial sticking agent is applied on the first side of the substrate in the form of a rod on the side of the binder. In the same way, it is possible to enclose all sides of the binder with an initial sticking agent.

初期固着剤は、結合材より厚くなるように、電子部品の、および／または基板の第１の面に塗布することができる。言い換えると、初期固着剤は、垂直方向において、結合材の上部に突出する。初期固着剤は結合材より材料厚が大きい。任意選択的な乾燥処理、すなわち初期乾燥処理の前は、初期固着剤は、乾燥処理、すなわち初期乾燥処理の後より厚い。   The initial sticking agent can be applied to the first side of the electronic component and / or the substrate to be thicker than the binder. In other words, the initial sticking agent protrudes above the binder in the vertical direction. The initial adhesive has a material thickness greater than that of the binder. Prior to the optional drying process, i.e. the initial drying process, the initial fixing agent is thicker than after the drying process, i.e. the initial drying process.

本発明の実施形態のさらなる形式において、塗布された初期固着剤、特に、塗布された初期固着剤および／または塗布された結合材を伴う電子部品は、電子部品の第１の面が支持部材と対面して配置されるように支持部材上に位置付けることができ、初期固着剤および／または結合材が、支持部材と少なくとも接着結合する。したがって、電子部品は、支持部材上に配置することができ、この構造を別の製造設備に、または別の製造装置に搬送することができる。初期固着剤のみが支持部材と接着結合することが可能である。小さなギャップが、例えば、支持部材と、任意選択的に存在する結合材との間に存在し得る。   In a further form of embodiment of the invention, an electronic component with an applied initial sticker, in particular an applied initial sticker and / or a applied binder, wherein the first side of the electronic component is a support member. It can be positioned on the support member to be placed face-to-face, and the initial adhesive and / or binder is at least adhesively bonded to the support member. Thus, the electronic component can be placed on the support member and the structure can be transported to another manufacturing facility or to another manufacturing apparatus. Only the initial sticking agent can be adhesively bonded to the support member. A small gap may exist, for example, between the support member and the optionally present binder.

電子部品を結合する方法は、さらに、以下のステップ、すなわち、
・電子部品と基板とを、電子部品の第１の面が基板と対面して配置されるように、互いに位置付けるステップと、
・初期固着剤をいくつかの部分上に塗布することによって電子部品を基板と初期固着するステップと、
・電子部品を基板と結合するステップとを含む。 The method for joining electronic components further comprises the following steps:
Positioning the electronic component and the substrate relative to each other such that the first surface of the electronic component is disposed facing the substrate;
Initial bonding of the electronic component to the substrate by applying an initial bonding agent on some parts;
Combining the electronic component with the substrate.

電子部品と基板とを互いに位置付けるステップは、一方で、基板が電子部品上にセットされるように実行することができる。実施形態のさらなる形式において、電子部品が基板上に取り付けられることが考えられる。   The step of positioning the electronic component and the substrate relative to each other can be performed such that the substrate is set on the electronic component. In a further form of embodiment, it is conceivable that the electronic component is mounted on a substrate.

基板と電子部品とを互いに位置付けるステップの後、電子部品を基板と初期固着するステップが行われる。前記初期固着は、いくつかの部分上に塗布される初期固着剤を用いて実行される。この目的のために熱を加えることが好ましい。印加温度は１００〜１５０℃が好ましく、その結果、初期固着剤が加えられた熱によって活性化され、したがって、電子部品は基板と初期固着することができる。   After the step of positioning the substrate and the electronic component relative to each other, a step of initial fixing the electronic component to the substrate is performed. The initial sticking is performed using an initial sticking agent applied on several parts. It is preferred to apply heat for this purpose. The applied temperature is preferably 100 to 150 ° C., and as a result, the initial activation agent is activated by the applied heat, and thus the electronic component can be initially fixed to the substrate.

初期固着処理によって、搬送ロバスト性が、基板と初期固着された電子部品に対して実現することができ、電子部品、および／または基板は、ベルトコンベヤで供給された結果、揺さぶられて緩くなることを無くすことができる。代わりに、電子部品、および／または基板は初期固着位置に維持される。   By the initial fixing process, the transport robustness can be realized for the electronic components that are initially fixed to the substrate, and the electronic components and / or the substrate are shaken and loosened as a result of being supplied by the belt conveyor. Can be eliminated. Instead, the electronic components and / or the substrate are maintained in the initial secured position.

電子部品は、半導体、ＤＣＢ基板、またはＰＣＢ基板の形態とすることができる。時間の観点から、電子部品を基板と結合するステップは、初期固着処理の後に行う。基板を電子部品と結合するステップは、例えば、焼結、プレス、またははんだ処理によって行うことができる。基板は、電子部品と共に焼結されることが好ましい。この目的のために、基板および／または電子部品は、結合材、特に焼結ペーストを有する。   The electronic component can be in the form of a semiconductor, a DCB substrate, or a PCB substrate. From the time point of view, the step of bonding the electronic component to the substrate is performed after the initial fixing process. The step of bonding the substrate to the electronic component can be performed, for example, by sintering, pressing, or soldering. The substrate is preferably sintered together with the electronic component. For this purpose, the substrate and / or the electronic component have a binder, in particular a sintered paste.

電子部品を基板と結合する本発明の方法と関連した初期固着剤に関し、初期固着剤と関連してすでに記載した補足説明を参照する。   With respect to the initial sticking agent associated with the method of the present invention for bonding electronic components to a substrate, reference is made to the supplementary explanation already given in connection with the initial sticking agent.

電子部品と固着された基板は、電子部品を基板と結合するために処理炉に搬送されることが好ましい。処理炉は、例えば、加圧焼結炉、リフロー炉、またはラミネート窯の形態とすることができる。焼結処理の間または加圧焼結処理の間、初期固着剤の有機成分および／またはポリマー成分は、そのほとんどが蒸発する。初期固着剤の有機成分および／またはポリマー成分は、気化する、および／または熱分解される。電子部品を基板と結合するステップの間、初期固着剤によって形成された結合は取り除かれ、特に、焼失および／または溶解される。   The substrate fixed to the electronic component is preferably transported to a processing furnace in order to bond the electronic component to the substrate. The processing furnace can be in the form of, for example, a pressure sintering furnace, a reflow furnace, or a laminating furnace. During the sintering process or during the pressure sintering process, most of the organic and / or polymer components of the initial sticking agent evaporate. The organic component and / or polymer component of the initial sticking agent is vaporized and / or pyrolyzed. During the step of bonding the electronic component to the substrate, the bond formed by the initial sticking agent is removed, in particular burned out and / or dissolved.

電子部品を基板と結合するステップの後、特に、焼結、または加圧焼結、および／またははんだ付け、および／またはプレス処理の後、初期固着剤の無機充填剤材料が、基板の第１の面での、または電子部品の第１の面での、ほとんどの部分に、すなわち、排他的に、存在している。したがって、当該ほとんどの部分に対して、すなわち、排他的に、初期固着剤の無機充填剤材料が残っている。言い換えると、説明したような初期固着剤は、仮固着剤の形態をとり、実際の結合の後、すなわち、電子部品を基板と実際に恒久的に結合した後、ほとんどの部分に対して、または、完全に、取り除かれる。   After the step of bonding the electronic component to the substrate, in particular after sintering or pressure sintering and / or soldering and / or pressing, the initial filler inorganic filler material is the first of the substrate. Or in the first part of the electronic component, i.e. exclusively. Thus, for the most part, ie exclusively, the initial filler inorganic filler material remains. In other words, the initial sticking agent as described takes the form of a temporary sticking agent, for the most part after the actual bonding, i.e. after the electronic component is actually permanently bonded to the substrate, or Completely removed.

初期固着剤の組成物において、２０〜４５重量％の熱可塑性ポリマーが選択されることが好ましく、ガラス転移温度が初期固着処理の間に作用する温度未満であるような、特に１００〜１５０℃の加熱温度未満であるようなガラス転移温度を伴うことが好ましい。   In the composition of the initial fixing agent, it is preferred that 20 to 45% by weight of the thermoplastic polymer is selected, in particular between 100 and 150 ° C., such that the glass transition temperature is below the temperature at which it acts during the initial fixing process It is preferably accompanied by a glass transition temperature that is less than the heating temperature.

さらに、本発明は、基板構造または基板と結合される電子構造を明示するという概念に基づく。基板構造は、本発明の基板構造、すなわち本発明の方法を用いて製造された基板構造の形態とすることができる。特に、電子部品は、発明の方法を用いて基板構造と結合される。あるいは、電子部品は、本発明の方法により基板と結合されている。   Furthermore, the present invention is based on the concept of specifying a substrate structure or an electronic structure coupled to the substrate. The substrate structure can be in the form of a substrate structure of the present invention, ie, a substrate structure manufactured using the method of the present invention. In particular, the electronic component is combined with the substrate structure using the method of the invention. Alternatively, the electronic component is bonded to the substrate by the method of the present invention.

基板、特に、基板構造の基板は、第１の面および第２の面を備え、基板の第１の面で、および／または基板と対面する電子部品の第１の面で、初期固着剤の残留物が、いくつかの部分に形成される。基板構造または基板が、当該基板の第１の面が電子部品と対面して配置されるように電子部品と結合される。さらに、結合材は、基板の第１の面のいくつかの部分に塗布することができる。   The substrate, in particular the substrate of the substrate structure, comprises a first surface and a second surface, and the initial adhesive agent is formed on the first surface of the substrate and / or on the first surface of the electronic component facing the substrate. Residues are formed in several parts. A substrate structure or substrate is coupled to the electronic component such that the first surface of the substrate is disposed facing the electronic component. Further, the bonding material can be applied to several portions of the first side of the substrate.

基板は、ＤＣＢ基板、ＰＣＢ基板、またはリードフレームとすることができる。電子部品は、半導体、ＤＣＢ基板、またはＰＣＢ基板とすることができる。初期固着剤の残留物は、はんだおよび／または接着剤の残留物とすることができる。接着剤は、当初は熱可塑性（メタ）アクリル共重合体の形態とすることができる。ほとんどの部分に対して、特に、完全に、無機充填剤粒子、特に酸化アルミニウムおよび／または酸化シリコンが、基板の第１の面に、および／または基板と対面する電子部品の面に形成される。   The substrate can be a DCB substrate, a PCB substrate, or a lead frame. The electronic component can be a semiconductor, a DCB substrate, or a PCB substrate. The initial sticker residue may be a solder and / or adhesive residue. The adhesive can initially be in the form of a thermoplastic (meth) acrylic copolymer. For the most part, in particular, completely inorganic filler particles, in particular aluminum oxide and / or silicon oxide, are formed on the first side of the substrate and / or on the side of the electronic component facing the substrate. .

以下、本発明を、添付の概略図を参照しつつ、実施形態の例を用いてさらに詳細に説明する。   The invention will now be described in more detail by way of example embodiments with reference to the accompanying schematic drawings.

基板構造を製造する方法の個々のステップを示す図である。FIG. 4 shows the individual steps of a method for manufacturing a substrate structure. 基板構造を製造する方法の個々のステップを示す図である。FIG. 4 shows the individual steps of a method for manufacturing a substrate structure. 基板構造を製造する方法の個々のステップを示す図である。FIG. 4 shows the individual steps of a method for manufacturing a substrate structure. 基板構造を製造する方法の個々のステップを示す図である。FIG. 4 shows the individual steps of a method for manufacturing a substrate structure. 基板構造を製造するためのさらなるオプションのステップを示す図である。FIG. 5 shows further optional steps for manufacturing a substrate structure. 基板構造を製造するためのさらなるオプションのステップを示す図である。FIG. 5 shows further optional steps for manufacturing a substrate structure. 実施形態の第１の形式に係る、電子部品を基板構造と結合する発明の方法の個々のステップを示す図である。FIG. 3 shows the individual steps of the inventive method for coupling an electronic component with a substrate structure according to a first form of embodiment. 実施形態の第１の形式に係る、電子部品を基板構造と結合する発明の方法の個々のステップを示す図である。FIG. 3 shows the individual steps of the inventive method for coupling an electronic component with a substrate structure according to a first form of embodiment. 実施形態の第１の形式に係る、電子部品を基板構造と結合する発明の方法の個々のステップを示す図である。FIG. 3 shows the individual steps of the inventive method for coupling an electronic component with a substrate structure according to a first form of embodiment. 実施形態のさらなる形式に係る、電子部品を基板構造と結合する発明の方法の個々のステップを示す図である。FIG. 4 shows individual steps of the inventive method of coupling an electronic component with a substrate structure, according to a further form of embodiment. 実施形態のさらなる形式に係る、電子部品を基板構造と結合する発明の方法の個々のステップを示す図である。FIG. 4 shows individual steps of the inventive method of coupling an electronic component with a substrate structure, according to a further form of embodiment. 実施形態のさらなる形式に係る、電子部品を基板構造と結合する発明の方法の個々のステップを示す図である。FIG. 4 shows individual steps of the inventive method of coupling an electronic component with a substrate structure, according to a further form of embodiment.

以下、同様の部品および同様に動作する部品に対して同じ参照番号が使用される。   Hereinafter, the same reference numbers are used for similar parts and parts that operate in a similar manner.

図１は基板２０を示す。基板２０は、構造化された形態で存在し、すなわち、個々の基板部分２１、２１’が形成される。基板は、例えば、リードフレーム、ＤＣＢ基板、またはＰＣＢ基板の形態とすることができる。さらに、基板２０の一方または両方の面をコーティング処理することができる。コーティングは、例えば、金属コーティング、または金属合金コーティングとすることができる。基板２０は、第１の面２２と、第２の面２３とを有する。図示した例において、基板２０の第１の面２２は、当該基板２０の反対側の第２の面２３と平行になるよう設計される。   FIG. 1 shows a substrate 20. The substrate 20 exists in a structured form, i.e., individual substrate portions 21, 21 'are formed. The substrate can be in the form of, for example, a lead frame, a DCB substrate, or a PCB substrate. Furthermore, one or both sides of the substrate 20 can be coated. The coating can be, for example, a metal coating or a metal alloy coating. The substrate 20 has a first surface 22 and a second surface 23. In the illustrated example, the first surface 22 of the substrate 20 is designed to be parallel to the second surface 23 on the opposite side of the substrate 20.

図２は、基板２０の第１の面２２上への結合材２５の塗布を示す。結合材２５は、はんだ、導電接着剤、または接着膜の形態とすることができる。特に、結合材２５は、焼結ペーストの形態をとる。焼結ペーストは、銀、または銀合金を含むことが好ましい。結合材２５は、印刷、特に、スクリーン印刷、および／またはステンシル印刷によって、ならびに／もしくはスキージーを用いて、ならびに／もしくは、スプレー、および／または噴射、および／または分注処理によって、基板２０の第１の面２２上に塗布することができる。   FIG. 2 shows the application of the binder 25 onto the first surface 22 of the substrate 20. The binder 25 can be in the form of solder, conductive adhesive, or adhesive film. In particular, the binder 25 takes the form of a sintered paste. The sintered paste preferably contains silver or a silver alloy. The binder 25 may be applied to the substrate 20 by printing, in particular screen printing and / or stencil printing and / or using a squeegee and / or by spraying and / or spraying and / or dispensing processes. It can be applied on one surface 22.

基板構造１０の製造状況において、結合材２５は、電子部品５０、５１との結合をもたらすように作用する。特に、結合材２５は、基板構造１０を電子部品５０、５１と恒久的に結合するよう機能する。   In the manufacturing situation of the substrate structure 10, the binding material 25 acts to provide a connection with the electronic components 50, 51. In particular, the bonding material 25 functions to permanently bond the substrate structure 10 to the electronic components 50 and 51.

図３は、初期固着剤３０を、結合材２５の側ないし側部で基板２０の第１の面２２上に塗布する方法を示す。初期固着剤３０は、滴の形態で基板２０の第１の面２２上に塗布される。図示した例において、初期固着剤３０の４つの滴が塗布されている。初期固着剤３０は、左側の基板部分２１上と、右側の基板部分２１’上との両方に塗布される。初期固着剤３０は、結合材２５の側辺ないし側縁２６付近の基板２０の第１の面２２上に塗布される。ギャップが、初期固着剤３０と、結合材２５の側縁２６との間に形成され得る。さらに、初期固着剤３０を、棒の形態で塗布することも考えられる。さらに、初期固着剤３０で、結合剤２５の全ての側縁を取り囲むことが可能である。この状況において、結合材２５が初期固着剤３０によって全ての側縁を取り囲まれた場合、ギャップが初期固着剤３０と結合材２５との間に形成されることも考えられる。初期固着剤３０は、以下の組成物を含むことが好ましい。
・２０〜４５重量％の熱可塑性ポリマー、特に、例えば、６０℃〜１２０℃のガラス転移温度を有する熱可塑性（メタ）アクリル共重合体。
・４０〜７０重量％の有機溶媒。前記有機溶媒は、３０〜１００重量％のテルピネオールを含むことが好ましい。
・１０〜２５重量％の無機充填剤粒子であって、粒子サイズ（ｄ５０）が５〜２０μｍ、特に５〜１０μｍである粒子。無機充填剤粒子は、酸化アルミニウムおよび／または二酸化ケイ素の形態であることが好ましい。
・０〜０．５重量％の他の添加物、例えば、湿潤剤。 FIG. 3 shows a method of applying the initial sticking agent 30 on the first surface 22 of the substrate 20 on the side or side of the binder 25. The initial sticking agent 30 is applied on the first surface 22 of the substrate 20 in the form of drops. In the illustrated example, four drops of initial sticking agent 30 are applied. The initial fixing agent 30 is applied to both the left substrate portion 21 and the right substrate portion 21 '. The initial fixing agent 30 is applied on the first surface 22 of the substrate 20 in the vicinity of the side edge or side edge 26 of the binder 25. A gap may be formed between the initial adhesive 30 and the side edge 26 of the binder 25. It is also conceivable to apply the initial fixing agent 30 in the form of a stick. Furthermore, the initial adhesive 30 can surround all side edges of the binder 25. In this situation, it is conceivable that a gap is formed between the initial fixing agent 30 and the bonding material 25 when the bonding material 25 is surrounded by the initial fixing agent 30 on all side edges. The initial fixing agent 30 preferably includes the following composition.
-20 to 45 wt% thermoplastic polymer, in particular thermoplastic (meth) acrylic copolymer having a glass transition temperature of, for example, 60C to 120C.
40-70 wt% organic solvent. The organic solvent preferably contains 30 to 100% by weight of terpineol.
-10-25% by weight of inorganic filler particles having a particle size (d50) of 5-20 [mu] m, in particular 5-10 [mu] m. The inorganic filler particles are preferably in the form of aluminum oxide and / or silicon dioxide.
0 to 0.5% by weight of other additives such as wetting agents.

初期固着剤３０は、分注、浸漬、または噴射処理によって、基板２０の第１の面２２上に塗布することができる。初期固着剤３０は、半球状接着点の形態で基板２０の第１の面２２上に塗布されることが好ましい。初期固着剤３０の厚さｄＶＦ１は、結合材２５の厚さｄＫＭよりも値が大きい。言い換えると、初期固着剤３０の厚さｄＶＦ１は、結合材２５の厚さｄＫＭよりも大きい。図３において、初期固着剤３０は、非乾燥状態であり、より詳しくは乾燥していない。 The initial sticking agent 30 can be applied onto the first surface 22 of the substrate 20 by a dispensing, dipping or spraying process. The initial sticking agent 30 is preferably applied on the first surface 22 of the substrate 20 in the form of a hemispherical adhesion point. The thickness d VF1 of the initial fixing agent 30 is larger than the thickness d KM of the binder 25. In other words, the thickness d VF1 of the initial fixing agent 30 is larger than the thickness d KM of the binder 25. In FIG. 3, the initial fixing agent 30 is in a non-dried state, and more specifically is not dried.

図４は基板構造１０を示しており、本方法のこの段階では、当該基板構造１０は、基板２０、および結合材２５と共に初期乾燥状態にある初期固着剤３０を備えている。初期固着剤３０および結合材２５の乾燥は、１００〜１５０℃の対象物温度で、２〜３０分間、実行することが好ましい。初期乾燥処理、すなわち乾燥処理の後、初期固着剤３０の厚さｄＶＦ１は、乾燥処理前の初期固着剤３０の厚さｄＶＦ１より薄くなる。したがって、厚さｄＶＦ１は乾燥処理の過程で減少する。しかしながら、乾燥処理の後でも、厚さｄＶＦ２は結合材２５の厚さｄＫＭより大きいことが好ましい。 FIG. 4 shows the substrate structure 10, at this stage of the method, the substrate structure 10 comprises an initial adhesive 30 in an initial dry state along with the substrate 20 and the binder 25. It is preferable to perform drying of the initial fixing agent 30 and the binder 25 at an object temperature of 100 to 150 ° C. for 2 to 30 minutes. After the initial drying process, that is, after the drying process, the thickness d VF1 of the initial fixing agent 30 becomes thinner than the thickness d VF1 of the initial fixing agent 30 before the drying process. Therefore, the thickness d VF1 decreases during the drying process. However, even after the drying process, the thickness d VF2 is preferably larger than the thickness d KM of the binder 25.

基板構造１０は、図４に示されるように、中間生成物であり、例えば、第１の製造機械から、別の製造機械に搬送され得る。さらに、この中間生成物は、別の製造設備に、または顧客に搬送されることが考えられる。   The substrate structure 10 is an intermediate product, as shown in FIG. 4, and can be transferred from, for example, a first manufacturing machine to another manufacturing machine. Furthermore, it is conceivable that this intermediate product is transported to another production facility or to the customer.

図５によれば、任意選択的に、基板構造１０が支持部材３５を備えるよう処理することができる。支持部材３５は、例えば、移送要素、特に、移送膜の形態とすることができる。基板２０は、塗布された初期固着剤３０および塗布された結合材２５を伴い、基板２０の第１の面２２が支持部材３５と対面して位置するように、支持部材３５に対して配置される。言い換えると、基板２０の第１の面２２は、支持部材３５に向けられる。図示した例において、少なくとも初期固着剤３０は、支持部材３５と接着結合される。結合材２５が、同様に、支持部材３５と接着結合することも可能である。   According to FIG. 5, the substrate structure 10 can optionally be processed to include a support member 35. The support member 35 can be, for example, in the form of a transfer element, in particular a transfer membrane. The substrate 20 is disposed with respect to the support member 35 so that the first surface 22 of the substrate 20 faces the support member 35 with the applied initial fixing agent 30 and the applied binder 25. The In other words, the first surface 22 of the substrate 20 is directed to the support member 35. In the illustrated example, at least the initial fixing agent 30 is adhesively bonded to the support member 35. Similarly, the bonding material 25 can be adhesively bonded to the support member 35.

接着力が、初期固着剤３０と支持部材３５との間に働き、基板１０の搬送が容易になり、基板２０が、搬送中に、支持部材３５から外れないようにすることができる。しかしながら、初期固着剤３０と支持部材３５との間の接着力は、構成要素が基板構造１０と結合される場合に、基板２０を、初期固着剤３０および結合材２５と共に、支持部材３５から取り外すことができるように充分に小さい。基板部分２１および基板部分２１’の両方が、支持部材３５に配置される。言い換えると、複数の基板部分２１、２１’を、適切な初期固着剤３０および結合材２５により、支持部材３５に配置することができる。   The adhesive force acts between the initial fixing agent 30 and the support member 35, and the substrate 10 can be easily transported, and the substrate 20 can be prevented from being detached from the support member 35 during transport. However, the adhesive force between the initial adhesive 30 and the support member 35 is such that the substrate 20 is removed from the support member 35 along with the initial adhesive 30 and the binder 25 when the component is bonded to the substrate structure 10. Small enough to be able to. Both the substrate portion 21 and the substrate portion 21 ′ are disposed on the support member 35. In other words, the plurality of substrate portions 21, 21 ′ can be disposed on the support member 35 by the appropriate initial fixing agent 30 and the bonding material 25.

図６では、基板構造１０が示され、当該基板構造１０は、ノズル４０を用いて支持部材３５から取り外すことができる。初期固着剤３０および結合材２５を伴う基板２０の支持部材３５からの取り外しは、例えば、ノズル４０を用いて、ピックアンドプレース処理の要領で、実行することができる。   In FIG. 6, a substrate structure 10 is shown, which can be removed from the support member 35 using a nozzle 40. The removal of the substrate 20 with the initial fixing agent 30 and the bonding material 25 from the support member 35 can be performed using, for example, the nozzle 40 in the manner of a pick-and-place process.

図７〜図９は、本発明の実施形態の第１の形式による、電子部品５０を基板構造１０と結合する方法を示す。この場合、基板構造１０は、まず、ノズル４０を用いて、支持部材３５から取り外される。ついで、ノズル４０を用いて、基板構造１０は、電子部品５０上に位置付けられ、基板２０の第１の面２２が電子部品５０と対面して配置される。ノズル４０は、基板２０の第２の面２３に作用する。図７に示されるように、基板構造１０は、電子部品５０上にセットされ、初期固着剤３０だけが電子部品５０と接し、すなわち、初期固着剤３０だけが電子部品５０と結合する。図示した部品５０は、例えば、シリコン半導体の形態とすることができる。ギャップが結合材２５と部品５０との間に形成され、当該ギャップは、初期固着剤と結合材との厚さが異なることにより形成される。   7-9 illustrate a method of coupling an electronic component 50 with a substrate structure 10 according to a first type of embodiment of the present invention. In this case, the substrate structure 10 is first removed from the support member 35 using the nozzle 40. Next, using the nozzle 40, the substrate structure 10 is positioned on the electronic component 50, and the first surface 22 of the substrate 20 is disposed facing the electronic component 50. The nozzle 40 acts on the second surface 23 of the substrate 20. As shown in FIG. 7, the substrate structure 10 is set on the electronic component 50, and only the initial adhesive 30 is in contact with the electronic component 50, that is, only the initial adhesive 30 is bonded to the electronic component 50. The illustrated component 50 can be, for example, in the form of a silicon semiconductor. A gap is formed between the bonding material 25 and the component 50, and the gap is formed by different thicknesses of the initial fixing agent and the bonding material.

図８では、ノズル４０は、基板構造１０からすでに取り外されている。１００〜１５０℃の熱が加えられる。これによって、初期固着剤３０が活性化され、その結果、基板構造１０と電子部品５０との初期固着が実行される。初期固着処理は、基板２０、特に、基板２０の第１の面２２と、電子部品５０、特に基板２０と対面する電子部品５０の面５２との間の接着結合の形式であることが好ましく、かかる接着結合は、初期固着剤３０を用いて生成される。   In FIG. 8, the nozzle 40 has already been removed from the substrate structure 10. Heat of 100-150 ° C. is applied. As a result, the initial fixing agent 30 is activated, and as a result, the initial fixing between the substrate structure 10 and the electronic component 50 is performed. The initial fixing process is preferably in the form of an adhesive bond between the substrate 20, in particular the first surface 22 of the substrate 20, and the electronic component 50, in particular the surface 52 of the electronic component 50 facing the substrate 20, Such an adhesive bond is generated using the initial sticking agent 30.

この時点で、初期乾燥処理、すなわち、図４に示したような乾燥ステップはオプションであることに留意されたい。初期固着剤３０を基板２０の第１の面２２上に塗布し、その直後に、電子部品５０、５１と基板構造１０との初期固着を実行することもできる。支持部材３５の設置は、この場合では不要である。この場合、初期固着剤３０が、電子部品５０、５１の装着の直前に、すなわち、電子部品５０、５１の基板２０上への装着の直前に塗布される。   Note that at this point, the initial drying process, ie the drying step as shown in FIG. 4, is optional. It is also possible to apply the initial fixing agent 30 on the first surface 22 of the substrate 20 and immediately perform the initial fixing between the electronic components 50 and 51 and the substrate structure 10. Installation of the support member 35 is unnecessary in this case. In this case, the initial fixing agent 30 is applied immediately before the electronic components 50 and 51 are mounted, that is, immediately before the electronic components 50 and 51 are mounted on the substrate 20.

初期固着の後、図８に図示されるように、基板構造１０と電子部品５０との実際の結合を実行する。「結合」は、基板構造１０と電子部品５１との接合として理解されよう。結合は、はんだ付け、プレス、または焼結処理によって実行することができる。ここで、基板構造１０は、処理炉で、例えば、加圧焼結炉、リフロー炉またはラミネート窯で、電子部品５０と共に焼結されると考えられる。加圧焼結処理の間、初期固着剤３０の有機／ポリマー成分は、そのほとんどが蒸発する。言い換えると、結合処理の間、または結合処理の後、初期固着剤３０は、少なくとも部分的に取り除かれ、特に、焼失および／または溶解される。熱分解によって、および／または生じる気化によって、初期固着剤３０の有機／ポリマー成分を取り除く。したがって、焼結、および／またはプレス、および／またははんだ付け処理の後、基板２０と部品５０との間の接着結合は、もはや形成されていない。   After the initial bonding, the actual bonding of the substrate structure 10 and the electronic component 50 is performed as illustrated in FIG. “Coupling” will be understood as joining the substrate structure 10 and the electronic component 51. Bonding can be performed by soldering, pressing, or sintering processes. Here, it is considered that the substrate structure 10 is sintered together with the electronic component 50 in a processing furnace, for example, a pressure sintering furnace, a reflow furnace, or a laminating furnace. During the pressure sintering process, most of the organic / polymer component of the initial binder 30 evaporates. In other words, during or after the bonding process, the initial sticking agent 30 is at least partially removed, in particular burned out and / or dissolved. The organic / polymer component of the initial sticker 30 is removed by thermal decomposition and / or by the resulting vaporization. Thus, after sintering and / or pressing and / or soldering processes, an adhesive bond between the substrate 20 and the component 50 is no longer formed.

電子部品５０の上には、および／または基板２０の上には、特に基板２０の第１の面２２の上には、残留物３１、特に有機初期固着剤３０の無機充填剤材料のみが、ほとんどの部分に対して、または好ましくは排他的に形成される。図示した例において、初期固着剤３０の残留物３１は、電子部品５０の第１の面５２上に形成される。   On the electronic component 50 and / or on the substrate 20, in particular on the first surface 22 of the substrate 20, only the residue 31, in particular the inorganic filler material of the organic initial fixing agent 30, Formed for the most part or preferably exclusively. In the illustrated example, the residue 31 of the initial fixing agent 30 is formed on the first surface 52 of the electronic component 50.

図１０〜図１２は、実施形態のさらなる例に係る、電子部品５０および５１を基板構造１０と結合する方法を示す。   10-12 illustrate a method of coupling electronic components 50 and 51 with substrate structure 10 according to a further example of embodiment.

図１０は、基板構造１０を示しており、当該基板構造１０は、２つの基板部分２１および２１’を備え、第１の電子部品５０および第２の電子部品５１と適合される。基板部分２１および基板部分２１’の両方は、結合材２５と、結合材２５の側ないし側部に形成された初期固着剤３０とを備える。   FIG. 10 shows a substrate structure 10, which comprises two substrate portions 21 and 21 ′ and is adapted with a first electronic component 50 and a second electronic component 51. Both the substrate portion 21 and the substrate portion 21 ′ include a bonding material 25 and an initial fixing agent 30 formed on the side or side of the bonding material 25.

第１の電子部品５０および第２の電子部品５１の両方が、基板構造１０に対してノズル４０および４０’を用いて位置付けられ、基板２０の第１の面２２が、第１の電子部品５０および第２の電子部品５１と対面して配置される。第１の電子部品５０は、シリコン半導体の形態とすることができる。第２の電子部品５１は、第１の面５２および第２の面５３の両方にコーティング５４を有する。   Both the first electronic component 50 and the second electronic component 51 are positioned with respect to the substrate structure 10 using the nozzles 40 and 40 ′, and the first surface 22 of the substrate 20 is the first electronic component 50. And it arrange | positions facing the 2nd electronic component 51. FIG. The first electronic component 50 can be in the form of a silicon semiconductor. The second electronic component 51 has a coating 54 on both the first surface 52 and the second surface 53.

図１１に示されるように、基板構造１０と第１の電子部品５０および第２の電子部品５１との初期固着は、基板２０の第１の面２２のいくつかの部分に塗布された初期固着剤３０により実行される。図１〜図９に関連してすでに記載した、初期固着剤３０に関する補足説明を適用する。初期固着剤３０による初期固着のために、基板構造１０に、第１の電子部品５０および第２の電子部品５１とともに、熱、特に１００〜１５０℃の温度の熱が加えられる。接着結合が、第１の電子部品５０と基板２０との間に、特に、第１の電子部品５０と基板２０の第１の面２２との間に形成される。さらに、接着結合が、第２の電子部品５１と基板２０、特に、基板２０の第１の面２２との間に形成される。   As shown in FIG. 11, the initial bonding between the substrate structure 10 and the first electronic component 50 and the second electronic component 51 is the initial bonding applied to several portions of the first surface 22 of the substrate 20. Performed by the agent 30. The supplementary explanation concerning the initial fixing agent 30 already applied in connection with FIGS. 1 to 9 applies. For the initial fixing by the initial fixing agent 30, heat, particularly heat at a temperature of 100 to 150 ° C., is applied to the substrate structure 10 together with the first electronic component 50 and the second electronic component 51. An adhesive bond is formed between the first electronic component 50 and the substrate 20, in particular, between the first electronic component 50 and the first surface 22 of the substrate 20. Furthermore, an adhesive bond is formed between the second electronic component 51 and the substrate 20, in particular the first surface 22 of the substrate 20.

初期固着の後、結合が、第１の電子部品５０および第２の電子部品５１と基板構造１０との間で実行される。結合処理、好ましくは、焼結処理の間、初期固着剤３０が、少なくともいくつかの部分から取り除かれ、特に、焼失および／または溶解される。   After initial bonding, bonding is performed between the first electronic component 50 and the second electronic component 51 and the substrate structure 10. During the bonding process, preferably the sintering process, the initial sticking agent 30 is removed from at least some parts, in particular burned out and / or dissolved.

図１２に示されるように、初期固着剤３０の残留物３１のみが、基板２０の第１の面２２に残る。初期固着剤３０の前記残留物３１は、当初の初期固着剤３０の無機充填剤材料の形態であることが好ましい。   As shown in FIG. 12, only the residue 31 of the initial fixing agent 30 remains on the first surface 22 of the substrate 20. The residue 31 of the initial fixing agent 30 is preferably in the form of an inorganic filler material of the initial initial fixing agent 30.

図１２において、電子部品５０は、第２の電子部品５１と共に、基板構造１０と完全に結合される。基板構造１０は、第１の面２２と第２の面２３とを伴う基板２０を有する。当初の初期固着剤３０の残留物３１は、基板２０の第１の面２２に配置される。   In FIG. 12, the electronic component 50 is completely coupled to the substrate structure 10 together with the second electronic component 51. The substrate structure 10 has a substrate 20 with a first surface 22 and a second surface 23. The residue 31 of the initial initial fixing agent 30 is disposed on the first surface 22 of the substrate 20.

この時点で、図１〜図１２に係る実施形態の形式と関連して説明した、上記の全ての方法ステップおよび要素は、個別に、または任意の組み合わせで、特に、図に示した詳細は、本発明にとって本質的なものとして特許請求されることに留意されたい。請求項１〜８の１つに係る方法ステップと、請求項２１〜３１の１つに係る方法ステップとの任意の選択された組み合わせもまた可能である。   At this point, all the method steps and elements described above in connection with the form of the embodiment according to FIGS. 1 to 12 are individually or in any combination, in particular the details shown in the figures: Note that it is claimed as essential to the invention. Any selected combination of method steps according to one of claims 1 to 8 and method steps according to one of claims 21 to 31 is also possible.

１０、１０’ 基板構造
２０ 基板
２１、２１’ 基板部分
２２ 基板の第１の面
２３ 基板の第２の面
２５ 結合材
２６ 側縁
３０ 初期固着剤
３５ 支持部材
４０、４０’ ノズル
５０ 電子部品
５１ 電子部品
５２ 電子部品の第１の面
５３ 電子部品の第２の面
５４ コーティング
ｄＶＦ１ 乾燥前の初期固着剤の厚さ
ｄＶＦ２ 乾燥後の初期固着剤の厚さ
ｄＫＭ 結合材の厚さ 10, 10 'substrate structure 20 substrate 21, 21' substrate portion 22 substrate first surface 23 substrate second surface 25 binder 26 side edge 30 initial fixing agent 35 support member 40, 40 'nozzle 50 electronic component 51 Electronic component 52 First surface 53 of electronic component Second surface 54 of electronic component Coating d Initial adhesive thickness before drying VF1 d Initial adhesive thickness after VF2 drying d KM binder thickness

Claims (33)

基板構造（１０）を製造する方法であって、電子部品（５０；５１）と結合するため、
第１の面（２２）および第２の面（２３）を有する基板（２０）、特に、ＤＣＢ基板、ＰＣＢ基板、またはリードフレームを準備するステップと、
前記基板（２０）の前記第１の面（２２）のいくつかの部分上へ初期固着剤（３０）を塗布するステップとを含む、方法。 A method of manufacturing a substrate structure (10) for bonding with an electronic component (50; 51),
Providing a substrate (20) having a first surface (22) and a second surface (23), in particular a DCB substrate, a PCB substrate or a lead frame;
Applying an initial sticking agent (30) onto some portions of the first surface (22) of the substrate (20). 前記基板（２０）の前記第１の面（２２）のいくつかの部分上に、特に、前記初期固着剤（３０）を塗布する前記ステップの前に、結合材（２５）を塗布するステップ
を含む、請求項１に記載の方法。 Applying a binder (25) on some parts of the first surface (22) of the substrate (20), in particular before the step of applying the initial adhesive (30); The method of claim 1 comprising. 前記初期固着剤（３０）が、はんだおよび／または接着剤であり、特に、２０〜４５重量％の熱可塑性ポリマー、４０〜７０重量％の有機溶媒、１０〜２５重量％の無機充填剤粒子、および０〜０．５重量％の他の添加物を含む接着剤であることを特徴とする、請求項１または請求項２に記載の方法。   The initial fixing agent (30) is a solder and / or an adhesive, in particular, 20 to 45 wt% thermoplastic polymer, 40 to 70 wt% organic solvent, 10 to 25 wt% inorganic filler particles, 3. A method according to claim 1 or claim 2, characterized in that it is an adhesive comprising 0 and 0.5% by weight of other additives. 前記結合材（２５）が、焼結ペースト、特に銀を含む焼結ペースト、はんだ、導電接着剤、または接着膜であることを特徴とする、請求項１〜３のいずれか一項に記載の方法。   4. The binder according to claim 1, wherein the binder (25) is a sintered paste, in particular a silver-containing sintered paste, solder, a conductive adhesive, or an adhesive film. 5. Method. 前記基板（２０）上に塗布された前記初期固着剤（３０）が、特に、前記基板（２０）上に塗布された前記初期固着剤（３０）および前記基板（２０）上に塗布された前記結合材（２５）が、乾燥されることを特徴とする、請求項１〜４のいずれか一項、特に、請求項２〜４のいずれか一項に記載の方法。   The initial sticking agent (30) applied on the substrate (20), in particular, the initial sticking agent (30) applied on the substrate (20) and the coating applied on the substrate (20). 5. A method according to any one of claims 1 to 4, in particular according to any one of claims 2 to 4, characterized in that the binder (25) is dried. 前記基板（２０）を、塗布された初期固着剤（３０）と共に、特に、塗布された初期固着剤（３０）および塗布された結合材（２５）と共に、支持部材（３５）上に位置付けるステップであって、前記基板（２０）の前記第１の面（２２）が前記支持部材（３５）と対面して配置され、前記初期固着剤（３０）および／または前記結合材（２５）が、前記支持部材（３５）と少なくとも接着結合されるステップを含むことを特徴とする、請求項１〜５のいずれか一項、特に、請求項２〜５のいずれか一項に記載の方法。   Positioning the substrate (20) on the support member (35) with the applied initial adhesive (30), in particular with the applied initial adhesive (30) and the applied binder (25). The first surface (22) of the substrate (20) is disposed to face the support member (35), and the initial fixing agent (30) and / or the binder (25) are 6. A method according to any one of claims 1 to 5, in particular comprising a step of being adhesively bonded to the support member (35). 前記初期固着剤（３０）が、前記結合材（２５）の側で、前記基板（２０）の前記第１の面（２２）の少なくともいくつかの部分上に塗布されることを特徴とする、請求項１〜６のいずれか一項、特に、請求項２〜６のいずれか一項に記載の方法。   The initial sticking agent (30) is applied on at least some parts of the first surface (22) of the substrate (20) on the side of the binder (25), 7. A method according to any one of claims 1-6, in particular according to any one of claims 2-6. 前記初期固着剤（３０）が、前記基板（２０）の前記第１の面（２２）上に塗布されて、当該初期固着剤（３０）が、前記結合材（２５）より厚くなることを特徴とする、請求項１〜７のいずれか一項、特に、請求項２〜７のいずれか一項に記載の方法。   The initial sticking agent (30) is applied on the first surface (22) of the substrate (20), and the initial sticking agent (30) is thicker than the binder (25). A method according to any one of claims 1 to 7, in particular according to any one of claims 2 to 7. 基板構造（１０）であって、電子部品（５０；５１）と結合するために、第１の面（２２）および第２の面（２３）を有する基板（２０）を備え、初期固着剤（３０）が、前記基板（２０）の前記第１の面（２２）のいくつかの部分上に塗布される、基板構造（１０）。   A substrate structure (10) comprising a substrate (20) having a first surface (22) and a second surface (23) for bonding to an electronic component (50; 51), and comprising an initial adhesive ( 30) a substrate structure (10), wherein 30) is applied on several parts of the first surface (22) of the substrate (20). 前記基板（１０）が、ＤＣＢ基板、ＰＣＢ基板、またはリードフレームであること
を特徴とする、請求項９に記載の基板構造（１０）。 The substrate structure (10) according to claim 9, characterized in that the substrate (10) is a DCB substrate, a PCB substrate or a lead frame. 前記初期固着剤（３０）が、はんだおよび／または接着剤であり、特に、２０〜４５重量％の熱可塑性ポリマー、４０〜７０重量％の有機溶媒、１０〜２５重量％の無機充填剤粒子、および０〜０．５重量％の他の添加物を含む接着剤であることを特徴とする、請求項９または請求項１０に記載の基板構造（１０）。   The initial fixing agent (30) is a solder and / or an adhesive, in particular, 20 to 45 wt% thermoplastic polymer, 40 to 70 wt% organic solvent, 10 to 25 wt% inorganic filler particles, 11. Substrate structure (10) according to claim 9 or 10, characterized in that it is an adhesive comprising 0 and 0.5% by weight of other additives. 結合材（２５）が、前記基板（２０）の前記第１の面（２２）のいくつかの部分上に塗布されることを特徴とする、請求項９〜１１のいずれか一項に記載の基板構造（１０）。   12. The binder (25) according to any one of claims 9 to 11, characterized in that a binder (25) is applied on several parts of the first surface (22) of the substrate (20). Substrate structure (10). 前記結合材（２５）が、焼結ペースト、特に銀を含む焼結ペースト、はんだ、導電接着剤、または接着膜であることを特徴とする、請求項１２に記載の基板構造（１０）。   13. The substrate structure (10) according to claim 12, characterized in that the binding material (25) is a sintered paste, in particular a sintered paste containing silver, a solder, a conductive adhesive or an adhesive film. 前記初期固着剤（３０）が、前記結合材（２５）の側で、前記基板（２０）の前記第１の面（２２）の少なくともいくつかの部分上に塗布されることを特徴とする、請求項１２または請求項１３に記載の基板構造（１０）。   The initial sticking agent (30) is applied on at least some parts of the first surface (22) of the substrate (20) on the side of the binder (25), 14. A substrate structure (10) according to claim 12 or claim 13. 前記初期固着剤（３０）が、前記結合材（２５）より厚いことを特徴とする、請求項１２〜１４のいずれか一項に記載の基板構造（１０）。   The substrate structure (10) according to any one of claims 12 to 14, characterized in that the initial sticking agent (30) is thicker than the binder (25). 支持部材（３５）が、前記初期固着剤（３０）および／または前記結合材（２５）で少なくとも接着結合されることを特徴とする、請求項９〜１５のいずれか一項に記載の基板構造（１０’）。   16. The substrate structure according to any one of claims 9 to 15, characterized in that a support member (35) is at least adhesively bonded with the initial sticking agent (30) and / or the binder (25). (10 '). 電子部品（５０；５１）を、基板構造（１０；１０’）と、特に、請求項９〜１６のいずれか一項に記載の基板構造（１０；１０’）と、および／または請求項１〜８のいずれか一項に記載の方法により製造される基板構造（１０；１０’）と、結合する方法であって、
前記基板構造（１０；１０’）と前記電子部品（５０；５１）とを、前記基板（２０）の前記第１の面（２２）が前記電子部品（５０；５１）と対面して配置されるように互いに位置付けるステップと、
前記初期固着剤（３０）を前記基板（２０）の前記第１の面（２２）のいくつかの部分上に塗布することによって、前記基板構造（１０；１０’）を前記電子部品（５０；５１）上に初期固着するステップと、
前記基板構造（１０）を前記電子部品（５０；５１）と結合するステップとを含む、方法。 Electronic component (50; 51) with substrate structure (10; 10 '), in particular with substrate structure (10; 10') according to any one of claims 9 to 16, and / or with claim 1. A substrate structure (10; 10 ') produced by the method according to any one of -8, and a method of bonding,
The substrate structure (10; 10 ′) and the electronic component (50; 51) are arranged such that the first surface (22) of the substrate (20) faces the electronic component (50; 51). Steps to position each other so that,
The substrate structure (10; 10 ') is applied to the electronic component (50;) by applying the initial sticking agent (30) onto some portions of the first surface (22) of the substrate (20). 51) an initial fixation on
Bonding the substrate structure (10) with the electronic component (50; 51). 前記電子部品（５０；５１）が、半導体、ＤＣＢ基板、またはＰＣＢ基板であることを特徴とする、請求項１７に記載の方法。   18. Method according to claim 17, characterized in that the electronic component (50; 51) is a semiconductor, a DCB substrate or a PCB substrate. 前記基板構造（１０；１０’）を前記電子部品（５０；５１）と初期固着する前記ステップの間に熱が加えられることを特徴とする、請求項１７または請求項１８に記載の方法。   19. A method according to claim 17 or 18, characterized in that heat is applied during the step of initially fixing the substrate structure (10; 10 ') to the electronic component (50; 51). 前記電子部品（５０；５１）と結合される場合に、前記基板構造（１０；１０’）が、前記電子部品（５０；５１）と共に焼結、プレス、またははんだ付けされることを特徴とする、請求項１７〜１９のいずれか一項に記載の方法。   When combined with the electronic component (50; 51), the substrate structure (10; 10 ') is sintered, pressed or soldered together with the electronic component (50; 51). The method according to any one of claims 17 to 19. 前記結合処理の間または後に、特に、前記基板構造（１０；１０’）の前記電子部品（５０；５１）との前記焼結、および／またははんだ付け、および／またはプレスの間に、前記初期固着剤（３０）が、少なくとも部分的に取り除かれ、特に、焼失および／または溶解されることを特徴とする、請求項１７〜２０のいずれか一項、特に、請求項２０に記載の、方法。   During or after the bonding process, in particular during the initial stage, during the sintering and / or soldering and / or pressing of the substrate structure (10; 10 ′) with the electronic component (50; 51) 21. Method according to any one of claims 17-20, in particular 20, characterized in that the sticking agent (30) is at least partly removed, in particular burned out and / or dissolved. . 電子部品（５０；５１）を、第１の面（２２）および第２の面（２３）を有する基板（２０）と、特に、ＤＣＢ基板、ＰＣＢ基板、またはリードフレームと結合する方法であって、
第１の面（５２）および第２の面（５３）を有する電子部品（５０；５１）を準備するステップと、
初期固着剤（３０）を、前記電子部品（５０；５１）の前記第１の面（５２）の、および／または前記基板（２０）の前記第１の面（２２）の、いくつかの部分上に塗布するステップとを含む、方法。 A method of bonding an electronic component (50; 51) to a substrate (20) having a first surface (22) and a second surface (23), in particular a DCB substrate, a PCB substrate or a lead frame. ,
Providing an electronic component (50; 51) having a first surface (52) and a second surface (53);
Several parts of the initial sticking agent (30) on the first surface (52) of the electronic component (50; 51) and / or on the first surface (22) of the substrate (20) Applying to the top. 結合材（２５）を、特に、前記初期固着剤（３０）を塗布するステップの前に、前記電子部品（５０；５１）の前記第１の面（５２）の、および／または前記基板（２０）の前記第１の面（２２）の、いくつかの部分上に塗布するステップを含むことを特徴とする、請求項２２に記載の方法。   Before the step of applying the binder (25), in particular the initial sticking agent (30), of the first surface (52) of the electronic component (50; 51) and / or the substrate (20). 23. A method according to claim 22, characterized in that it comprises the step of applying on several parts of said first surface (22). 前記初期固着剤（３０）が、はんだおよび／または接着剤であり、特に、２０〜４５重量％の熱可塑性ポリマー、４０〜７０重量％の有機溶媒、１０〜２５重量％の無機充填剤粒子、および０〜０．５重量％の他の添加物を含む接着剤であることを特徴とする、請求項２２または請求項２３に記載の方法。   The initial fixing agent (30) is a solder and / or an adhesive, in particular, 20 to 45 wt% thermoplastic polymer, 40 to 70 wt% organic solvent, 10 to 25 wt% inorganic filler particles, 24. A method according to claim 22 or claim 23, characterized in that it is an adhesive comprising 0 and 0.5% by weight of other additives. 前記塗布された初期固着剤（３０）、および／または前記塗布された結合材（２５）が乾燥させられることを特徴とする、請求項２２〜２４のいずれか一項、特に、請求項２３または請求項２４に記載の方法。   25. Any one of claims 22 to 24, in particular 23 or 23, characterized in that the applied initial fixing agent (30) and / or the applied binder (25) are dried. 25. A method according to claim 24. 前記初期固着剤（３０）が、前記電子部品（５０；５１）の前記第１の面（５２）上に、および／または前記基板（２０）の前記第１の面（２２）上に、当該初期固着剤（３０）が前記結合材（２５）より厚くなるように塗布されることを特徴とする、請求項２２〜２５のいずれか一項、特に、請求項２３〜２５のいずれか一項に記載の方法。   The initial sticking agent (30) is on the first surface (52) of the electronic component (50; 51) and / or on the first surface (22) of the substrate (20). The initial sticking agent (30) is applied so as to be thicker than the binder (25), in particular according to any one of claims 22 to 25, in particular according to any one of claims 23 to 25. The method described in 1. 前記電子部品（５０；５１）を前記基板（２０）と、前記電子部品（５０；５１）の前記第１の面（５２）が前記基板（２０）と対面して配置されるように互いに位置付けるステップと、
前記電子部品（５０；５１）を、前記初期固着剤（３０）をいくつかの部分上に塗布することによって前記基板（２０）に初期固着するステップと、
前記電子部品（５０；５１）を前記基板（２０）と結合するステップとを含むことを特徴とする、請求項２２〜２６のいずれか一項に記載の方法。 The electronic component (50; 51) is positioned relative to each other such that the substrate (20) and the first surface (52) of the electronic component (50; 51) are arranged facing the substrate (20). Steps,
Initial fixing the electronic component (50; 51) to the substrate (20) by applying the initial fixing agent (30) on several parts;
27. Method according to any one of claims 22 to 26, characterized in that it comprises the step of coupling said electronic component (50; 51) with said substrate (20). 前記電子部品（５０；５１）を前記基板（２０）と初期固着する前記ステップの間に熱が加えられることを特徴とする、請求項２７に記載の方法。   28. A method according to claim 27, characterized in that heat is applied during the step of initially bonding the electronic component (50; 51) to the substrate (20). 前記基板（２０）と結合される場合に、前記電子部品（５０；５１）が、前記基板（２０）と共に焼結、プレス、またははんだ付けされることを特徴とする、請求項２７または請求項２８に記載の方法。   27. The claim 27 or claim 27, characterized in that, when combined with the substrate (20), the electronic component (50; 51) is sintered, pressed or soldered with the substrate (20). 28. The method according to 28. 前記結合処理の間または後に、特に、前記基板構造（２０）の前記電子部品（５０；５１）との前記焼結、および／またははんだ付け、および／またはプレス処理の間に、前記初期固着剤（３０）が、少なくとも部分的に取り除かれ、特に、焼失および／または溶解されることを特徴とする、請求項２７〜２９のいずれか一項、特に、請求項２９に記載の方法。   During or after the bonding process, in particular during the sintering and / or soldering and / or pressing process of the substrate structure (20) with the electronic component (50; 51) 30. A method according to any one of claims 27 to 29, in particular 29, characterized in that (30) is at least partly removed, in particular burned out and / or dissolved. 電子部品（５０；５１）であって、特に、請求項１７〜２１のいずれか一項に記載の方法で基板構造（１０；１０’）と結合され、または、特に、請求項２２〜３０のいずれか一項に記載の方法で基板（２０）と結合され、前記基板（２０）が、特に、前記基板構造（１０；１０’）の前記基板（２０）が、第１の面（２２）および第２の面（２３）を備え、初期固着剤（３０）の残留物（３１）が、前記基板（２０）の前記第１の面（２２）の、および／または前記基板（２０）と対面する前記電子部品（５０；５１）の前記第１の面（５２）の、いくつかの部分上に形成され、前記基板構造（１０；１０’）または前記基板（２０）が、前記電子部品（５０；５１）と、前記基板（２０）の前記第１の面（２２）が前記電子部品（５０；５１）と対面して配置されるように結合される、電子部品（５０；５１）。   Electronic component (50; 51), in particular combined with a substrate structure (10; 10 ') in the method according to any one of claims 17-21, or in particular according to claims 22-30. Combined with the substrate (20) by the method according to any one of the above, the substrate (20), in particular the substrate (20) of the substrate structure (10; 10 '), is a first surface (22). And a second surface (23), wherein a residue (31) of initial sticking agent (30) is on the first surface (22) of the substrate (20) and / or with the substrate (20). The substrate structure (10; 10 ') or the substrate (20) is formed on several parts of the first surface (52) of the electronic component (50; 51) facing each other. (50; 51) and the first surface (22) of the substrate (20) is the electronic component (50; 1) to be coupled to be arranged facing the electronic component (50; 51). 結合材（２５）が、前記基板（２０）の前記第１の面（２２）のいくつかの部分上に塗布されることを特徴とする、請求項３１に記載の電子部品（５０；５１）。   32. Electronic component (50; 51) according to claim 31, characterized in that a binder (25) is applied on several parts of the first surface (22) of the substrate (20). . 前記基板（２０）が、ＤＣＢ基板、ＰＣＢ基板、またはリードフレームであり、および／または前記電子部品（５０；５１）が、半導体、ＤＣＢ基板、またはＰＣＢ基板であり、および／または前記初期固着剤（３０）の前記残留物（３１）が、はんだ、および／または接着剤の前記残留物、特に、ある量の無機充填剤粒子であることを特徴とする、請求項３１または請求項３２に記載の電子部品（５０；５１）。   The substrate (20) is a DCB substrate, a PCB substrate, or a lead frame, and / or the electronic component (50; 51) is a semiconductor, a DCB substrate, or a PCB substrate, and / or the initial sticking agent. The residue (31) of (30) is the residue of solder and / or adhesive, in particular an amount of inorganic filler particles, according to claim 31 or 32. Electronic components (50; 51).
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019025507A (en) * 2017-07-28 2019-02-21 セイコーエプソン株式会社 Base material bonding method and structure
JP2020123723A (en) * 2019-01-29 2020-08-13 ヘラエウス ドイチュラント ゲゼルシャフト ミット ベシュレンクテル ハフツング ウント コンパニー コマンディトゲゼルシャフト Production method for spacer system, spacer system, use for spacer system and chip
US11070190B2 (en) 2018-03-27 2021-07-20 Statek Corporation Silver-bonded quartz crystal

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102017212902A1 (en) * 2017-07-27 2019-01-31 Siemens Aktiengesellschaft Method for producing a sintered connection electronic assembly and sintered connection electronic assembly
DE102018221148A1 (en) * 2018-12-06 2020-06-10 Heraeus Deutschland GmbH & Co. KG Method for producing a substrate adapter and substrate adapter for connecting to an electronic component
DE102019206260A1 (en) * 2019-05-02 2020-11-05 Abb Schweiz Ag Method for manufacturing a semiconductor module
DE102021207267A1 (en) * 2021-07-09 2023-01-12 Heraeus Deutschland GmbH & Co. KG Composition useful as a temporary fixative
CN113613408A (en) * 2021-08-16 2021-11-05 重庆金美通信有限责任公司 Technological method applied to BGA (ball grid array) packaged device

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63177584A (en) * 1987-01-19 1988-07-21 富士電機株式会社 Assembly of hybrid integrated circuit
JPH01226162A (en) * 1988-03-07 1989-09-08 Matsushita Electric Ind Co Ltd Connection of semiconductor chip
JPH0690079A (en) * 1992-09-07 1994-03-29 Harima Chem Inc Method for mounting electronic parts on printed circuit board
JPH11168122A (en) * 1997-10-02 1999-06-22 Matsushita Electric Ind Co Ltd Method for mounting semiconductor element on circuit substrate and semiconductor device
JP2002271014A (en) * 2001-03-09 2002-09-20 Hitachi Kokusai Electric Inc Method of mounting electronic component
JP2012074636A (en) * 2010-09-29 2012-04-12 Sumitomo Bakelite Co Ltd Joining method, semiconductor device, multilayer circuit board, and electronic component
JP2014168791A (en) * 2013-03-01 2014-09-18 Hitachi Chemical Co Ltd Flux film, flip-chip connection method, and semiconductor device

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN87107692A (en) * 1986-11-13 1988-05-25 Mt化学公司 The manufacture method of semiconductor device
JPH01161797A (en) * 1987-12-18 1989-06-26 Senju Metal Ind Co Ltd Mounting method for electronic part and storecase for electronic part
US5906310A (en) * 1994-11-10 1999-05-25 Vlt Corporation Packaging electrical circuits
US6097099A (en) * 1995-10-20 2000-08-01 Texas Instruments Incorporated Electro-thermal nested die-attach design
DE69826476T2 (en) * 1997-07-04 2005-01-20 Nippon Zeon Co., Ltd. ADHESIVE FOR SEMICONDUCTOR COMPONENTS
US6144104A (en) * 1999-03-24 2000-11-07 Visteon Corporation High-operating-temperature electronic component
DE102009018541A1 (en) * 2009-04-24 2010-10-28 W.C. Heraeus Gmbh Contacting unit for electronic component, is porous metallic layered structure, and contact surface of electronic component and layered structure geometrically fit to each other, where thickness of layer is ten micrometers
DE102010021764B4 (en) * 2010-05-27 2014-09-25 Semikron Elektronik Gmbh & Co. Kg Method for low-temperature pressure sintering of two connection partners
JP5676155B2 (en) * 2010-06-23 2015-02-25 日立アロカメディカル株式会社 Radiation detector manufacturing method and radiation detector
CN102593012B (en) * 2011-01-14 2014-12-10 株式会社东芝 Manufacturing method of semiconductor device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63177584A (en) * 1987-01-19 1988-07-21 富士電機株式会社 Assembly of hybrid integrated circuit
JPH01226162A (en) * 1988-03-07 1989-09-08 Matsushita Electric Ind Co Ltd Connection of semiconductor chip
JPH0690079A (en) * 1992-09-07 1994-03-29 Harima Chem Inc Method for mounting electronic parts on printed circuit board
JPH11168122A (en) * 1997-10-02 1999-06-22 Matsushita Electric Ind Co Ltd Method for mounting semiconductor element on circuit substrate and semiconductor device
JP2002271014A (en) * 2001-03-09 2002-09-20 Hitachi Kokusai Electric Inc Method of mounting electronic component
JP2012074636A (en) * 2010-09-29 2012-04-12 Sumitomo Bakelite Co Ltd Joining method, semiconductor device, multilayer circuit board, and electronic component
JP2014168791A (en) * 2013-03-01 2014-09-18 Hitachi Chemical Co Ltd Flux film, flip-chip connection method, and semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019025507A (en) * 2017-07-28 2019-02-21 セイコーエプソン株式会社 Base material bonding method and structure
US11070190B2 (en) 2018-03-27 2021-07-20 Statek Corporation Silver-bonded quartz crystal
JP2020123723A (en) * 2019-01-29 2020-08-13 ヘラエウス ドイチュラント ゲゼルシャフト ミット ベシュレンクテル ハフツング ウント コンパニー コマンディトゲゼルシャフト Production method for spacer system, spacer system, use for spacer system and chip
JP7049376B2 (en) 2019-01-29 2022-04-06 ヘラエウス ドイチュラント ゲゼルシャフト ミット ベシュレンクテル ハフツング ウント コンパニー コマンディトゲゼルシャフト How to make a spacer system, spacer system, use of spacer system and tip

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