DE102009018541A1 - Contacting unit for electronic component, is porous metallic layered structure, and contact surface of electronic component and layered structure geometrically fit to each other, where thickness of layer is ten micrometers - Google Patents
Contacting unit for electronic component, is porous metallic layered structure, and contact surface of electronic component and layered structure geometrically fit to each other, where thickness of layer is ten micrometers Download PDFInfo
- Publication number
- DE102009018541A1 DE102009018541A1 DE102009018541A DE102009018541A DE102009018541A1 DE 102009018541 A1 DE102009018541 A1 DE 102009018541A1 DE 102009018541 A DE102009018541 A DE 102009018541A DE 102009018541 A DE102009018541 A DE 102009018541A DE 102009018541 A1 DE102009018541 A1 DE 102009018541A1
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- layer
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- layered structure
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0104—Properties and characteristics in general
- H05K2201/0116—Porous, e.g. foam
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0278—Flat pressure, e.g. for connecting terminals with anisotropic conductive adhesive
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0338—Transferring metal or conductive material other than a circuit pattern, e.g. bump, solder, printed component
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1131—Sintering, i.e. fusing of metal particles to achieve or improve electrical conductivity
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Die Bonding (AREA)
Abstract
Description
Die vorliegende Erfindung betrifft die Kontaktierung elektrischer Bauteile. Zur Befestigung elektronischer Bauteile bei Temperaturen unter 400°C werden neben Weichloten auch Kontaktierungspasten auf Basis von Hartloten unter Druck in der Größenordnung von 30 MPa bei Temperaturen von ungefähr 300°C gesintert, um eine dünne Schicht von ungefähr 50 μm auf ein elektronisches Bauteil aufzutragen. Hierbei wird eine zuverlässige Verbindung von Chip und Substrat geschaffen, die Betriebstemperaturen von über 250°C stand hält. Die zu verbindenden Flächen müssen edel sein, insbesondere aus Silber oder Gold bestehen.The The present invention relates to the contacting of electrical components. For mounting electronic components at temperatures below 400 ° C In addition to soft solders, contact compounds based on Brazing under pressure of the order of 30 MPa sintered at temperatures of about 300 ° C, around a thin layer of about 50 μm to apply to an electronic component. This will be a reliable Connection of chip and substrate created the operating temperatures of over 250 ° C. The to be connected Surfaces must be noble, especially silver or gold.
Die
Da das Aufdrucken von Befestigungspasten in einer Ebene erfolgt, ist es besonders aufwändig, eine Kontaktierungspaste auch in Aussparungen eines Körpers aufzutragen.There is the printing of fixing pastes in a plane is It is particularly complex, a contacting paste also in Apply recesses of a body.
Die Aufgabe der vorliegenden Erfindung besteht darin, ein einfaches Befestigungsverfahren bereitzustellen, das zur Befestigung von Bauteilen in Aussparungen keinen erhöhten Aufwand erfordert.The Object of the present invention is a simple To provide fastening method, which is used for fastening components in recesses no increased effort required.
Zur Lösung der Aufgabe werden vordimensionierte Strukturen bereitgestellt, auf die ggfs. erhitzte Kontaktflächen elektronischer Bauteile einfach aufgedrückt werden können.to The solution to the problem becomes pre-dimensioned structures provided on the possibly heated contact surfaces electronic Components can be easily pressed.
Die Lösung der Aufgabe erfolgt mit den Merkmalen der unabhängigen Ansprüche. Bevorzugte Ausführungen sind in den abhängigen Ansprüchen beschrieben.The Solution of the task is done with the characteristics of independent Claims. Preferred embodiments are in the dependent claims.
Erfindungsgemäß ist vorgesehen, dass das Kontaktierungsmittel eine poröse metallische Schichtstruktur ist.According to the invention provided that the contacting means has a porous metallic layer structure is.
Elektronische Bauelemente, insbesondere der Leistungselektronik, wie DCB z. B. mit kleinen Chips, Die-Attach, LED und Optoelektronik, werden erfindungsgemäß mit porösen metallischen Schichten kontaktiert, vermutlich durch Diffusionsvorgänge, die beispielsweise chemische, insbesondere intermetallische Verbindungen erzeugen. Hierzu können die Schichten genau passend zu Kontaktflächen der elektronischen Bauteile strukturiert, insbesondere gedruckt werden. Die geometrischen Strukturen oder Abmessungen lassen sich beispielsweise durch Siebdruck sehr genau zu den Abmessungen der Kontaktflächen der elektronischen Bauteile abbilden. Die Schichtdicke kann optimal eingestellt werden, beispielsweise um die Festigkeit eines Kontakts zwischen zwei Kontaktflächen unterschiedlicher Ausdehnung optimal einzustellen. Geeignete Schichtdicken befinden sich im Bereich zwischen 10 und 200 μm, insbesondere zwischen 20 und 50 μm.electronic Components, in particular the power electronics, such as DCB z. B. with small chips, die-attach, LED and optoelectronics are inventively with contacted porous metal layers, presumably by diffusion processes, such as chemical, in particular produce intermetallic compounds. For this purpose, the Layers exactly matching contact surfaces of the electronic Components are structured, in particular printed. The geometric ones Structures or dimensions can be achieved, for example, by screen printing very close to the dimensions of the contact surfaces of the electronic Represent components. The layer thickness can be optimally adjusted, for example about the strength of a contact between two contact surfaces optimally adjust to different expansion. Suitable layer thicknesses are in the range between 10 and 200 microns, in particular between 20 and 50 μm.
Die Porosität sollte über 20 Vol.-% liegen, um ein Anbinden an metallische Kontaktflächen durch kurzes Andrücken zu ermöglichen. Bewährt hat sich eine Porosität von 30 bis 80 Vol.-%. Mittels Bindemittel lässt sich eine Porosität von 90 Vol.-%, insbesondere 99 Vol.-% erzielen. Auf einem Träger befestigte Schichtstrukturen ermöglichen ein sehr schnelles Verbindungsverfahren, indem ein Bauteil zuerst auf die Schichtstruktur gedrückt und mit der dadurch angebundenen Kontaktschicht auf einem Substrat befestigt wird.The Porosity should be above 20 vol% to one Tying to metallic contact surfaces by short pressing to enable. Proven to have a porosity from 30 to 80% by volume. By means of a binder can be a Porosity of 90 vol .-%, in particular 99 vol .-% achieve. Enable layered structures attached to a support a very fast connection method by placing a component first pressed on the layer structure and with the thereby connected Contact layer is attached to a substrate.
Vorzugsweise sind auf dem Träger eine Vielzahl von Kontaktflächen oder Kontaktstrukturen für eine Vielzahl von elektronischen Bauelementen befestigt. Kontaktflächen werden hier synonym wie Kontaktstrukturen behandelt, die beispielsweise bei der Flip-Chip-Technik angewendet werden.Preferably are on the support a variety of contact surfaces or contact structures for a variety of electronic Attached components. Contact surfaces become synonymous here how contact structures are handled, for example, in the flip-chip technique be applied.
Die vorliegende Erfindung ermöglicht eine besonders einheitliche Dimensionierung des Verbindungsmaterials, insbesondere bezüglich der Schichtdicke, der Schichtfläche und der Schichtzusammensetzung, des Schichtvolumens und der Schichtmasse und damit einhergehend besonders reproduzierbare elektrische Eigenschaften, die wieder höchst präzise Anwendungen gestatten.The The present invention enables a particularly uniform Dimensioning of the connecting material, in particular with respect the layer thickness, the layer surface and the layer composition, the layer volume and the layer mass and associated particularly reproducible electrical properties that again allow highly precise applications.
Erfindungsgemäß lässt sich die Höhe der Verbindungsschicht gezielt einstellen. Dies erlaubt eine einfache Optimierung bezüglich des Ausdehnungskoeffizienten unterschiedlicher Fügematerialien. Weiterhin sind die erfindungsgemäßen Verbindungsschichten auch auf unter schiedlichen Ebenen eines Substrats oder Trägers leicht applizierbar, beispielsweise auf gebogenen Leadframes.According to the invention the height of the connecting layer can be adjusted specifically. This allows a simple optimization with respect to the expansion coefficient different joining materials. Furthermore, the invention Connecting layers also on different levels of a substrate or carrier easily applied, for example, on curved Leadframes.
Erfindungsgemäß wird eine Metallpaste präzise in sich wiederholenden Einheiten auf einem Träger aufgetragen und getrocknet. Zum Auftrag eignen sich Schablonen oder Siebdruck. Beim Trocknen der Paste wird eine Porosität von über 20 Vol.-% ausgebildet. Die auf dem Träger nach dem Trocknen erhaltene poröse Druckstruktur dient zur Kontaktierung elektronischer Bauteile. Hierzu werden elektronische Bauteile auf die poröse Druckstrukturen gedrückt. Ggfs. wird zur Verbesserung der Verbindung der porösen Druckstrukturen mit den Kontaktflächen der elektronischen Bauteile deren Kontaktflächen erwärmt. Die porösen Druckstrukturen haften auf diese Weise an den elektronischen Bauteilen und werden vom Träger gelöst. Das elektronische Bauteil wird mittels der Druckstruktur auf einem Substrat, insbesondere auf einer Leiterbahn, befestigt.According to the invention, a metal paste is precisely applied in repetitive units on a support and dried. You can use stencils or screen printing for the job. When the paste is dried, a porosity of more than 20% by volume is formed. The porous pressure structure obtained on the support after drying serves for contacting electronic components. For this purpose, electronic components are pressed onto the porous printing structures. If necessary. is heated to improve the connection of the porous pressure structures with the contact surfaces of the electronic components whose contact surfaces. The porous pressure structures adhere to this Way at the electronic components and are solved by the carrier. The electronic component is fastened by means of the pressure structure on a substrate, in particular on a conductor track.
Auf diese Weise wird ein Grünling auf einem Träger erzeugt und so darauf befestigt, dass er für die vorgesehene Kontaktierungsanwendung leicht vom Träger auf das zu kontaktierende Substrat übertragen wird. Der Grünling ist unter Erhalt seiner Geometrie so leicht von seinem Träger lösbar, dass er ohne wesentlichen Porositätsverlust auf das Substrat übertragen wird. Hierzu wird beispielsweise der Träger oder das Substrat erwärmt, insbesondere unterhalb der Kontaktierungstemperatur des Substrats mit einem weiteren Bauteil. Der poröse Grünling ermöglicht eine einfache Anbindung des Substrats an einem weiteren Bauteil, insbesondere im Temperaturbereich des Weichlötens.On This way, a green will be on a carrier produced and attached to it so that it is intended for the Contacting application easily from the vehicle to the one to be contacted Substrate is transferred. The green is under Preserving its geometry so easily detachable from its wearer, that he transferred to the substrate without significant loss of porosity becomes. For this example, the carrier or the substrate heated, in particular below the contacting temperature of the substrate with another component. The porous green body allows easy connection of the substrate to a another component, in particular in the temperature range of the soldering.
Vorzugsweise enthält die Paste hierzu eine leicht zersetzliche Metallverbindung, wie z. B. Silberlactid, so dass das elektronische Bauteil weit unter der Schmelztemperatur des Metalls auf dem Substrat bzw. dessen Leiterbahn befestigt wird. Alternativ oder zusätzlich bietet es sich an, auf dem Substrat ebenfalls eine poröse Druckstruktur zu befestigen, so dass das Bauteil auf dem Substrat bzw. dessen Leiterbahn über die beidseitig porösen Schichten verbunden wird.Preferably contains the paste for this purpose, a slightly decomposable metal compound, such as As silver lactide, so that the electronic component far below the Melting temperature of the metal on the substrate or its conductor track is attached. Alternatively or additionally, it offers itself on, on the substrate also a porous pressure structure to attach so that the component on the substrate or its Trace over the bilaterally porous layers is connected.
Erfindungsgemäß werden die Prozesszeiten zur Befestigung elektrische Bauteile verkürzt, da gegenüber der Anwendung von Pasten eine Trocknung von Lösemitteln entfällt. Damit einhergehend entfällt auch die Reinigung der Maschinen zur Applikation von Pasten-Systemen. Edelmetallhaltiger Abfall wird vermieden. Die Zuverlässigkeit der Verbindungen wird insbesondere bei Einsatz über 200°C oder einer großen Anzahl von Temperaturwechseln, beispielswei se über 2000 Zyklen, entscheidend verbessert, insbesondere gegenüber Lotlegierungen oder Leitklebern.According to the invention the process times for fastening electrical components shortened, because of the use of pastes, a drying of Solvents are eliminated. This also eliminates the cleaning of machines for the application of paste systems. Precious metal-containing waste is avoided. The reliability the compounds in particular when used above 200 ° C. or a large number of temperature changes, beispielswei se over 2000 cycles, significantly improved, especially against Solder alloys or conductive adhesives.
Die vorliegende Erfindung bietet die Möglichkeit, Bauelemente vollflächig, wie beispielsweise Dies, insbesondere Dioden, vorzugsweise LEDs, zu verbinden oder über mehrere Verbindungsflächen eines Bauelements, wie beispielsweise Flip-Chips.The present invention offers the possibility of components over the entire surface, such as dies, in particular diodes, preferably LEDs, to connect or via multiple connection surfaces a device, such as flip chips.
Die vorliegende Erfindung ermöglicht auch neben dem Bauteil, die Leiterbahn analog auszustatten, so dass das Bauteil mit seiner porösen Befestigungsstruktur auf eine poröse Befestigungsstruktur der Leiterplatte gedrückt und dabei in einer Art Klettverschluss befestigt wird.The The present invention also enables, in addition to the component, to equip the track analog, so that the component with his porous attachment structure to a porous attachment structure of Printed circuit board while in a kind of Velcro is attached.
Die Erfindung betrifft vor allem die Anwendungen in der Power-Elektronik, insbesondere DCB mit kleinen Chips, Die-Attach, insbesondere den Ersatz hoch bleihaltiger Lote, LED und Optoelektronik. Durch die ebenfalls ermöglichte Kombination Leadframe auf Leadframe ist ein Teil der Bonddrahttechnik ersetzbar.The Invention primarily relates to applications in power electronics, especially DCB with small chips, Die Attach, especially the Replacement of high lead solders, LED and optoelectronics. By the also enabled combination leadframe on leadframe is a part of the bonding wire technology replaceable.
Erfindungsgemäß werden vorgefertigte Verbindungsstrukturen, insbesondere auf Basis von Kupfer, Silber, Gold, Palladium oder Platin als Grünlinge bereitgestellt, deren Geometrie durch Strukturieren einer Schicht erfolgt. Hierzu wird für die Massenproduktion in einem Arbeitsschritt eine Vielzahl der Verbindungsstrukturen auf einem Träger angeordnet. Ein Träger, der mit einer Vielzahl von wiederkehrenden Einheiten bedruckt ist, eignet sich zum rationellen Übertragen der Verbindungsstrukturen auf elektronische Bauteile. Jede dieser Einheiten ist eine Verbindungsstruktur. Die Verbindungsstruktur ist metallisch und hat eine Porosität von über 20 Vol.-% Poren. Insbesondere ist sie ein Schaum oder Metallschwamm mit 30 bis 80 Vol.-% Poren. Ein Metallschwamm oder Schaum weist ggfs. einen Binder auf und kann 90 Vol.-%, insbesondere sogar 99 Vol.-% Poren aufweisen. Maßgeblich für die vorliegende Erfindung ist, dass die Verbindungsstrukturen auf dem Träger geringfügig haften, so dass sie von diesem nicht abfallen, aber leicht auf eine metallische Oberfläche übertragen werden können, indem die poröse Struktur sich mit der Metalloberfläche verbindet. Es wird angenommen, dass die Haftung auf dem Träger im Wesentlichen auf Adhäsionskräften beruht und die Haftung auf dem Substrat zusätzlich durch Diffusionsvorgänge bewirkt wird und die Porosität die Diffusion in die Oberfläche der Metallfläche begünstigt. Das Trägermaterial, beispielsweise Keramiksubstrat oder Kunststoff, ist so beschaffen, dass die sich wiederholenden Strukturen sich nicht durch Diffusionen in das Trägermaterial mit diesem verbinden.According to the invention prefabricated connection structures, in particular based on copper, Provided with silver, gold, palladium or platinum as green bodies, the geometry of which is done by structuring a layer. For this becomes one in one step for mass production Variety of connecting structures arranged on a support. A carrier that comes with a variety of recurring Units is printed, is suitable for efficient transfer the connection structures on electronic components. Each of these Units is a connection structure. The connection structure is metallic and has a porosity of over 20 vol.% Pores. In particular, it is a foam or metal sponge with 30 to 80 vol.% pores. A metal sponge or foam points if necessary, a binder and can 90 vol .-%, in particular even 99 Vol .-% pores. Relevant for the present Invention is that the connection structures on the support stick slightly so that they do not fall off but easily transferred to a metallic surface can be by the porous structure itself connects with the metal surface. It is believed, the adhesion on the carrier is essentially due to adhesion forces based and adhesion on the substrate in addition by Diffusion processes is effected and the porosity the diffusion into the surface of the metal surface favored. The carrier material, for example Ceramic substrate or plastic, is such that the Repeating structures are not affected by diffusion into the substrate connect with this.
In bevorzugter Ausführung enthält die Verbindungsstruktur eine Metallverbindung, die sich unterhalb des Schmelzpunkts des betreffenden Metalls zu dem betreffenden Metall zersetzt. Diese zersetzlichen Verbindungen erleichtern das Verbinden des elektronischen Bauteils, dessen Verbindungsstruktur mit dem Gegenstand verbunden wird, auf dem das elektronische Bauteil mittels der Verbindungsstruktur befestigt wird, insbesondere einer Leiterplatte. Hierbei werden besonders milde Bedingungen zur Befestigung des Bauteils auf der Leiterplatte geschaffen. Beispielsweise können Silberverbindungsschichten erzeugt werden, die im Stand der Technik entweder Temperaturen von nahe 1000°C zum Schmelzen des Silbers erfordern, oder Drücke von über 30 MPa zum Verbinden von sogenannten NTV-Pasten, oder Drücke von über 10 MPa zum Verbinden von sogenanntem Nanopulver aufweisenden NTV-Pasten, wobei das Nanopulver zum einen aufwändig herstellbar und zum anderen besonders empfindlich und daher schlecht lagerbar ist. Leicht zersetzliche Silberverbindungen sind insbesondere organische Silberverbindungen, insbesondere Silberlactid und Derivate davon. Für die Bereitstellung von Preformen auf Silberbasis eignen sich neben den nichtmetallischen Materialien wie Kunststoffen insbesondere Polyimide oder Keramiken, insbesondere Substrate auf Basis von Al2O3 auch Träger mit Metalloberflächen, deren oxidische Oberflächen Verbindungen mit Silber verhindern, beispielsweise auf Basis von Aluminium oder Nickel oder Eisen. Bevorzugte Ausführungsformen des Trägers sind Walzen, Platten oder Bänder.In a preferred embodiment, the connecting structure contains a metal compound which decomposes below the melting point of the metal in question to the metal in question. These decomposable connections facilitate the connection of the electronic component whose connection structure is connected to the object on which the electronic component is fastened by means of the connection structure, in particular a printed circuit board. In this case, particularly mild conditions for mounting the component on the circuit board are created. For example, silver compound layers can be produced which in the prior art either require temperatures close to 1000 ° C to melt the silver, or pressures in excess of 30 MPa for joining so-called NTV pastes, or pressures in excess of 10 MPa for bonding so-called nanopowder NTV pastes, where the nanopowders on the one hand consuming to produce and on the other hand is particularly sensitive and therefore poorly storable. Easily decomposable silver compounds are in particular organic silver compound applications, in particular silver lactide and derivatives thereof. For the provision of silver-based preforms are in addition to the non-metallic materials such as plastics in particular polyimides or ceramics, especially substrates based on Al 2 O 3 and supports with metal surfaces whose oxidic surfaces prevent compounds with silver, for example based on aluminum or nickel or Iron. Preferred embodiments of the carrier are rollers, plates or belts.
Im Folgenden wird die vorliegende Erfindung anhand von Beispielen verdeutlicht. Ein Silberlactid aus einer kondensierten Milchsäure wird als leicht zersetzbare Silberverbindung mit Silberpartikeln mit einer Korngröße bis 20 μm gemischt und mit Lösemitteln zu einer Paste verarbeitet. Diese Paste wird mittels Sieb- oder Schablonendruck in wiederholenden Strukturen auf einen Träger gedruckt. Der Träger besteht beispielsweise aus Aluminiumoxid oder einem Polyimid. Nach dem Aufdrucken der Silberpaste wird diese bei Temperaturen unter 200°C getrocknet, so dass die Strukturen teilversinterte, mikroporöse Silberkörper sind oder aufweisen, die als Grünlinge (Preforms) verwendet werden. Dabei wird die Trocknungstemperatur so gewählt, dass das Lösungsmittel der Paste vollständig entfernt wird und die Silberverbindungen eine Matrix zwischen den Silberpartikeln generieren, wobei eine Restreaktivität für den späteren Befestigungsprozess des Bauteils erhalten bleibt. Diese Silber-Sinterpreforms verbleiben bis zur weiteren Verarbeitung auf dem Trägermaterial. Metallische Chips werden bei Temperaturen unter 200°C und einer Kraft von ungefähr 2 N/mm2 auf die auf dem Träger befindlichen Verbindungsstrukturen gedrückt, so dass beim Aufsetzen des Chips auf der Preform diese am Chip anhaftet, und zwar an der dafür vorgesehenen Oberfläche aus Kupfer, Silber oder Gold. Durch Erhöhen der Temperatur und des Bestückungsdrucks ist eine Verbindung herstellbar, die in ihrer Charakteristik einer NTV-Schicht gleicht. Besonders geeignet sind diese Silber-Sinterpreforms für Die-Attach-Anwendungen, da hierzu das übliche Equipment verwendbar ist.In the following, the present invention is illustrated by means of examples. A condensed lactic acid silver lactide is mixed as an easily decomposable silver compound with silver particles having a grain size of up to 20 μm and made into a paste with solvents. This paste is printed on a support by means of screen or stencil printing in repeating structures. The carrier consists for example of aluminum oxide or a polyimide. After printing the silver paste, it is dried at temperatures below 200 ° C, so that the structures are or have partially sintered, microporous silver bodies, which are used as green bodies (preforms). The drying temperature is chosen so that the solvent of the paste is completely removed and the silver compounds generate a matrix between the silver particles, whereby a residual reactivity for the subsequent attachment process of the component is maintained. These silver sintered preforms remain on the substrate until further processing. Metallic chips are pressed at temperatures below 200 ° C and a force of about 2 N / mm 2 on the support structures located on the support, so that when placing the chip on the preform adheres to the chip, on the surface provided for it Copper, silver or gold. By increasing the temperature and the placement pressure, a compound can be produced which is similar in its characteristics to an NTV layer. These silver sintered preforms are particularly suitable for die-attach applications since the usual equipment can be used for this purpose.
Analog zu den Verbindungsstrukturen auf Basis von Silber sind andere Materialien auf Kupferbasis für den Fachmann bekannt, die für sich oder in Kombination mit den Silberkomponenten anwendbar sind, beispielsweise wurde auf diese Weise mit einer Mischung aus 80% Silberflakes, 2% Silberlaktat oder Silberoxid in Terpiniol oder harzfreiem Flussmittel eine sehr homogene, lunkerfreie Schicht erstellt. Die Form der Strukturen wurde optimal an die Chipgröße angepasst. Die Befestigung von Chips in tieferliegenden Bereichen, z. B. Leadframes in Wannenform, würde einfach umgesetzt. In der Produktion sind somit keine Druckmaschinen mehr erforderlich und es entfällt die entsprechende Reinigung dieser Maschinen. Die Paste ließe sich auf PES-Folien drucken und bei 120°C trocknen. Chips mit Au-Unterseitenfinish konnten mittels Flip-Chip-Bonder auf einen Ag-Frame appliziert werden.Analogous silver-based interconnect structures are other materials based on copper known to those skilled in the art for are applicable or in combination with the silver components, for example, this was done with a mix of 80% Silver flakes, 2% silver lactate or silver oxide in terpiniol or Resin-free flux created a very homogeneous, void-free layer. The shape of the structures was optimally adapted to the chip size. The attachment of chips in deeper areas, such. Eg leadframes in tub form, would be implemented easily. In production Thus, no more printing presses are required and it is unnecessary the appropriate cleaning of these machines. The paste would leave print on PES films and dry at 120 ° C. crisps with Au bottom finish could flip to a Ag frame using flip-chip bonder be applied.
ZITATE ENTHALTEN IN DER BESCHREIBUNGQUOTES INCLUDE IN THE DESCRIPTION
Diese Liste der vom Anmelder aufgeführten Dokumente wurde automatisiert erzeugt und ist ausschließlich zur besseren Information des Lesers aufgenommen. Die Liste ist nicht Bestandteil der deutschen Patent- bzw. Gebrauchsmusteranmeldung. Das DPMA übernimmt keinerlei Haftung für etwaige Fehler oder Auslassungen.This list The documents listed by the applicant have been automated generated and is solely for better information recorded by the reader. The list is not part of the German Patent or utility model application. The DPMA takes over no liability for any errors or omissions.
Zitierte PatentliteraturCited patent literature
- - WO 2004/026526 [0002] WO 2004/026526 [0002]
- - US 6951666 [0002] - US 6951666 [0002]
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Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102011109226A1 (en) * | 2011-08-02 | 2013-02-07 | Osram Opto Semiconductors Gmbh | Method for establishing interconnection layer between e.g. ceramic carrier and LED chip, involves providing mixture with particulate sinter material and solvent, and supplying heat for fusion of sinter material in inert gas atmosphere |
DE102011083926A1 (en) * | 2011-09-30 | 2013-04-04 | Robert Bosch Gmbh | Layer composite of a carrier film and a layer arrangement comprising a sinterable layer of at least one metal powder and a solder layer |
CN103959448A (en) * | 2011-11-18 | 2014-07-30 | 田中贵金属工业株式会社 | Transfer substrate for forming metal wiring line and method for forming metal wiring line by means of said transfer substrate |
DE102013104572A1 (en) * | 2013-05-03 | 2014-11-06 | Osram Opto Semiconductors Gmbh | Method for forming an optoelectronic assembly and optoelectronic assembly |
DE102014109766B3 (en) * | 2014-07-11 | 2015-04-02 | Heraeus Deutschland GmbH & Co. KG | Method for producing a substrate adapter, substrate adapter and method for contacting a semiconductor element |
EP2645409A4 (en) * | 2010-11-26 | 2016-01-06 | Tanaka Precious Metal Ind | Transfer substrate for forming metal wiring and method for forming metal wiring using said transfer substrate |
EP2858101A3 (en) * | 2013-09-10 | 2016-01-27 | Kabushiki Kaisha Toshiba | Paste comprising first metal particles and a polar solvent with a second metal dissolved therein, cured product obtained therefrom, and semiconductor device comprising the cured product |
DE102015107724A1 (en) * | 2015-04-02 | 2016-10-06 | Heraeus Deutschland GmbH & Co. KG | Method for producing a substrate arrangement, substrate arrangement, method for connecting an electronic component to a substrate arrangement and electronic component |
DE102018221148A1 (en) | 2018-12-06 | 2020-06-10 | Heraeus Deutschland GmbH & Co. KG | Method for producing a substrate adapter and substrate adapter for connecting to an electronic component |
EP3772088A3 (en) * | 2019-08-02 | 2021-05-12 | Rockwell Collins, Inc. | Method for die attach using planarized die-attach preforms |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004026526A1 (en) | 2002-09-18 | 2004-04-01 | Ebara Corporation | Bonding material and bonding method |
US6951666B2 (en) | 2001-10-05 | 2005-10-04 | Cabot Corporation | Precursor compositions for the deposition of electrically conductive features |
DE102004019567B3 (en) * | 2004-04-22 | 2006-01-12 | Semikron Elektronik Gmbh & Co. Kg | Securing electronic components to substrate by subjecting the electronic component, supporting film and paste-like layer to pressure and connecting the substrate and the component by sintering |
DE102006031844A1 (en) * | 2006-07-07 | 2008-01-10 | Technische Universität Braunschweig Carolo-Wilhelmina | Method for fastening electrical components to a carrier by pressure sintering and circuit arrangement |
-
2009
- 2009-04-24 DE DE102009018541A patent/DE102009018541A1/en not_active Ceased
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6951666B2 (en) | 2001-10-05 | 2005-10-04 | Cabot Corporation | Precursor compositions for the deposition of electrically conductive features |
WO2004026526A1 (en) | 2002-09-18 | 2004-04-01 | Ebara Corporation | Bonding material and bonding method |
DE102004019567B3 (en) * | 2004-04-22 | 2006-01-12 | Semikron Elektronik Gmbh & Co. Kg | Securing electronic components to substrate by subjecting the electronic component, supporting film and paste-like layer to pressure and connecting the substrate and the component by sintering |
DE102006031844A1 (en) * | 2006-07-07 | 2008-01-10 | Technische Universität Braunschweig Carolo-Wilhelmina | Method for fastening electrical components to a carrier by pressure sintering and circuit arrangement |
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EP2645409A4 (en) * | 2010-11-26 | 2016-01-06 | Tanaka Precious Metal Ind | Transfer substrate for forming metal wiring and method for forming metal wiring using said transfer substrate |
DE102011109226A1 (en) * | 2011-08-02 | 2013-02-07 | Osram Opto Semiconductors Gmbh | Method for establishing interconnection layer between e.g. ceramic carrier and LED chip, involves providing mixture with particulate sinter material and solvent, and supplying heat for fusion of sinter material in inert gas atmosphere |
DE102011083926A1 (en) * | 2011-09-30 | 2013-04-04 | Robert Bosch Gmbh | Layer composite of a carrier film and a layer arrangement comprising a sinterable layer of at least one metal powder and a solder layer |
CN103959448B (en) * | 2011-11-18 | 2017-04-26 | 田中贵金属工业株式会社 | Transfer substrate for forming metal wiring line and method for forming metal wiring line by means of said transfer substrate |
CN103959448A (en) * | 2011-11-18 | 2014-07-30 | 田中贵金属工业株式会社 | Transfer substrate for forming metal wiring line and method for forming metal wiring line by means of said transfer substrate |
US10256113B2 (en) | 2011-11-18 | 2019-04-09 | Tanaka Kikinzoku Kogyo K.K. | Transfer substrate for forming metal wiring and method for forming metal wiring with the transfer substrate |
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DE102013104572A1 (en) * | 2013-05-03 | 2014-11-06 | Osram Opto Semiconductors Gmbh | Method for forming an optoelectronic assembly and optoelectronic assembly |
US10086478B2 (en) | 2013-09-10 | 2018-10-02 | Kabushiki Kaisha Toshiba | Metallic particle paste, cured product using same, and semiconductor device |
EP2858101A3 (en) * | 2013-09-10 | 2016-01-27 | Kabushiki Kaisha Toshiba | Paste comprising first metal particles and a polar solvent with a second metal dissolved therein, cured product obtained therefrom, and semiconductor device comprising the cured product |
WO2016005146A1 (en) * | 2014-07-11 | 2016-01-14 | Heraeus Deutschland Gmbh | Method for producing a substrate adapter, substrate adapter, and method for contacting a semiconductor element |
DE102014109766B3 (en) * | 2014-07-11 | 2015-04-02 | Heraeus Deutschland GmbH & Co. KG | Method for producing a substrate adapter, substrate adapter and method for contacting a semiconductor element |
DE102015107724A1 (en) * | 2015-04-02 | 2016-10-06 | Heraeus Deutschland GmbH & Co. KG | Method for producing a substrate arrangement, substrate arrangement, method for connecting an electronic component to a substrate arrangement and electronic component |
DE102015107724B4 (en) * | 2015-04-02 | 2016-12-01 | Heraeus Deutschland GmbH & Co. KG | Method for producing a substrate arrangement, substrate arrangement, method for connecting an electronic component to a substrate arrangement and electronic component |
DE102018221148A1 (en) | 2018-12-06 | 2020-06-10 | Heraeus Deutschland GmbH & Co. KG | Method for producing a substrate adapter and substrate adapter for connecting to an electronic component |
EP3675153A1 (en) | 2018-12-06 | 2020-07-01 | Heraeus Deutschland GmbH & Co KG | Method for producing a substrate adapter and substrate adapter for connecting to an electronics component |
US11440310B2 (en) | 2018-12-06 | 2022-09-13 | Heraeus Deutschland GmbH & Co. KG | Method for producing a substrate adapter and substrate adapter for connecting to an electronic component |
EP3772088A3 (en) * | 2019-08-02 | 2021-05-12 | Rockwell Collins, Inc. | Method for die attach using planarized die-attach preforms |
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