JPH03276374A - Tracking device for logic simulation result - Google Patents

Abstract

PURPOSE:To track the cause of a defect with high efficiency by tracing back a logic circuit via a signal line where a defective phenomenon is detected and retrieving and displaying automatically a circuit that causes the defect as well as the simulation result of the circuit. CONSTITUTION:The signal line name, the searching subject time, and the searching conditions of the signal value which are included in a logic circuit diagram designated by a user are fetched and interpreted by a user designation reading/ interpreting part 807 from a display device 809 via a display controller 808. Then a precedent stage element which defines a designated signal line name as an output signal is searched. The logic circuit drawing and the signal waveform are displayed at a logic circuit drawing display part 804 and a simulation result display part 805, which is matched with the designated conditions. A signal history is obtained based on the designated searching time and the signal value, and the output signal value, the time, etc., are sent to the part 805 and displayed 809 via a controller 808. Then a signal/register list is searched and one page of a logic circuit drawing information store table is taken out and sent to the part 804 to be display 809 via the controller 808.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a simulation result tracking device in logic simulation of logic circuits.

[Prior art]

In conventional interactive simulation systems, the following methods have been used to display logical simulation results.

(1) Displaying a part of the simulation result such as a time chart and a corresponding part of the logic circuit on the same screen.

(2) When a certain signal value in the logic circuit displayed on the screen is specified, the state value of that part is displayed on the same screen.

All of these display methods facilitate analysis of the results by displaying the simulation execution results and the target circuit on the same screen.

Regarding conventional methods of this kind, for example, see N.C.M., I.E., Proceedings of the 20th Design Automation Conference (1983), pp. 246 to 252 (ACM
IEEE 20th Design Auto+a
tion Conference Proceedings-
dings (1983) pp, 246-252)
and Proceedings of the 21st Design Automation Conference (1984), pp. 24-31 (ACM IEEE 21stD si
gn AutolIation Conference
nce racing (1984)
pp, 24-31).

[Problem to be solved by the invention]

The above conventional technology has the following problems.

In other words, (1) If a defect is found in a signal line on the logic diagram, the user traces back the signals on the input side of the signal line and investigates changes in signal values. There was a problem in that it was necessary to switch and trace, and if the target logic circuit spanned multiple design files, it was necessary to trace while looking at the drawing.

(2) Furthermore, when tracing back to the input side to investigate the cause of the failure, it is not efficient because it depends on the user's experience as to which signal line and at which point in the wide circuit range the signal value should be investigated to determine the cause. There was a problem that it was not possible to conduct a detailed search.

The present invention has been made to solve the above problems.

SUMMARY OF THE INVENTION An object of the present invention is to provide a logic simulation result tracking device that can efficiently track and search for the cause of a defect.

[Means to solve the problem]

In order to achieve the above object, the present invention provides a system for tracking and displaying logic simulation results, including means for displaying a logic circuit on a screen.

means for specifying an arbitrary signal line name in the logic circuit; means for tracing from the specified signal line name to the input side of the logic circuit; The present invention includes means for displaying information on the signal line/circuit element associated with the signal line name, and a circuit including the signal line/circuit element.

[For production]

Import and interpret the signal line name, search target time, and signal value search conditions in the logic circuit diagram specified by the user, refer to the signal/register list from the specified signal line name, and create the corresponding logical expression table. An address is obtained, a source gate pointer of a logic display table is obtained based on the address, and all preceding elements for the element whose output signal is the user-specified signal line name are searched. Check the found front-stage elements to see if they match the conditions specified by the user, and if they match,
The logic circuit diagram and signal waveforms are displayed.

〔Example〕

Hereinafter, one embodiment of the present invention will be specifically described using the drawings.

Embodiments of the present invention will be described by taking as an example a simulation system in which a logic simulation result and a logic circuit diagram including signal lines, registers, etc. displaying the result are displayed on the same screen.

FIG. 1 shows a display screen that displays the results of a logic simulation, where 100 is the entire result display screen, 101 is a logic circuit diagram including signal lines displaying the results, and 102
shows the signal waveform that is the simulation result.

FIG. 2(a) shows a partial circuit of a simulated logic device whose operation is to be verified for correctness by logic simulation. 201 to 203 each indicate one page of the logic circuit diagram displayed on the display screen. 210 is an AND gate; 220 is an output signal line of the AND gate;
21 and 222 are input signal lines of the AND gate.

Further, 211 and 212 are preceding AND gates connected to the AND gate 210, and 223, 224
is the input signal line of AND gate 211, 225.226
is the input signal line of the AND gate 212. Same figure (b)
230 to 234 are signal waveforms of the signal lines 220 to 224. Here, X indicates that the value of the signal is an uncertain value, indicating that a design defect may exist.

Usually, the reason why the value of a certain signal line becomes an uncertain value can be discovered by tracing the signal line back to the input side. In the example of FIG. 2, in order to investigate the cause of the signal line 220 becoming an uncertain value, the AND gate 2 which is the output gate of 220 must be
Signal waveform 231.232 of 1G input line 221.222
Display and investigate. In this example, since the signal waveform of the signal line 221 includes an uncertain value, the signal waveforms 233 and 234 of the signal lines 223 and 224 are similarly displayed and the logic circuit diagram thereof is examined. It can be found that no logic element is connected to 223.

FIG. 3 is a signal/register list 300 included in the simulation target logic circuit. Reference numeral 301 is a code for the list, which stores information on each signal/register.

302 is the signal line name or register name, 303 is the signal line name or register name, and 303 is the signal line name or register name.
This is the address to the logic display table that shows the connection status of the register. Specifically, in the case of a signal line, it is the address of the logic display table that has the signal line as an output, and in the case of a register, it is the address of the logic display table of the register. be. 304 indicates an address to a logic circuit drawing information storage table in which the signal/register is included.

FIG. 4 is a logical display table showing the connection status of elements. 4
01 to 403 represent elements such as AND gates and OR gates, respectively. 404 is the address of the corresponding record in the signal/register table in FIG. 3, 405 is the address of the logic table corresponding to the source gate of the element, and 406 is the address of the logic table corresponding to the sink gate of the element. Indicates an address.

FIG. 5 is a logic circuit drawing information storage table, 501 to 5
01 corresponds to one page of the logic circuit drawing, respectively.

FIG. 6 is a front-stage element storage table for temporarily storing information on the front-stage element when tracking the front-stage element, and 601 is an address of the logical view table corresponding to the front-stage element. Third
Signal/register list in Figure 4, logic display table in Figure 5,
By using the logic circuit diagram information storage table and the previous stage element storage table in the figure, it is possible to trace back the previous stage of the signal for any signal line name and find the logic circuit diagram that includes the signal that is the source of the signal.

FIG. 7 is a signal value history table, which stores the change history of signal values for signal lines in the simulated logic circuit during the simulation, and 701 shows signals that changed at a certain arbitrary time and their values. The collected and stored records, 702, are change times.

703 is the address of the corresponding logical display table representing the signal line;
704 is a change signal value of the signal at the time.

FIG. 8 is a block diagram of one embodiment of the present invention. The signal/register list and logic display table mentioned above.

Logic circuit drawing information storage table, previous stage element storage table, and signal history table are stored in memory 80! Served inside. In addition, the simulation result 811 includes a history of changes in signal values for signal lines in the logic circuit to be simulated, which is stored on an external storage device. The simulation results are read into the memory by a result reading device [81G] as required in response to a request from a controller 803 that controls the entire apparatus. Based on the contents of the logic circuit drawing information storage table and the signal value history table prepared on the memory 801, the logic circuit drawing display section 80
4, the logic circuit diagram is edited, and the simulation result display unit 805 edits the simulation results and displays them on the display device 809 via the display system controller 80g.

Further, the user's specifications, such as the designation of the tracking signal line name and the method of editing the simulation results, are taken into the user specification reading/interpretation unit 807 via the display device 809 and the display system controller 808. The device 807 sends the user specified information to the controller 803 and the back trace device 802.
give it to Based on the user-specified information, the backtrace device 802 creates a signal/register list prepared in the memory,
The preceding stage elements are tracked using the logic display table, logic circuit drawing information storage table, previous stage element storage table, and signal value history table.

Related logic circuit drawings and simulation result information are found and displayed on the display device 809 by the logic circuit drawing display section 804 and simulation result display section 805. If there is no previous element to be tracked, etc., the user will be notified of the information. Or, when issuing a request, the command display section 806
Outputs a message.

FIG. 9 shows a processing flowchart of the present invention, in which the tracking signal line name specified by the user on the display device 809,
A backtrace is performed based on signal values, etc., and a desired logic circuit diagram and signal waveforms are displayed to the user in the format shown in FIG.

The processing procedure of the present invention will be explained below. First, all records in the previous stage element storage table (FIG. 6) are initialized (901).
The signal line name, search target time, and signal value search conditions in the logic circuit diagram specified by the user are imported (902). This information is transmitted from the display device 809 to the display system controller 808.
The data is read into the user-specified reading/interpretation unit 807, interpreted, and sent to the controller 803 and backtrace device M802. In processes 903 and 904, the signal/register list (Figure 3) is referred to from the specified signal line name, the corresponding logical expression table address is obtained, and the logical expression table (Figure 4) is created based on the address. ), and find all the preceding elements for the element whose output signal is the user-specified signal line name. The pre-stage elements found through this process are registered in the pre-stage element storage table shown in FIG.

Next, in processes 905 to 907, the previously found front-stage elements are checked to see if they match the conditions specified by the user, and if they match, the logic circuit drawing display section 804 and
A simulation result display section 805 displays the logic circuit diagram and signal waveforms. In process 905, the logical expression table address 601 is extracted from the previous stage element storage table, and the signal value history table (FIG. 7) is searched using the address, search time and signal value given by the user in process 901 as keys. If the desired signal history is found, the process moves to logic circuit diagram and signal waveform display processing 907 for the previous stage element.

If not found, the next record in the previous stage element storage table is processed (906). Further, if the signal history corresponding to the search time is not prepared on the memory 801, the result reading device 810 reads the simulation result 811 on the external storage device and expands it on the memory 801. In process 907, the output signal value 706, time 702, and logical expression table address 705 of the previous stage element for which the desired signal history has been found are displayed in the simulation result display section 805.
The simulation waveform is displayed via the display system controller 808 and the display device. Furthermore, the signal/register list (
3), find the corresponding logic circuit drawing information storage table address 304, retrieve one page of the logic circuit drawing information storage table based on it, and display the logic circuit drawing display section 804.
The logic circuit drawing is displayed via the display system controller 808 and the display unit W809.

In addition to displaying the simulation waveforms and logic circuit drawings, a command display section 806 requests user commands. Based on the user's command, information is obtained as to whether to abort the search, track an element further preceding the currently displayed previous element, or display another previous element (908).

If the search is aborted, the process ends (909), and if a backtrace is to be performed for the previous element, the previous element being displayed is used as the search start element and the process returns to process 901 to repeat the same process (910), etc. If you want to display the previous stage elements of , retrieve the next record from the previous stage element storage table (Figure 6) and perform the process 6 or more, which returns to step 905, for all the previous stage elements registered in the previous stage element storage table. Execute (911) - Also, the conditions of the previous stage element to be searched are
- For example, even if a signal change is added such that it becomes an uncertain value between times t1 and t2, this can be handled by expanding the search range of the signal value history table (Fig. 7) to t1 to t2 in process 905. In addition, even if the range of pre-stage elements to be searched is expanded not only to one stage before the tracking ylJ starting element as in this embodiment but also to two stages before, the first-stage pre-stage element is After registering in the storage table, by performing the same processing as the original process 904 on these first-stage pre-stage elements, the pre-stage elements two stages before can be found.

〔Effect of the invention〕

As described above, according to the present invention, when a defective phenomenon is discovered in logic simulation, the signal line where the defective phenomenon was discovered is checked while looking at the execution results of the logic simulation and the logic circuit diagram of the logic device to be simulated. Since the logic circuits can be traced back from the beginning to automatically search for and display the circuits that cause the defect phenomenon and their simulation results, it is possible to efficiently trace the cause of the defect in the logic device to be simulated.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a simulation result display screen, FIGS. 2(a) and 2(b) are diagrams showing partial circuits of a logic device subject to logic simulation and their signal waveforms, and FIG. 3 is a diagram showing signals. /The figure showing the register list, Figure 4,
A diagram showing a logical display table. FIG. 5 is a diagram showing a logic circuit drawing information storage table, FIG. 6 is a diagram showing a previous stage element storage table, FIG. 7 is a diagram showing a signal value history table, and FIG. 8 is a diagram showing one example of the present invention. FIG. 2 is a block diagram of an embodiment. FIG. 9 is a processing flowchart of the present invention. In the figure, 100...Result display screen, 300...Signal/
Register list, 405...Address of logical display table,
501-503...Logic circuit drawing information storage table, 601
...Address of the logical display table corresponding to the previous stage element, 70
1...Record that collects and stores signals that change at arbitrary times and their values, 811...Simulation results, 8
02... Back trace device, 805... Simulation result display section.

Claims (1)

[Claims] 1. In a system for tracking and displaying logic simulation results, means for displaying a logic circuit on a screen, means for specifying an arbitrary signal line name within the logic circuit, and means for specifying the name of an arbitrary signal line within the logic circuit; A means for tracing a signal line name to the input side of a logic circuit, and information on a signal line/circuit element associated with the specified signal line name from the circuit searched by the tracing means, and information on the signal line/circuit element associated with the specified signal line name. A logic simulation result tracking device comprising means for displaying a circuit including circuit elements. 2. The logic simulation result tracking device according to claim 1, wherein the specifying means further includes time and signal values as search conditions. 3. The tracking means refers to a table representing the connection status of elements from the signal line name specified by the specifying means,
2. The logic simulation result tracking device according to claim 1, wherein all preceding stage elements that output the signal line name are searched.