JPH03276074A - Information processor - Google Patents

Information processor

Info

Publication number
JPH03276074A
JPH03276074A JP7805290A JP7805290A JPH03276074A JP H03276074 A JPH03276074 A JP H03276074A JP 7805290 A JP7805290 A JP 7805290A JP 7805290 A JP7805290 A JP 7805290A JP H03276074 A JPH03276074 A JP H03276074A
Authority
JP
Japan
Prior art keywords
waveform
flip
flop
signal
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7805290A
Other languages
Japanese (ja)
Inventor
Hirohiko Koike
小池 裕彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP7805290A priority Critical patent/JPH03276074A/en
Publication of JPH03276074A publication Critical patent/JPH03276074A/en
Pending legal-status Critical Current

Links

Landscapes

  • Tests Of Electronic Circuits (AREA)

Abstract

PURPOSE:To easily adjust a waveform by setting and resetting a flip-flop by a process or in a device with an external indication, generating a waveform which has a specific period, and inputting its signal to the input terminal of a waveform adjusting circuit. CONSTITUTION:When a switch 2 is turned ON, the processor 3 sets and resets the flip-flop 4 to input the constant-period signal to a switching means 5. Further, the switching means 5 makes the input signal ineffective and the output of the flip-flop 4 effective by the turning-on operation of the switch 2. The waveform adjusting circuit 6 inputs the constant-period signal at this time, so a waveform adjustment measurement point 11 is measured through an oscilloscope and the output terminal of a delay line 9 is adjusted.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は情報処理装置、特にディレィラインの出力端子
との接続を変えることにより、信号の波形を調節する波
形調節回路を有する情報処理装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an information processing device, and particularly to an information processing device having a waveform adjustment circuit that adjusts the waveform of a signal by changing the connection with the output terminal of a delay line. .

〔従来の技術〕[Conventional technology]

従来、この種の情報処理装置においては、波形調節回路
の入力を外部信号に切り換える手段を有し、装置外部よ
り周期的に信号を入力し、ディレィラインの複数の出力
の内、最適なものを選択し、波形の調節を行なっていた
Conventionally, this type of information processing device has a means for switching the input of the waveform adjustment circuit to an external signal, and periodically inputs the signal from outside the device, and selects the optimal one among the multiple outputs of the delay line. I selected it and adjusted the waveform.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の情報処理装置においては、ディレィライ
ンの複数の出力端子の内、最適なものを選択し、波形の
調節を行なうのに、外部より一定周期の波形を入力する
必要がある。この為、波形調節時に測定器が必要となる
他、測定器の操作に時間がかかってしまい、調節に必要
な時間が長くなってしまうという欠点がある。
In the conventional information processing apparatus described above, it is necessary to input a waveform of a constant period from the outside in order to select the optimum one among the plurality of output terminals of the delay line and adjust the waveform. For this reason, a measuring device is required when adjusting the waveform, and it also takes time to operate the measuring device, resulting in a disadvantage that the time required for adjustment becomes longer.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の情報処理装置は、ディレィラインの出力端子と
の接続を変える事により信号の波形を調節する波形調節
回路と、 プロセッサよりセット・リセット可能なフリップフロラ
7°と、 該フリップフロップの出力を前記波形調節回路の入力と
して選択できる切り換え手段と、前記プロセッサに前記
フリップフロップのセット・リセットを一定周期で行な
う事を指示する指示手段とを有する事を特徴とする。
The information processing device of the present invention includes: a waveform adjustment circuit that adjusts the waveform of a signal by changing the connection with the output terminal of a delay line; a flip-flop 7° that can be set and reset by a processor; It is characterized by comprising a switching means that can be selected as an input to the waveform adjustment circuit, and an instruction means for instructing the processor to set and reset the flip-flop at a constant cycle.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing one embodiment of the present invention.

1は情報処理装置、2はスイッチ(以下SWと記す)、
3はプロセッサ、4はフリップフロップ、5は切り換え
手段、6は波形調節回路、7と8は回路、9はディレィ
ライン、10は入力信号、11は波形調節測定ポイント
である。
1 is an information processing device, 2 is a switch (hereinafter referred to as SW),
3 is a processor, 4 is a flip-flop, 5 is a switching means, 6 is a waveform adjustment circuit, 7 and 8 are circuits, 9 is a delay line, 10 is an input signal, and 11 is a waveform adjustment measurement point.

SW2がONとすると、プロセッサ3はフリップフロッ
プ4をセット・リセットし、一定周期の信号を切り換え
手段5に入力する。又、切り換え手段5は、SW2がO
Nになった事で入力信号10を無効とし、フリップフロ
ップ4の出力を有効とする。
When SW2 is turned on, the processor 3 sets and resets the flip-flop 4, and inputs a constant cycle signal to the switching means 5. Further, the switching means 5 has SW2 set to O.
Since it becomes N, the input signal 10 is made invalid and the output of the flip-flop 4 is made valid.

波形調節回路6には、この時、一定周期の信号が入力さ
れるので、波形調節測定ポイン)11をオシロスコープ
で測定しディレィライン9の出力端子を調節する。
At this time, a signal with a constant period is input to the waveform adjustment circuit 6, so the waveform adjustment measurement point 11 is measured with an oscilloscope and the output terminal of the delay line 9 is adjusted.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、外部からの指示で装置内
プロセッサがフリップフロップをセット・リセットし、
一定周期の波形を作成し、波形調節回路の入力端子にこ
の信号を入力することにより、波形調節時、測定器なし
で簡単にディレィラインの最適出力端子を検出し、波形
調節できる効果がある。
As explained above, in the present invention, a processor within a device sets and resets a flip-flop based on instructions from the outside,
By creating a waveform with a constant period and inputting this signal to the input terminal of the waveform adjustment circuit, the optimum output terminal of the delay line can be easily detected and the waveform can be adjusted without a measuring device when adjusting the waveform.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示すブロック図である。 1・・・・・・情報処理装置、2・・・・・・スイッチ
(SW)、3・・・・・・プロセッサ、4・・・・・・
フリップフロップ、5・・・・・・切り換え手段、6・
・・・・・波形調節回路、7゜8・・・・・・回路、9
・・・・・・ディレィライン、10・・・・・・入力信
号、11・・・・・・波形調節測定ポイント。
FIG. 1 is a block diagram showing one embodiment of the present invention. 1... Information processing device, 2... Switch (SW), 3... Processor, 4...
Flip-flop, 5...Switching means, 6.
...Waveform adjustment circuit, 7゜8...Circuit, 9
... Delay line, 10 ... Input signal, 11 ... Waveform adjustment measurement point.

Claims (1)

【特許請求の範囲】 ディレイラインの出力端子との接続を変える事により信
号の波形を調節する波形調節回路と、プロセッサよりセ
ット・リセット可能なフリップフロップと、 該フリップフロップの出力を前記波形調節回路の入力と
して選択できる切り換え手段と、 前記プロセッサに前記フリップフロップのセット・リセ
ットを一定周期で行なう事を指示する指示手段とを有す
る事を特徴とする情報処理装置。
[Scope of Claims] A waveform adjustment circuit that adjusts the waveform of a signal by changing the connection to an output terminal of a delay line, a flip-flop that can be set and reset by a processor, and the waveform adjustment circuit that adjusts the output of the flip-flop. An information processing device comprising: switching means that can be selected as an input; and instruction means for instructing the processor to set and reset the flip-flop at a constant cycle.
JP7805290A 1990-03-27 1990-03-27 Information processor Pending JPH03276074A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7805290A JPH03276074A (en) 1990-03-27 1990-03-27 Information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7805290A JPH03276074A (en) 1990-03-27 1990-03-27 Information processor

Publications (1)

Publication Number Publication Date
JPH03276074A true JPH03276074A (en) 1991-12-06

Family

ID=13651081

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7805290A Pending JPH03276074A (en) 1990-03-27 1990-03-27 Information processor

Country Status (1)

Country Link
JP (1) JPH03276074A (en)

Similar Documents

Publication Publication Date Title
KR960032138A (en) Microcomputer
JPH03276074A (en) Information processor
JPS6378610A (en) Double clock generation circuit
JPH08139575A (en) Pulse output circuit
JPS5447443A (en) Semiconductor memory unit
JPH01256212A (en) Two-way buffer circuit
JPS5248729A (en) Air-fuel ratio controller
JPH04209020A (en) Microcomputer
SU399802A1 (en) DEVICE FOR CONTROL OF ELECTRICAL PARAMETERS
JPS6013591B2 (en) Multi-point scanning method
JPH04205220A (en) A/d conversion device
JPH0150927B2 (en)
JPS6285302A (en) Input device for programmable controller
JPS5911434A (en) Digital input circuit
JPH03139019A (en) Unipolar/bipolar conversion circuit
JPH01270103A (en) Digital servo circuit
JPH04278613A (en) Clock device of duplex constitution
JPH0628197A (en) Control system for acceptance of switching request signal
JPS61284113A (en) Timer circuit
JPS5860445A (en) Magnetic recording and reproducing device
JPS54130842A (en) Method address generator
JPH03127930U (en)
JPH05153102A (en) Clock disconnection detecting circuit
JPS62131756A (en) Triac controller
JPH05241679A (en) Integrated circuit incorporating clock skew adjustment circuit