JPH0327528A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To mitigate unevenness on a surface to prevent breakage of second layer wiring for improving manufacturing yield by a method wherein first silicate glass adhered on first layer wiring is thermally treated and etched, and second silicate glass is adhered thereon to be thermally treated. CONSTITUTION:A silicon oxide film 2 is provided on the surface of the substrate 1, and first layer wiring 3 of polycrystal silicon is formed thereon to have a first silicate glass film 4 adhered entirely. Then after the film 4 is heated and reflowed to mitigate the unevenness of the surface, this is etched until a part of the film 2 is exposed. Then after a second silicate glass film 5 is adhered, this is heated to further relax the unevenness of the surface to have an interlayer insulation film formed. Thus breakage of the second layer wiring formed on the interlayer insulation film can be prevented to improve manufacturing yield.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing an interlayer insulating film.

[Conventional technology]

Conventionally, as a method for manufacturing an interlayer insulating film of a semiconductor device, the third method has been used.
The method shown in the figure is used.

That is, as shown in FIG. 3(a), a silicon oxide film 12 is formed on the surface of a silicon substrate 1l, and a first layer wiring 13 made of a polycrystalline silicon film in a desired pattern is formed thereon. . And on top of this, silane (SiH4),
A borophosphosilicate glass (BPSG) film 14 is deposited by an atmospheric pressure chemical vapor deposition method using phosphine (PH.), diporane (B2H6), and oxygen (02) as source gases.

Then, as shown in FIG. 3(b), the BPSG film 14 is reflowed by heat treatment to smooth the surface and reduce surface irregularities. Note that if the contents of boron and phosphorus in the BPSG film 14 are both 4wt%, the temperature at 900'C
The above-mentioned reflow can be achieved by heat treatment.

After that, although not shown, BPS is formed as an interlayer insulating film.
GI! Needless to say, the second layer wiring is formed on 14.

[Problem to be solved by the invention]

In the conventional interlayer insulating film manufacturing method described above, as the interconnect width and interconnect spacing of the first layer interconnect 13 become finer as semiconductor devices become more highly integrated, the step difference in the first layer interconnect 13 becomes significant. Even if the BPSG film 14 is reflowed as described above, it is difficult to alleviate the level difference on the surface. For this reason, there is a problem that the coverage of the second layer wiring formed thereon is deteriorated, leading to breakage of the second layer wiring, etc., which leads to a decrease in the manufacturing yield of semiconductor devices.

An object of the present invention is to provide a method for manufacturing a semiconductor device that makes it possible to form an interlayer insulating film with a planarized surface.

[Means to solve the problem]

The manufacturing method of the present invention includes fixing the first silicate glass on the first layer wiring, heat-treating it to reduce the surface level difference, and anisotropically etching the first silicate glass to increase the film thickness. and a step of depositing a second silicate glass on the entire surface and heat-treating the surface to reduce the surface level difference.

[Effect]

In this manufacturing method, by heat treatment and anisotropic etching of the first silicate glass, it is possible to reduce the level difference in the first layer wiring, and further, by heat treating the second silicate glass, the level difference on the surface thereof can be effectively alleviated. becomes possible.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) to 1(e) are longitudinal sectional views showing an embodiment of the present invention in the order of manufacturing steps.

First, as shown in FIG. 1(a), a silicon oxide film 2 is formed on the surface of a silicon substrate l, and a first layer wiring 3 made of a polycrystalline silicon film in a desired pattern is formed on this film. . Then, on top of this, the first
Apply BPSGll beauty 4.

Then, as shown in FIG. 1(b), the first B PSG
The film 4 is heated and reflowed to reduce surface irregularities. Thereafter, as shown in FIG. 1(c), the first BPSG film 4 is etched by reactive ion etching until a portion of the silicon oxide film 2 is exposed. As a result, the first BPSG film 4 is left only on the side surfaces of the first layer wiring 3, and the steep step difference at the end of the first layer wiring 3 is alleviated.

Note that during this reflow and etching, the first B
Since the surface shape differs depending on the content of boron and phosphorus contained in the PSG film 4, the content is set to an appropriate value.

Next, as shown in FIG. 1(d), a second BPSG film 5 is deposited on the entire surface in the same manner. And this second BP
By heating and reflowing the SG film 5, as shown in FIG.
An interlayer insulating film whose surface roughness is further reduced as shown in FIG.

Therefore, the step break of the second layer wiring formed thereon is prevented, and the manufacturing yield is improved.

Here, if there is no significant level difference on the surface of the interlayer insulating film, only a part of the BPSG film 4 is etched in the reactive ion etching process of the first BPSG film 4 shown in FIG. 1(C). You can.

As a result, an interlayer insulating film having the structure shown in FIG. 2 can be formed.

In addition, in the above embodiment, B was added to each of the first and second silicate glasses.
Although PSG is used, it may be a silicate glass containing only boron or only phosphorus, and the same effect as in the above embodiment can be obtained.

〔Effect of the invention〕

As explained above, in the present invention, the first silicate glass deposited on the L-layer wiring is heat treated and anisotropically etched, and the second silicate glass is further deposited and heat treated on top of the first silicate glass. Therefore, the unevenness on the surface of the second silicate glass, that is, the surface of the interlayer insulating film is alleviated, and the coverage of the second wiring formed on the upper side is improved, and wiring with a high manufacturing yield is prevented from breaking. structure can be obtained.

[Brief explanation of drawings]

FIGS. 1(a) to (e) are longitudinal cross-sectional views showing one embodiment of the present invention in the order of manufacturing steps, FIG. 2 is a longitudinal cross-sectional view of another embodiment of the present invention, and FIGS. 3(a) and ( b) is a vertical cross-sectional view showing the conventional method for manufacturing a glabellar insulating film in order of steps; 1... Silicon substrate, 2... Silicon oxide film, 3.
...First layer wiring, 4...First BPSG film, 5...Second BPSG film, 1l...Silicon substrate, 12...Silicon oxide film, 13...Lth layer wiring, 14...B
PSG membrane. ▼Ichiichi C Ri regrettable

Claims (1)

[Claims] 1. Fixing by depositing a first silicate glass on the first layer wiring formed on the semiconductor substrate and heat-treating it to reduce the surface level difference;
It is characterized by including a step of anisotropically etching the first silicate glass to reduce its film thickness, and a step of depositing a second silicate glass on the entire surface and heat-treating it to reduce the surface level difference. A method for manufacturing a semiconductor device.