KR940004410B1 - Flatting method of semiconductor device - Google Patents
Flatting method of semiconductor device Download PDFInfo
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- KR940004410B1 KR940004410B1 KR1019900020910A KR900020910A KR940004410B1 KR 940004410 B1 KR940004410 B1 KR 940004410B1 KR 1019900020910 A KR1019900020910 A KR 1019900020910A KR 900020910 A KR900020910 A KR 900020910A KR 940004410 B1 KR940004410 B1 KR 940004410B1
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- bpsg film
- bpsg
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 15
- 238000000034 method Methods 0.000 title claims description 32
- 239000007772 electrode material Substances 0.000 claims abstract description 9
- 238000005530 etching Methods 0.000 claims abstract description 6
- 239000000758 substrate Substances 0.000 claims abstract description 5
- 239000005380 borophosphosilicate glass Substances 0.000 claims abstract 29
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 15
- 229910052796 boron Inorganic materials 0.000 claims description 15
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 14
- 229910052698 phosphorus Inorganic materials 0.000 claims description 14
- 239000011574 phosphorus Substances 0.000 claims description 14
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 7
- 239000012298 atmosphere Substances 0.000 claims description 6
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims 1
- 238000000151 deposition Methods 0.000 description 7
- 239000007789 gas Substances 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 7
- 238000001039 wet etching Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 3
- 238000001312 dry etching Methods 0.000 description 3
- 239000012528 membrane Substances 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- WRECIMRULFAWHA-UHFFFAOYSA-N trimethyl borate Chemical compound COB(OC)OC WRECIMRULFAWHA-UHFFFAOYSA-N 0.000 description 3
- WVLBCYQITXONBZ-UHFFFAOYSA-N trimethyl phosphate Chemical compound COP(=O)(OC)OC WVLBCYQITXONBZ-UHFFFAOYSA-N 0.000 description 3
- 239000002253 acid Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000002425 crystallisation Methods 0.000 description 2
- 230000008025 crystallization Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000011065 in-situ storage Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- ZOCHARZZJNPSEU-UHFFFAOYSA-N diboron Chemical compound B#B ZOCHARZZJNPSEU-UHFFFAOYSA-N 0.000 description 1
- 238000007865 diluting Methods 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
제1도는 종래 기술의 평탄화방법에 따른 반도체 장치의 제조공정도로서,1 is a manufacturing process diagram of a semiconductor device according to the planarization method of the prior art,
제1a도-제1c도는 종래 기술 1의 제조공정도,1a to 1c is a manufacturing process diagram of the prior art 1,
제1a도-제1f도는 종래 기술 2의 제조 공정도.1a-f are manufacturing process diagrams of the prior art 2. FIG.
제2도는 종래 기술에 의한 네가티브 영역의 확대도.2 is an enlarged view of a negative region according to the prior art.
제3도는 리플로우후의 평탄화 정도를 나타내는 각도(θ)를 도시한 도면.3 shows an angle θ representing the degree of flattening after reflow.
제4a도-제4e도는 본 발명 반도체 장치의 평탄화방법에 따른 반도체 장치의 제조공정도.4A to 4E are manufacturing process diagrams of a semiconductor device according to the planarization method of the semiconductor device of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 반도체기판 2 : 절연막1 semiconductor substrate 2 insulating film
3 : 전극물질(금속배선) 4 : 저농도의 BPSG막3: electrode material (metal wiring) 4: low concentration BPSG film
5 : 네가티브영역 6 : PSG막5: negative area 6: PSG film
7 : 고농도의 BPSG막 8 : 저농도의 BPSG막7: High Concentration BPSG Membrane 8: Low Concentration BPSG Membrane
본 발명은 반도체 장치의 제조공정중 다층배선 공정에 있어서 배선층 사이의 절연막을 평탄화하기 위한 평탄화방법에 관한 것으로서, 특히, 플라즈마(plasma)를 이용하여 연속적으로 침적된 배선층 사이의 절연막인 2중 구조의 BPSG(Borophospho Sillcate Glase)막을 비교적 낮은 온도에서 리플로우(reflow)시킨후 비등방성 건식식각을 통하여 2중 구조의 BPSG막의 상부에 있는 고농도층을 완전히 제거하고 하부에 있는 저농도층을 일부 제거한 후 저농도층을 추가로 침적시킴으로써 배선층 사이의 절연막을 효과적으로 양호하게 평탄화시키는 반도체 장치의 평탄화방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a planarization method for planarizing an insulating film between wiring layers in a multi-layer wiring process of a semiconductor device manufacturing process. In particular, the present invention relates to a double structure of an insulating film between wiring layers continuously deposited using plasma. After reflowing the BPSG (Borophospho Sillcate Glase) film at a relatively low temperature, anisotropic dry etching completely removes the high concentration layer on the upper part of the double structured BPSG film, and removes the low concentration layer on the lower part. The present invention relates to a planarization method of a semiconductor device in which the insulating film between wiring layers is effectively flattened by further deposition.
절연막을 평탄화하기 위한 일반적인 종래 기술 1은 제1도의 (a)-(e)에 도시한 바와 같이 통상적인 공정으로 반도체기판(1)위에 절연막(2)을 형성시킨 후 전극물질(3)을 형성시키는 공정과; 그 위에 절연막(2)을 형성시키는 공정과; 실렌(SiH4)가스, 디보란(B2H6)가스 및 포스핀(PH3) 가스가 혼합된 가스를 이용하여 상압 화학막 증착장치에서 붕소의 농도가 3~4wt%이고 인의 농도가 5~7wt% 되는 BPSG막(4)을 침적시키는 공정으로 되어 있다.The conventional prior art 1 for planarizing the insulating film is to form the electrode material 3 after forming the insulating film 2 on the semiconductor substrate 1 in a conventional process as shown in FIGS. 1A to 1E. Making a process; Forming an insulating film 2 thereon; Boron concentration is 3 ~ 4wt% and phosphorus concentration is 5 at atmospheric pressure chemical vapor deposition apparatus using gas mixed with silane (SiH 4 ) gas, diborane (B 2 H 6 ) gas and phosphine (PH 3 ) gas. It is a process of depositing BPSG film | membrane 4 which is -7 wt%.
그러나 이러한 절연막의 평탄화방법에서는 BPSG막(4)의 침적시 제1도의 (c)에 도시한 바와 같이 네가티브영역(5)이 생성되어 BPSG막(4)을 900℃에서 리플로우 시켜도 효과적인 평탄화가 이루어지는 데에는 어려움이 뒤따른다.However, in the method of planarizing the insulating film, as illustrated in FIG. 1C, when the BPSG film 4 is deposited, a negative region 5 is generated, so that even if the BPSG film 4 is reflowed at 900 ° C., the planarization is effective. There is a difficulty.
또한 침적된 BPSG막(4)내의 붕소와 인의 농도가 증가하면 BPSG막(4)의 리플로우 온도가 낮아지게 되는 반면에 붕소의 농도가 증가하면 BPSG막(4)의 표면결정화가 생기게 되고, 인의 농도가 증가하면 BPSG막(4)의 흡습성이 강하여 산을 형성함으로써 금속배선을 부식시킬 수 있는 영향이 커지게 되어 붕소와 인의 사용농도가 제한을 받게 되므로 900℃의 리플로우온도를 낮출 수 없게 되어 비교적 높은 리플로우 온도를 가지는 결점이 있었다.In addition, when the concentration of boron and phosphorus in the deposited BPSG film 4 increases, the reflow temperature of the BPSG film 4 decreases, whereas when the concentration of boron increases, surface crystallization of the BPSG film 4 occurs. If the concentration is increased, the hygroscopicity of the BPSG film 4 is strong, so that the acid can be formed to corrode the metal wiring, and thus the use concentration of boron and phosphorus is restricted, so the reflow temperature of 900 ° C cannot be lowered. There was a drawback of having a relatively high reflow temperature.
제1도의 (a)-(f)에 도시한 바와 같이 종래 기술 2는 종래 기술 1의 (a)-(c)의 제조공정으로 형성되어 있는 BPSG막(4)위에 추가로 인의 농도가 9wt% 되는 PSG(Phosho Silicate Glass)막(6)을 두께가 1500~2000Å 되도록 침적하는 공정과, 900℃에서 질소가스 또는 포클(POC3) 분위기로 리플로우 하는 공정과 PSG막(6)을 희석불산(H2O : HF-100 : 1)으로 식각하는 공정으로 이루어진 것으로서, 종래 기술 1에서 생기는 네가티브영역(5)이 소멸되는 장점이 있으나, 리플로우공정에 의하여 PSG막(6)내의 고농도의 인이 하부의 BPSG막(4)내로 확산됨으로써 PSG막(6)을 완전히 식각한 후에도 전극물질인 금속배선(3)을 부식시킬 수 있다고 하는 결점이 있으며 종래 기술 1과 같이 리플로우 온도가 비교적 높다는 결점이 있었다.As shown in (a)-(f) of FIG. 1, the prior art 2 has an additional 9 wt% phosphorus concentration on the BPSG film 4 formed by the manufacturing process of the prior art 1 (a)-(c). Diluting the PSG film 6 with a process of depositing a PSG (Phosho Silicate Glass) film 6 to have a thickness of 1500 to 2000 kPa, a reflow of nitrogen gas or a POC 3 atmosphere at 900 ° C. H 2 O: HF-100: 1), the negative region (5) generated in the prior art 1 is eliminated, but a high concentration of phosphorus in the PSG film (6) by the reflow process By diffusing into the lower BPSG film 4, the metal wiring 3, which is an electrode material, can be corroded even after the PSG film 6 is completely etched. The defect is that the reflow temperature is relatively high as in the prior art 1. there was.
또한 제3도에 도시한 바와 같이 종래 기술 1, 2는 평탄화 정도를 나타내는 각도(θ)가 35~40°로서 비교적 높은 결점이 있으며 개구부(contact) 식각특성의 개선을 위하여 일반적으로 습식식각이 실시되는데 BPSG막의 습식식각 속도는 붕소의 농도에 따라 급격히 변하기 때문에 종래 기술 1, 2는 리플로우공정을 거치면 인에 비하여 원자량이 가벼운 붕소가 BPSG막(4) 내부에서 외부로 많이 확산되어 붕소가 농도가 BPSG막(4)의 깊이에 따라 차이가 생김으로써 BPSG막(4)의 바람직한 습식식각 특성의 재현성을 보장되지 않는 결점이 있었다.In addition, as shown in FIG. 3, the prior arts 1 and 2 have a relatively high defect as the angle (θ) indicating the degree of planarization is 35 to 40 °, and wet etching is generally performed to improve contact etching characteristics. Since the wet etching rate of the BPSG film is rapidly changed according to the concentration of boron, prior arts 1 and 2 show that boron, which is light in atomic weight compared to phosphorus, is diffused from the inside of the BPSG film 4 to the outside due to the reflow process. As a result of the difference depending on the depth of the BPSG film 4, there is a drawback that the reproducibility of the desirable wet etching characteristics of the BPSG film 4 is not guaranteed.
본 발명은 상기한 종래의 평탄화방법이 갖는 결점을 제거하고자 발명한 것으로서, 크러스터형(cluster type)의 PECVD(Plasma enhanced chemical vapor deposition) 장치를 이용하여 붕소와 인의 농도가 상이한 2중 구조의 BPSG막이 침적됨으로써 종래 기술에 비하여 비교적 낮은 온도에서 리플로우 될 수 있으며 또한 절연막의 평탄화가 효과적으로 양호하게 이루어질 수 있고 BPSG막(4)의 바람직한 습식식각 특성이 재현될 수 있도록 하는 반도체 장치의 평탄화방법을 제공함에 그 목적이 있다.The present invention has been invented to eliminate the drawbacks of the conventional planarization method, and the BPSG film having a double structure of boron and phosphorus having different concentrations of boron and phosphorus by using a cluster-type plasma enhanced chemical vapor deposition (PECVD) apparatus is provided. By depositing, the semiconductor device can be reflowed at a relatively low temperature as compared with the prior art, and the planarization of the insulating film can be effectively made good and the desired wet etching characteristics of the BPSG film 4 can be reproduced. The purpose is.
이하 본 발명 반도체 장치의 평탄화방법의 일실시예를 첨부도면을 참조하여 상세하게 설명한다.Hereinafter, an embodiment of a planarization method of a semiconductor device of the present invention will be described in detail with reference to the accompanying drawings.
상기한 목적을 달성하기 위한 본 발명 방법은 제4도의 (a)에 도시한 바와 같이 통상의 공정으로 실리콘기판(1)위에 절연막(2)을 형성한 후 절연막(2)의 상부의 소정영역에 전극물질(3)을 형성하고 전극물질 상부에 절연막(2)을 형성하는 공정과, 제4도의 (b)와 같이 액체인 TEOS(tetraethyl orthosilicate), TMP(Trimethyl phospite), TMB(Trimethyl borate) 가스를 크러스터형의 PECVD 장치내에서 플라즈마(plasma) 상태로 반응시켜 붕소의 농도가 3~4wt%이고, 인의 농도가 5~7wt% 되는 저농도의 BPSG막(4)을 두께가 6000~8000Å 되도록 침적함과 더불어 연속적으로 붕소의 농도가 4~6wt%이고, 인의 농도가 8~10wt% 되는 고농도의 BPSG막(7)을 두께 4000~6000Å 되도록 상기 저농도의 BPSG막(4)상에 침적하는 공정과, 제4도의 (c)와 같이 침적된 BPSG막(4)(7)을 온도가 800~850℃인 확산로내에서 질소분위기로 30분동안 리플로우하거나 또는 750~800℃의 확산로내에서 수증기 분위기로 리를로우하는 공정과, 제4도의 (d)와 같이 크러스터형의 PECVD 장치내에서 CHF320SCCM과 CF420SCCM 가스를 이용한 비등방성 건식식각을 실시하여 상부에 있는 고농도의 BPSG막(7)을 완전히 제거함과 동시에 하부로 확산되어 고농도의 붕소와 인이 남아 있는 저농도의 BPSG막(4)을 1500~2000Å정도 제거하는 공정과, 제4도의 (e)와 같이 일부 식각된 저농도의 BPSG막(4)위에 동일한 저농도의 BPSG막(8)을 두께가 3000~4000Å 되도록 동시에 연속(in-situ)상태로 침적시키는 공정으로 이루어짐을 특징으로 한다.According to the present invention for achieving the above object, as shown in FIG. 4A, the insulating film 2 is formed on the silicon substrate 1 by a conventional process, and then a predetermined region on the upper portion of the insulating film 2 is formed. Forming an electrode material 3 and forming an insulating film 2 on the electrode material, and as shown in (b) of FIG. 4, tetraethyl orthosilicate (TEOS), trimethyl phosphate (TMP), and trimethyl borate (TMB) gas as liquids Is reacted in a plasma state in a clustered PECVD apparatus to deposit a low concentration of BPSG film 4 having a boron concentration of 3 to 4 wt% and a phosphorus concentration of 5 to 7 wt% so as to have a thickness of 6000 to 8000 Pa. And continuously depositing a high concentration of BPSG film 7 having a boron concentration of 4 to 6 wt% and a phosphorus concentration of 8 to 10 wt% on the low concentration BPSG film 4 so as to have a thickness of 4000 to 6000 kPa; BPSG films 4 and 7 deposited as shown in (c) of FIG. 4 were heated for 30 minutes in a nitrogen atmosphere in a diffusion furnace having a temperature of 800 to 850 캜. Reflow or reflow into a vapor atmosphere in a diffusion furnace at 750-800 ° C, and anisotropic using CHF 3 20SCCM and CF 4 20SCCM gas in a clustered PECVD apparatus as shown in FIG. Performing dry etching to completely remove the high concentration of BPSG film (7) in the upper part and at the same time to remove the low concentration of BPSG film (4) of about 1500 ~ 2000Å with the high concentration of boron and phosphorus remaining; As shown in (e) of FIG. 4, the same low concentration BPSG film 8 is partially deposited on the etched low concentration BPSG film 4 so as to have a thickness of 3000 to 4000 mm and in-situ at the same time. do.
여기서 동시에 연속(in-situ) 상태로의 의미는 설비내부에 막형성용 챔버와 식각용 챔버를 가지고 있어서 막형성이나 식각을 위해 설비간을 이동하지 않고 한 설비내에서 막의 식각과 형성공정을 연속적으로 진행시키는 의미이다.At the same time, the term "in-situ" has a film forming chamber and an etching chamber inside the facility, so that the etching and forming process of the film is continuously performed in one facility without moving between the facilities for film formation or etching. It is meant to proceed.
상기한 본 발명 방법은 액체인 TEOS, TMP, TMB 가스를 이용하여 2중 구조의 BPSG막(4)(7)을 제조함으로써 종래 기술에 비하여 리플로우 온도를 100℃정도 낮출 수 있고 크러스터형 PECVD 장치를 사용하여 플라즈마 상태에서 고농도와 저농도의 2중 구조를 갖는 BPSG막(4)(7)을 순차적으로 침적함으로써 오염될 기회를 감소시킬 수 있고 또한 리플로우 온도를 더욱 낮출 수 있으며 플라즈마를 이용하기 때문에 BPSG막의 응력을 인장응력이 아니라 압축응력을 갖게 되어 제품의 신뢰도를 향상시킬 수 있게 된다.The method of the present invention described above can lower the reflow temperature by about 100 ° C. compared to the prior art by manufacturing the BPSG films 4 and 7 having a double structure by using TEOS, TMP, and TMB gas, which are liquids, and the cluster type PECVD apparatus By sequentially depositing the BPSG film (4) (7) having a double structure of high concentration and low concentration in the plasma state can reduce the chance of contamination, and further lower the reflow temperature, because using the plasma The stress of the BPSG film has a compressive stress instead of tensile stress, thereby improving the reliability of the product.
분위기에 따라 750~850℃에서 30분간 리플로우한 후에는 평탄화 정도를 나타내는 각도(θ)가 10°이하인 우수한 평탄화막을 얻을 수 있으며 또한 리플로우한 후 비등방성 건식식각을 하여 상부의 고농도 BPSG막(7)을 완전히 제거하고 하부의 저농도 BPSG막(4)을 일부 제거하게 되어 BPSG막(4)의 표면결정화와 산의 형성을 방지할 수 있는 장점이 있다.After reflowing at 750 ~ 850 ℃ for 30 minutes depending on the atmosphere, an excellent flattening film having an angle (θ) of 10 ° or less can be obtained. Also, after reflowing, anisotropic dry etching is performed to obtain a high concentration of BPSG film ( 7) completely removed and the lower portion of the low concentration BPSG film 4 is removed, thereby preventing the surface crystallization and acid formation of the BPSG film 4.
또한 일부 식각된 저농도의 BPSG막(4)위에 저농도의 BPSG막(8)을 침적시킴으로써 붕소와 이의 농도가 균일하게 되어 저농도의 BPSG막(4)(8)의 습식식각 특성의 재현성이 유지될 수 있는 장점이 있다.Further, by depositing the low concentration of the BPSG film 8 on the partially etched low concentration of the BPSG film 4, the boron and its concentration are uniform, and the reproducibility of the wet etching characteristics of the low concentration of the BPSG film 4 and 8 can be maintained. There is an advantage.
Claims (14)
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| KR1019900020910A KR940004410B1 (en) | 1990-12-18 | 1990-12-18 | Flatting method of semiconductor device |
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