JPH03157930A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH03157930A JPH03157930A JP29801689A JP29801689A JPH03157930A JP H03157930 A JPH03157930 A JP H03157930A JP 29801689 A JP29801689 A JP 29801689A JP 29801689 A JP29801689 A JP 29801689A JP H03157930 A JPH03157930 A JP H03157930A
- Authority
- JP
- Japan
- Prior art keywords
- film
- bpsg
- psg
- heat treatment
- phosphorus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 17
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 238000010438 heat treatment Methods 0.000 claims abstract description 12
- 238000000034 method Methods 0.000 claims abstract description 12
- 239000000758 substrate Substances 0.000 claims description 8
- 239000005368 silicate glass Substances 0.000 claims description 6
- OYLRFHLPEAGKJU-UHFFFAOYSA-N phosphane silicic acid Chemical compound P.[Si](O)(O)(O)O OYLRFHLPEAGKJU-UHFFFAOYSA-N 0.000 claims 2
- VRZFDJOWKAFVOO-UHFFFAOYSA-N [O-][Si]([O-])([O-])O.[B+3].P Chemical compound [O-][Si]([O-])([O-])O.[B+3].P VRZFDJOWKAFVOO-UHFFFAOYSA-N 0.000 claims 1
- 239000002245 particle Substances 0.000 abstract description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 4
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 4
- 238000009792 diffusion process Methods 0.000 abstract description 2
- 239000005380 borophosphosilicate glass Substances 0.000 abstract 4
- 239000005360 phosphosilicate glass Substances 0.000 abstract 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 abstract 2
- 229910052796 boron Inorganic materials 0.000 abstract 2
- 230000002708 enhancing effect Effects 0.000 abstract 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 7
- 229910052698 phosphorus Inorganic materials 0.000 description 7
- 239000011574 phosphorus Substances 0.000 description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 6
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- 239000011229 interlayer Substances 0.000 description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- 238000007796 conventional method Methods 0.000 description 4
- 229910052760 oxygen Inorganic materials 0.000 description 4
- 239000001301 oxygen Substances 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 229920005591 polysilicon Polymers 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000010410 layer Substances 0.000 description 3
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 125000004437 phosphorous atom Chemical group 0.000 description 2
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 2
- XHXFXVLFKHQFAL-UHFFFAOYSA-N phosphoryl trichloride Chemical compound ClP(Cl)(Cl)=O XHXFXVLFKHQFAL-UHFFFAOYSA-N 0.000 description 2
- 229910000077 silane Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- GDFCWFBWQUEQIJ-UHFFFAOYSA-N [B].[P] Chemical compound [B].[P] GDFCWFBWQUEQIJ-UHFFFAOYSA-N 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- ZOCHARZZJNPSEU-UHFFFAOYSA-N diboron Chemical compound B#B ZOCHARZZJNPSEU-UHFFFAOYSA-N 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体装置の製造方法に関し、特に層間絶縁
膜の形成方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of forming an interlayer insulating film.
半導体装置は、高集積化されるに従い、これを構成する
トランジスタ、容量、抵抗その他の各素子の平面寸法は
微細化される。その結果表面の凹凸形状は、その高さと
幅との比が大きくなり、各構成素子相互を接続するアル
ミ配線工程において、アルミ被覆性の悪化、アルミ配線
エツチング性の悪化の為、著しい加工上の困難を生じる
。従来この問題を解決する手段として、各構成素子とア
ルミ配線との層間絶縁膜としてボロン・リン・ケイ酸ガ
ラス（以下略してＢＰＳＧ）膜を形成し、しかる後熱処
理を行ないフローさせて表面を平滑化させるという方法
がとられている。第３図は、この従来法を説明したもの
である。第３（ａ）図はＭＯ８型半導体装置の縦断面図
の一部であり、３１は半導体基板、３２はシリコン酸化
膜、３３はポリシリ電極、３４はＢＰＳＧ膜である。Ｂ
ＰＳＧ膜はシラン（Ｓ ｉ Ｈ４） 、ホスフィン（Ｐ
Ｈ３） 、ジボラン（Ｂ２Ｈ６）、酸素（０２）を用
いて化学気相成長法で形成する。しかる後に、９００℃
３０分間程度の熱処理を行ない、ＢＰＳＧ膜３４をフロ
ーさせて第３（ｂ）のように表面を平滑化する。As semiconductor devices become more highly integrated, the planar dimensions of transistors, capacitors, resistors, and other elements constituting the device become smaller. As a result, the uneven shape of the surface has a large height-to-width ratio, and in the aluminum wiring process that interconnects each component, the aluminum coverage deteriorates and the aluminum wiring etching performance deteriorates, resulting in significant processing problems. cause difficulties. Conventionally, as a means to solve this problem, a boron phosphorus silicate glass (BPSG) film was formed as an interlayer insulating film between each component and the aluminum wiring, and then heat treated to flow and smooth the surface. A method is being used to transform the FIG. 3 explains this conventional method. FIG. 3(a) is a part of a vertical cross-sectional view of an MO8 type semiconductor device, in which 31 is a semiconductor substrate, 32 is a silicon oxide film, 33 is a polysilicon electrode, and 34 is a BPSG film. B
PSG film is made of silane (S i H4), phosphine (P
H3), diborane (B2H6), and oxygen (02) by chemical vapor deposition. After that, 900℃
A heat treatment is performed for about 30 minutes to cause the BPSG film 34 to flow and smooth the surface as shown in Part 3 (b).
上述した従来のＢＰＳＧ膜のフローを用いた層間約縁膜
の形成方法においては、Ｂ Ｐ Ｓ ’Ｇ膜のフロー工
程において、数μｍ径のＢＰＳＧの粒子３５が付着する
という欠点がる。これは熱処理中にＢＰＳＧ膜からリン
とポロンがガス状になって膜外に出て、再反応し、膜に
付着するのが原因となっており、１ｃｆｌｔ当り数個か
ら数十個程度発生する。この粒子は次工程のアルミ配線
工程において、アルミの配線等の不良を発生させ、半導
体製造装置の製造歩留りを大幅に低下させ、信頼性を損
なうという問題点がある。The above-described conventional method for forming an interlayer film using a BPSG film flow has a drawback that BPSG particles 35 with a diameter of several μm adhere in the BPSG film flow process. This is caused by phosphorus and poron becoming gaseous from the BPSG film during heat treatment, coming out of the film, reacting again, and adhering to the film, resulting in several to several dozen particles per cflt. . These particles cause defects in aluminum wiring, etc. in the next step of aluminum wiring, and there is a problem that the manufacturing yield of semiconductor manufacturing equipment is significantly lowered and the reliability is impaired.
本発明の層間絶縁膜は、ＢＰＳＧ膜を形成する工程と、
リン・ケイ酸ガラス膜（以下略してＰＳＧ膜）を形成す
る工程と、熱処理工程と、前記ＰＳＧ膜を除去する工程
を有している。The interlayer insulating film of the present invention includes a step of forming a BPSG film,
The method includes a step of forming a phosphorus silicate glass film (hereinafter abbreviated as PSG film), a heat treatment step, and a step of removing the PSG film.
上述した従来の層間絶縁膜の形成法に対し、本発明にお
いては、ＢＰＳＧ膜形成膜形成後動て、リン・ケイ酸ガ
ラス（以下略してＰ Ｓ Ｇ）膜を形成した後、熱処理
を行ないフローさせた後ＰＳＧ膜を除去している。In contrast to the conventional interlayer insulating film formation method described above, in the present invention, after forming the BPSG film, a phosphorus silicate glass (hereinafter abbreviated as PSG) film is formed, and then heat treatment is performed. After that, the PSG film is removed.
次に、本発明について、図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は、本発明をＮＯ８型半導体装置に適用した一実
施例の縦断面図である。第１（ａ）図において、１１は
半導体基板、１２はシリコン酸化膜、１３はポリシリ電
極、１４はＢＰＳＧ膜である。FIG. 1 is a longitudinal sectional view of an embodiment in which the present invention is applied to an NO8 type semiconductor device. In FIG. 1(a), 11 is a semiconductor substrate, 12 is a silicon oxide film, 13 is a polysilicon electrode, and 14 is a BPSG film.
ＢＰＳＧ膜１４膜製４ラン（Ｓ ｉ Ｈ４） 、ホスフ
ィン（Ｐ Ｈ３） 、ジポラン（Ｂ２Ｈ６）、酸素（０
２）を用いて、化学気相成長法により６０００人堆積す
る。4 runs made of 14 BPSG films (S i H4), phosphine (PH3), diporan (B2H6), oxygen (0
2), 6000 layers were deposited by chemical vapor deposition.
引き続いて、ＰＳＧ膜１５を化学気相成長法により、シ
ラン、ホスフィン、酸素を用いて２０００人堆積する。Subsequently, a PSG film 15 is deposited by chemical vapor deposition using silane, phosphine, and oxygen.
引き続いて、窒素雰囲気中９００℃、３０分間の熱処理
を行なって、フローさせ第１ （ｂ）図に示すような平
滑な表面を得る。平滑化させる為、ＢＰＳＧ膜１４膜製
４はポロン濃度４ｗｔ％、リン濃度４ｗｔ％、ＰＳＧ膜
１５のリン濃度は１６ｗｔ％を用いる。半導体基板の表
面はＰＳＧ膜１５であるので、熱処理工程において、外
部に拡散される原子はリンのみであり、ポロンは拡散さ
れない。Subsequently, heat treatment is performed at 900° C. for 30 minutes in a nitrogen atmosphere to cause flow and obtain a smooth surface as shown in FIG. 1(b). For smoothing, the BPSG film 14 film 4 uses a poron concentration of 4 wt% and the phosphorus concentration of 4 wt%, and the phosphorus concentration of the PSG film 15 is 16 wt%. Since the surface of the semiconductor substrate is the PSG film 15, only phosphorus atoms are diffused to the outside during the heat treatment process, and poron is not diffused.
従って、表面にＢＰＳＧ膜を有していた従来法の場合発
生したＢＰＳＧ粒子は本発明においては発生しない。Therefore, the BPSG particles generated in the conventional method having a BPSG film on the surface are not generated in the present invention.
１６ｗｔ％のＰＳＧ膜１５は、吸湿してリン酸を生じ易
く、信頼性上の問題を生じるので、第１（Ｃ）図に示す
ように、エツチング除去する。エツチングはバッフアー
トフッ酸を用いる。ＢＰＳＧ膜に対するエツチング速度
は２００人／分、これに対してＰＳＧ膜に対するエツチ
ング速度は１６００人／分と大きい為、ＰＳＧ膜１５だ
けを容易に取り除くことができる。Since the 16 wt % PSG film 15 easily absorbs moisture and generates phosphoric acid, which causes reliability problems, it is removed by etching as shown in FIG. 1(C). Buffered hydrofluoric acid is used for etching. The etching rate for the BPSG film is 200 people/min, whereas the etching rate for the PSG film is as high as 1600 people/min, so that only the PSG film 15 can be easily removed.
このようにして、信頼性の高いＢＰＳＧ膜を粒子を発生
させること無く、平滑化させることが可能となる。In this way, a highly reliable BPSG film can be smoothed without generating particles.
第２図は本発明の他の実施例の縦断面図である。FIG. 2 is a longitudinal sectional view of another embodiment of the invention.
第２（ａ）図において、２１は半導体基板、２２はシリ
コン基板、２３はポリシリ電極、２４はＢＰＳＧ膜、２
５はＰＳＧ膜である。本実施例においては、ＰＳＧ膜は
リン濃度が４ｗｔ％と低い為、下５−
層のＢＰＳＧ膜２４からのポロン拡散の阻止効果が大き
く、ＰＳＧ膜厚は１０００人で十分である。In FIG. 2(a), 21 is a semiconductor substrate, 22 is a silicon substrate, 23 is a polysilicon electrode, 24 is a BPSG film, 2
5 is a PSG film. In this embodiment, since the PSG film has a low phosphorus concentration of 4 wt %, the effect of inhibiting poron diffusion from the lower 5-layer BPSG film 24 is large, and a PSG film thickness of 1000 layers is sufficient.
引き続いて、第２（ｂ）図に示すようにオキシ塩化リン
（Ｐ ｏ Ｃ（１３）と酸素（０２）雰囲気において熱
処理を行なう。ＰＳＧ膜２５はリン拡散されて濃度が高
まり、９００℃、３０分の熱処理において、平滑化され
る。しかる後、バッフアート・フッ酸を用いて、ＰＳＧ
膜２５を除去して平滑化されたＢＰＳＧ膜２４を得る。Subsequently, as shown in FIG. 2(b), heat treatment is performed in an atmosphere of phosphorus oxychloride (P o C (13) and oxygen (02).The PSG film 25 is heated to 900° C. and 30° C. to increase the concentration of phosphorus. The PSG is smoothed by heat treatment for several minutes.Then, using buffered hydrofluoric acid,
The film 25 is removed to obtain a smoothed BPSG film 24.
本実施例においても、熱処理中に半導体基板外部に拡散
される原子はリンのみである為、ＢＰＳＧ粒子を生じる
ことはない。本実施例においてはＰＳＧ膜２５の膜厚は
本発明第１の実施例の場合より薄くできるので、より高
集積化半導体装置に適する。なお、ＰＳＧの代わりに、
５ｉｎ２を用いても良い。Also in this example, since only phosphorus atoms are diffused to the outside of the semiconductor substrate during heat treatment, no BPSG particles are generated. In this embodiment, the thickness of the PSG film 25 can be made thinner than in the first embodiment of the present invention, making it more suitable for highly integrated semiconductor devices. In addition, instead of PSG,
5in2 may also be used.
以上説明したように、本発明はＢＰＳＧ膜の上にＰＳＧ
膜を堆積させることにより、次工程の熱処理においてポ
ロンの外部への拡散を阻止させ、ＢＰＳＧ粒子の発生を
阻止するという効果がある。As explained above, the present invention provides PSG on a BPSG film.
Depositing the film has the effect of preventing poron from diffusing to the outside and preventing the generation of BPSG particles in the next heat treatment step.
−
その結果、半導体装置の製造上の歩留りを向上させ、信
頼性を向上させるという大きな利点を有する。- As a result, it has the great advantage of improving the manufacturing yield and reliability of semiconductor devices.
第１図（ａ）〜（ｃ）は本発明をＭＯ８型半導体装置に
適用した場合の一実施例の縦断面図、第２図（ａ）〜（
ｃ）は他の実施例の縦断面図、第３図（ａ）。
（ｂ）は従来法の縦断面図である。
１１．２１．３１・・・・・・半導体基板、１２，２２
゜３２・・・・・・シリコン酸化膜、１３，２３．３３
・・・・・・ポリシリ電極、１４，２４．３４・・・・
・・ＢＰＳＧ膜、１５．２５・・・・・・ＰＳＧ膜、３
５・・・・・・ＢＰＳＧ粒子。FIGS. 1(a) to (c) are longitudinal cross-sectional views of an embodiment in which the present invention is applied to an MO8 type semiconductor device, and FIGS. 2(a) to (c)
c) is a longitudinal sectional view of another embodiment, FIG. 3(a). (b) is a vertical cross-sectional view of the conventional method. 11.21.31...Semiconductor substrate, 12,22
゜32...Silicon oxide film, 13,23.33
...Polysilicon electrode, 14,24.34...
...BPSG film, 15.25...PSG film, 3
5...BPSG particles.
Claims (1)
を形成する工程と、リン・ケイ酸ガラス膜を形成する工
程と、熱処理工程と、前記リン・ケイ酸ガラス膜を除去
する工程とを具備することを特徴とする半導体装置の製
造方法A step of forming a boron-phosphorus-silicate glass film on one main surface of a semiconductor substrate, a step of forming a phosphorus-silicate glass film, a heat treatment step, and a step of removing the phosphorus-silicate glass film. A method for manufacturing a semiconductor device, comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29801689A JPH03157930A (en) | 1989-11-15 | 1989-11-15 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29801689A JPH03157930A (en) | 1989-11-15 | 1989-11-15 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03157930A true JPH03157930A (en) | 1991-07-05 |
Family
ID=17854032
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP29801689A Pending JPH03157930A (en) | 1989-11-15 | 1989-11-15 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03157930A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1997024755A1 (en) * | 1995-12-29 | 1997-07-10 | Lam Research Corporation | Semiconductor structure using modulation doped silicate glasses |
-
1989
- 1989-11-15 JP JP29801689A patent/JPH03157930A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1997024755A1 (en) * | 1995-12-29 | 1997-07-10 | Lam Research Corporation | Semiconductor structure using modulation doped silicate glasses |
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