JP3421861B2 - Method for manufacturing semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to the formation of Al alloy wiring by a high temperature sputtering method.

[0002]

2. Description of the Related Art As semiconductor devices become highly integrated and miniaturized,
A method of filling a contact hole having a high aspect ratio is needed. At present, a high-temperature Al alloy sputtering method, in which the conventional Al alloy sputtering method is performed while the substrate is heated to a high temperature, is regarded as a promising embedding process with high mass productivity. It has been reported that the burying characteristics of the high temperature Al alloy sputtering method largely depend on the underlying film, and it is known that the burying characteristics vary depending on the type of barrier metal, the type of underlying insulating film, and the like. Further, it has been found that the quality of the Al alloy film formed at high temperature may deteriorate depending on the type of the underlying insulating film and the wiring structure.

The conventional technique is as shown in FIG.
After forming, for example, a diffusion layer, a field oxide film, polycrystalline silicon wiring, etc. on the Si substrate 1, the BPSG film 2 is subjected to atmospheric pressure CV.
The film is formed by the D method.

Next, the contact hole 3 as shown in FIG. 6B is formed by using the lithography technique and the etching technique.
Opened, and then a diffusion furnace with N ₂ 100% atmosphere 880
After heat treatment at 20 ° C for 20 minutes, as shown in Fig. 6 (C),
Reflow of the BPSG film 2 is performed. Next, after removing the exposed oxide film on the surface of the Si substrate 1 with a dilute hydrofluoric acid solution, a barrier metal layer 4 as shown in FIG. An Al alloy film 5 is formed thereon by a high temperature sputtering method. The sputtering conditions are as follows.

Barrier metal: Ti / TiON / Ti (3
0/120/60 nm) Al alloy: Al-1% Si Pressure ... 0.26 Pa gas ... Ar 100% output ... 7.5 kW Set temperature ... 515 ° C.

[0006]

However, as shown in FIG. 6D, the Al alloy film 5 thus formed has a large variation in film thickness and a rough surface.
Further, the difference (Rmax) between the maximum film thickness and the minimum film thickness when scanned by 1 mm with the SEM is about 340 nm, and the specular reflectance also decreases (corresponding to an absolute reflectance of about 15 in accordance with the film roughness). %).

When such surface roughness occurs, there is a problem that photoresist alignment for forming wiring becomes difficult. Further, even if the wiring can be formed, the wiring shape is formed as shown in FIG. 6D, and there is a problem that the controllability of the subsequent interlayer film forming process is lacking. Furthermore, due to such a wiring shape, there is concern that the wiring reliability (electromigration, stress migration) resistance may deteriorate.

The present invention was devised by paying attention to such conventional problems, and an object of the present invention is to obtain a high temperature A
It is an object of the present invention to provide a method for manufacturing a semiconductor device that can realize embedded film formation by the l-alloy sputtering method without inducing surface roughness.

[0009]

According to a first aspect of the present invention, an Al alloy material film is formed on an insulating layer on a semiconductor substrate by a sputtering method while the semiconductor substrate is heated to a high temperature. In the method for manufacturing a semiconductor device, the plasma treatment is performed on the surface of the insulating layer before forming the Al alloy material film.
By applying the surface modification by, and by applying the surface modification,
The Al-based alloy material is better than when the surface is not modified.
A solution is to reduce the surface roughness Rmax of the film .

The invention according to claim 2 of the present application is a semiconductor device in which a semiconductor substrate is heated to a high temperature and an Al alloy material is embedded in a contact hole formed in an insulating layer on the semiconductor substrate by a sputtering method. In the manufacturing method of
Before embedding an alloy material, the surface of the insulating layer is subjected to surface modification by plasma treatment , and the surface modification is performed.
In comparison with the case where the surface modification is not applied, the Al-based alloy
A solution is to reduce the surface roughness Rmax of the material film .

[0011]

[0012]

[0013]

[Action] The invention of claim 1 of the present application, before forming the Al alloy material film at high temperature sputtering, by performing plasma treatment on the surface of the insulating layer, the insulating layer surface is reformed, this It has an effect of suppressing the surface roughness of the Al alloy material film deposited by the high temperature sputtering method on the upper surface. Even if a barrier metal layer is formed on the base of the Al alloy material film, the same effect is obtained. By suppressing the surface roughness in this manner, the flatness is improved, and the interlayer film is flattened,
The formation of the interlayer contact hole can be achieved with good controllability.

The insulating layer is BPSG or PSG or
When formed by plasma-TEOS, it is easy to induce surface roughness during high temperature sputtering , but surface modification is achieved by performing plasma treatment. Therefore, the width of the insulating material used can be increased.

[0015] In addition, N ₂ plug in the plasma treatment
When the zumas are used , modification of the surface of the insulating layer can be achieved without heating, and the influence on the exposed Si surface can be set small.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The details of the semiconductor device according to the present invention will be described below with reference to the embodiments shown in the drawings.

First, in this embodiment, the Si substrate 11 is used.
After a diffusion layer 11a in which impurities are diffused, a field oxide film, a polycrystalline silicon wiring, etc. are formed to form an element, as shown in FIG. 1, a BPSG film 12 as an insulating layer
Is formed by the atmospheric pressure CVD method.

Next, the contact hole 12a as shown in FIG. 2 is opened by using the lithography technique and the etching technique. After that, the Si substrate 11 is put into a diffusion furnace and subjected to heat treatment. As the heat treatment conditions, heating at a temperature of 880 ° C. is performed for 20 minutes in an atmosphere of nitrogen N ₂ 100%. By this heat treatment, the BPSG film 12 is reflowed, and as shown in FIG. 3, the inner wall of the contact hole 12a becomes a gentle slope, and the step coverage is improved.

After the heat treatment is completed, the oxide film on the exposed surface of the Si substrate 11 is removed using a dilute hydrofluoric acid solution. Next, the Si substrate 11 is introduced into a parallel plate type reactive ion etching (RIE) apparatus, and as shown in FIG. 3, N ₂ plasma treatment is performed to modify the surface of the BPSG film 12.
The N ₂ plasma processing conditions are as shown below.

-Processing device: parallel plate type RIE device-Gas and its flow rate: N ₂ 100%, 15 sccm-Discharge condition output -100 W Pressure-0.1 Torr Time -20 seconds Temperature-no heating The above N ₂ plasma processing The time was set to 20 seconds, but if it is in the range of 15 to 30 seconds, the surface roughness of the Al alloy layer in the subsequent step does not occur and the increase in contact resistance can be suppressed. If it is less than 15 seconds, the surface roughness of the Al alloy film cannot be prevented, and if it is longer than 30 seconds, the contact resistance increases.

Next, the substrate subjected to the N ₂ plasma treatment is set in the multi-chamber sputtering apparatus and Ti
/ TiON / Ti (film thickness 30nm / 120nm / 60n
barrier metal layer 13 formed by continuously forming the respective layers of m)
Are formed (FIG. 4). Furthermore, with the same device, the Al alloy layer 14
Are continuously formed (FIG. 5). The Al alloy layer 14 was formed by the high temperature sputtering method under the following conditions.

-Target-Al-1% Si-Pressure-0.26Pa-Gas-Argon (Ar) 100% -Output-7.5kW-Set temperature-515 ° C Al alloy layer formed in this way As shown in FIG. 5, 14 has a small variation in film thickness and is formed flat.
The surface was not rough. This is surface-modified B
This is because the barrier metal layer 13 on the PSG film 12 is well formed without being affected by the base. The difference between the maximum film thickness and the minimum film thickness (Rm
ax) is 70 nm, which is the Rma of the conventional Al alloy layer.
A significant improvement was seen compared to x = 340 nm. Also,
Since surface roughness did not occur in this way, the specular reflectance was also high. (Absolute reflectance of about 75%).

Further, in the present embodiment, when the wiring (Al alloy layer) is patterned in the next step, since the surface of the Al alloy layer 14 is not roughened, the alignment of the predetermined wiring pattern with the underlying pattern of the photoresist patterning is performed. Can be easily and accurately adjusted.

The wiring pattern patterned by reactive ion etching has a uniform thickness, a short cross section, and a regular shape. Therefore, it is possible to control the formation of the interlayer film, the planarization, the opening of the contact hole, and the like in the subsequent steps with good controllability.

Although the embodiment has been described above, the present invention is not limited to this, and various modifications can be made based on the gist of the configuration. For example, although N ₂ plasma was used for the plasma treatment in the above embodiment, the gas species is N ₂ plasma.
In addition to 100%, the plasma treatment using N ₂ 96%: H ₂ 4% forming gas and O ₂ 100% also produces Al
The effect of suppressing the surface roughness of the alloy layer has been confirmed. Therefore, plasma treatment with other gases or treatment by mixing a plurality of gas species is also planned.

Further, in the above embodiment, the BPSG film is used as the insulating layer, but the PSG film and the plasma (P)-
A TEOS film or the like may be used.

[0027]

As is clear from the above description, according to the first and second aspects of the present invention, there is an effect that the Al alloy film can be realized by the high temperature sputtering method without inducing the surface roughness. For this reason, wiring can be formed without disturbing the alignment of the photoresist. Also,
There is an effect that planarization of the interlayer film and formation of the interlayer contact hole can be achieved with good controllability. Further, there is an effect that the electromigration and stress migration resistance of the wiring are enhanced and a semiconductor device having high wiring reliability is realized.

[Brief description of drawings]

FIG. 1 is a sectional view of an essential part showing a step of an embodiment of the present invention.

FIG. 2 is a cross-sectional view of a main part showing a process of an example of the present invention.

FIG. 3 is a sectional view of an essential part showing a step of an embodiment of the present invention.

FIG. 4 is a cross-sectional view of a main part showing a step of an embodiment of the present invention.

FIG. 5 is a cross-sectional view of a main part showing a step of an embodiment of the present invention.

FIG. 6A to FIG. 6D are cross-sectional views of relevant parts showing the steps of a conventional example.

[Explanation of symbols]

11 ... Si substrate 12 ... BPSG film (insulating layer) 12a ... Contact hole 13 ... Barrier metal layer 14 ... Al alloy layer

─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 21/768 H01L 21/3205

Claims (2)

(57) [Claims] 1. A method of manufacturing a semiconductor device, wherein an Al alloy material film is formed on an insulating layer on the semiconductor substrate by a sputtering method while the semiconductor substrate is heated to a high temperature. Before the surface modification, the surface of the insulating layer is subjected to a surface modification by plasma treatment , and the surface modification is performed so that the surface modification is not performed.
The surface roughness Rmax of the Al-based alloy material film
A method for manufacturing a semiconductor device, which is characterized by reducing the amount. 2. A method of manufacturing a semiconductor device, wherein an Al alloy material is embedded in a contact hole formed in an insulating layer on the semiconductor substrate by a sputtering method while the semiconductor substrate is heated to a high temperature. Before embedding, the insulating layer surface is subjected to a surface modification by plasma treatment , and if the surface modification is not performed,
The surface roughness Rmax of the Al-based alloy material film
A method for manufacturing a semiconductor device, which is characterized by reducing the amount.