JPH0324784U - - Google Patents
Info
- Publication number
- JPH0324784U JPH0324784U JP8353589U JP8353589U JPH0324784U JP H0324784 U JPH0324784 U JP H0324784U JP 8353589 U JP8353589 U JP 8353589U JP 8353589 U JP8353589 U JP 8353589U JP H0324784 U JPH0324784 U JP H0324784U
- Authority
- JP
- Japan
- Prior art keywords
- screen
- pulse train
- period
- horizontal
- interlacing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000000737 periodic effect Effects 0.000 claims description 5
- 239000004973 liquid crystal related substance Substances 0.000 claims 2
Landscapes
- Transforming Electric Information Into Light Information (AREA)
Description
第1図は本考案の画面拡大液晶テレビに適用さ
れる飛び越し変更水平周期制御パルス列の形成回
路を示し、第2図はパルス列の形成方法と各パル
ス列のタイミングの関係を示し、第3図は液晶テ
レビのパネルとドライバの相互要部関係を示す。
1……クロツクパルス列、1′……タイミング
をずらしたクロツクパルス列、1′′……スター
トパルス、2……飛び越し機能付きパルス列、3
……スイツチング制御パルス列、4……飛び越し
変更水平周期制御パルス列、4′……タイミング
をずらした飛び越し変更水平周期制御パルス列、
5……デイレイ回路、6……分周器、7……OR
回路、8……スイツチング、9……パネル、10
……ゲート・ドライバ、11……ソース・ドライ
バ。
Fig. 1 shows a circuit for forming an interlaced change horizontal periodic control pulse train applied to the enlarged screen LCD television of the present invention, Fig. 2 shows the relationship between the pulse train forming method and the timing of each pulse train, and Fig. 3 shows the relationship between the pulse train forming method and the timing of each pulse train. The relationship between the main parts of the TV panel and driver is shown. 1... Clock pulse train, 1'... Clock pulse train with shifted timing, 1''... Start pulse, 2... Pulse train with skip function, 3
... Switching control pulse train, 4 ... Interlaced change horizontal periodic control pulse train, 4' ... Interlaced change horizontal periodic control pulse train with shifted timing,
5...Delay circuit, 6...Frequency divider, 7...OR
Circuit, 8... Switching, 9... Panel, 10
...Gate driver, 11...Source driver.
Claims (1)
うことにより映像化される液晶テレビにおいて、
パネル9に備え、水平周期Hの制御信号を入力す
るゲート・ドライバ10に対して水平周期Hを与
えるクロツクパルス1とデイレイ回路5を通して
時間差を与えた第2クロツクパルス1′とをOR
回路7で組み合わせた飛び越し機能付きパルス列
2を作り、更に前記クロツクパルス1を分周器6
を通して形成したスイツチング制御パルス列3の
入力で機能するスイツチ8を機能させて前記飛び
越し機能付きパルス列2と、前記クロツクパルス
1とから飛び越し変更水平周期制御パルス列4を
合成出力し、水平周期制御において画面拡大倍数
に沿つた走査線の飛び越し制御を当該飛び越し変
更水平周期制御パルス列4で行う一方、画面次周
期では0.5Hずらした前記飛び越し変更水平周
期制御パルス列4′を前記ドライバ10に与えて
、前周期で飛び越したゲートの水平周期を順次制
御することより液晶テレビの画面を任意の大きさ
に拡大したことを特徴とする画面拡大液晶テレビ
。 In LCD televisions that display images by scanning by adding one pulse to 1H every horizontal period,
A clock pulse 1 which provides a horizontal period H to a gate driver 10 which inputs a control signal with a horizontal period H to the panel 9 is ORed with a second clock pulse 1' which is given a time difference through a delay circuit 5.
A circuit 7 generates a combined pulse train 2 with an interlace function, and the clock pulse 1 is then passed through a frequency divider 6.
The switch 8, which functions in response to the input of the switching control pulse train 3 formed by The interlacing change horizontal periodic control pulse train 4 performs interlacing control of the scanning lines along the screen, while in the next period of the screen, the interlacing changing horizontal periodic control pulse train 4' shifted by 0.5H is given to the driver 10, and in the previous period A screen enlarged liquid crystal television characterized in that the screen of the liquid crystal television is enlarged to an arbitrary size by sequentially controlling the horizontal period of skipped gates.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8353589U JPH0324784U (en) | 1989-07-18 | 1989-07-18 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8353589U JPH0324784U (en) | 1989-07-18 | 1989-07-18 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0324784U true JPH0324784U (en) | 1991-03-14 |
Family
ID=31631282
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8353589U Pending JPH0324784U (en) | 1989-07-18 | 1989-07-18 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0324784U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63194481A (en) * | 1987-02-07 | 1988-08-11 | Nec Home Electronics Ltd | Display using solid-state display device |
-
1989
- 1989-07-18 JP JP8353589U patent/JPH0324784U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63194481A (en) * | 1987-02-07 | 1988-08-11 | Nec Home Electronics Ltd | Display using solid-state display device |
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