JPH03236284A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a high breakdown strength semiconductor device of a structure which does not need a deep guard ring region by specifying a boundary level between a semiconductor substrate and an insulating film. CONSTITUTION:A diode 1 is formed with a real operation region A at the center of a semiconductor substrate 2, and with a main p-n junction made of a p-type layer 3 and an n-type layer 4. Reverse conductivity type guard ring regions 5,... to the substrate are formed at the side of the region A, and the region 5 forming region is covered with a thermal oxide film (insulating film) 6. As a semiconductor substrate 2, use is made of a silicon substrate having the (100) plane as the surface, and the thickness of the film 6 is ranged in 1-2mum. In this diode 1, a boundary level between the film 6 and the substrate 2 if formed to be about 5X10<11>cm<-2> or less.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a semiconductor device provided with a guard ring region for increasing breakdown voltage.

[Conventional technology]

In a planar semiconductor device, the breakdown voltage value of the main pn junction in the actual operating region increases as the diffusion depth of the pn junction impurity diffusion layer becomes deeper, and a higher breakdown voltage can be achieved. However, when increasing the diffusion depth, long-term high-temperature heat treatment is required. This long-term high-temperature heat treatment
There are problems in that the manufacturing cost increases and the characteristics of the resulting device are deteriorated.

Therefore, in a planar semiconductor device, as shown in FIG. 7, a so-called guard ring region 52 is usually provided on the side of an actual operating region 51 of a semiconductor substrate 50 to increase the breakdown voltage.

The high voltage resistance achieved by the guard ring region 52 is achieved in the actual operation region 5.
Due to the voltage VR applied to the main pn junction of No. 1, the depletion layer extending from the main pn junction is expanded along the guard ring region 52 which is in an electrically floating state. Voltage VG' induced in each guard ring region 52,
VG", VGl, VG'(VG'<VG"< VG
'<VG'< VR) and the voltages applied to the junctions of the respective guard ring regions 52 VR-VG', VR-VG'', VR-
VG", VR-VG'(VR-VGl>VR-VG
">VR-VG">VR-VG') is as shown in Figure 7, and a high withstand voltage is achieved by gradually lowering it from the maximum voltage VR applied to the main pn junction. It is.

When the guard ring regions 52 are arranged at appropriate intervals in consideration of the resistivity of the semiconductor substrate so that the depletion layer is continuous, the reverse breakdown voltage of the outermost guard ring region dominates the breakdown voltage of the semiconductor device. I will do it. For this reason, conventionally, the outermost guard ring region is formed deeply to provide sufficient breakdown voltage.

[Problem to be solved by the invention]

However, when forming a deep guard ring region, long-term high-temperature heat treatment is required, leading to problems of increased manufacturing costs and deterioration of characteristics.

In view of the above circumstances, it is an object of the present invention to provide a high voltage semiconductor device having a structure that does not require a deep guard ring region.

[Means for Solving the Problems] In order to solve the above problems, in a semiconductor device according to the present invention, an insulating film in a guard ring region forming area on the side of an actual operation area formed on a semiconductor substrate and a semiconductor substrate are combined. The interface level between the two is set to be approximately 5×10″c+ei or less.

The interface level between the insulating film and the semiconductor substrate is approximately 5×10”e.
Specifically, the following configuration can be mentioned as a configuration in which the number is ll''''2 or less.

That is, the semiconductor substrate is a semiconductor substrate (for example, a silicon substrate) whose surface on which an insulating film is provided is a (100) plane, and the insulating film is a thermally oxidized film (for example, about 1 to 21) of 1n or more (usually about 1 to 21). , SiO□ film).

If the specific resistance of the semiconductor substrate is high, it is easily affected by the external environment, so it is better for the thermal oxide film to be thinner. However, forming a thick thermal oxide film tends to cause defects in the semiconductor substrate, and there are also problems in that an increase in stress due to an increase in the thickness of the thermal oxide film induces poor characteristics. However, when using a semiconductor substrate whose surface is a (100) plane,
The inventors have discovered that even with a thermal oxide film having a π-thickness, it is possible to reduce the influence of the external world on a semiconductor device without causing the above-mentioned disadvantages.

In this way, a thick thermal oxide film can increase the interface level by approximately 5×I
A configuration in which the Q is less than "cm-" is very useful.

Incidentally, for example, if the substrate surface is a semiconductor substrate having a (111) plane, the interface state will not have an appropriate value.

Further, types of semiconductor devices include diodes, transistors, thyristors, and the like.

[For production]

In semiconductor devices, as shown in FIG. 6, it is usually the w440' of the depletion layer 40 that has a strong influence on increasing the breakdown voltage.
However, especially when the semiconductor substrate 41 is made of a material with a high resistivity that allows for high breakdown voltage, the end 40'' of the depletion layer 40 reaching the interface between the insulating film 42 and the semiconductor substrate 41 is Become dominant.

In the semiconductor device of the present invention, the interface level between the insulating film and the semiconductor substrate in the guard ring region forming area is approximately 5.
If it is less than X 10 "cm-", destruction at 1140" becomes difficult to occur, and it is considered that the impurity diffusion depth of the guard ring region becomes deep (even if it is not, a high breakdown voltage can be achieved).

〔Example〕

Next, the present invention will be explained in detail using various specific examples of planar semiconductor devices. Of course, the present invention is not limited to the following embodiments.

Embodiment 1 In Embodiment 1, the semiconductor device is a diode having a pn junction configuration. FIG. 1 shows a schematic configuration of a diode of Example 1.

The diode 1 has an actual operating region A in the center of the semiconductor substrate 2, in which a main pn junction consisting of a pN3.1 layer 4 is formed. A guard ring region 5 having a conductivity type opposite to that of the substrate is provided on the side of the actual operation region A, and a thermal oxide film (
Covered with insulation l1l) 6. Note that 7 is a depletion layer, and 8.9 is an electrode.

As the semiconductor substrate 2, a silicon substrate having a (100) surface is used, and the thickness of the thermal oxide film 6 is in the range of 1 to 2n.

Of course, in this diode 1, the interface level between the insulating film 6 and the semiconductor substrate 2 is about 5×10 "an-" or less. Therefore, as shown in FIG. 2, 1fi of the depletion layer 7
7' is now located on the outside of the conventional end 7'', and it is presumed that breakage is less likely to occur than in the conventional case.

Note that the interface level can be determined, for example, as follows. The semiconductor substrate is used as one electrode, the other electrode is provided on the insulating film, and the product of the capacitance C and the voltage ■ is determined by the waveform change when a voltage signal is applied between both electrodes.
By calculating CV/Q (Coulomb quantity), the interface state can be determined.

Regarding the case where the depth of the guard ring region 5 is 91,
Looking at the relationship between the interface state and withstand voltage, as shown in Figure 3, if the interface state is less than 5
It has a withstand voltage of 0V or more, and as the interface level decreases, the withstand voltage further exceeds 400V and increases to nearly 500V. It was also confirmed that even when a CVD oxide film of about 1p was stacked on the thermal oxide film 6, there was no particular effect on the withstand voltage. Further, in the case of the diode of Example 1, there was a tendency that as the thickness of the thermal oxide film became thicker, the interface state decreased and the breakdown voltage improved.

As a comparative example, a diode similar to that of Example 1 was fabricated and examined, except that the surface of the semiconductor substrate was a (111) plane and the thickness of the thermal oxide film was approximately 0.8μ. exceeded 5 x IQ "cm-", and the withstand voltage was considerably lower than 300V. C on top of the thermal oxide film
When a VD oxide film was laminated, the withstand voltage was further reduced. In addition,
None of the samples using a semiconductor substrate whose surface was an (ILI) plane had an interface level of 5 x l Q "cm-" or less.

In the case of the comparative example, it was also found that, on the contrary, as the thickness of the thermal oxide film increases, the interface state increases and the breakdown voltage decreases.

Example 2 In Example 2, the semiconductor device is a surface gated electrostatic induction thyristor. FIG. 4 shows a schematic configuration of the electrostatic induction system according to the second embodiment.

The electrostatic induction thyristor 11 has an actual operating area A in the center of the semiconductor substrate 12. A gate region 13 and a cathode region 14 are formed on the front surface of the semiconductor substrate 12, with the gate region 13 sandwiching the cathode region 14, and an anode region 15 is formed on the back surface of the semiconductor substrate 12.

A base region 16 made of a high resistivity region is formed between the cathode region 14 and the anode region 150. 13'
14' is a gate electrode, 14' is a cathode electrode, and 15' is an anode electrode.

A guard ring region 21 having a conductivity type opposite to that of the substrate is provided on the side of the actual operation region A, and a thermal oxide film (insulating film) 2 is formed in the guard ring region 21 forming area.
Covered by 2.

As the semiconductor substrate 12, a silicon substrate having a (100) surface is used, and the thickness of the thermal oxide film (insulating film) 22 is in the range of 1 to 2 μm.

Of course, even in this thyristor 11, the interface level between the insulating film 22 and the semiconductor substrate 12 is about 5.times.10" cm@-2 or less, which is a high breakdown voltage thyristor.

Example 3 In Example 3, the semiconductor device is a surface gate type static induction transistor. FIG. 5 shows a schematic configuration of the electrostatic induction transistor of Example 3.

The electrostatic induction thyristor 31 basically differs from the thyristor 11 in that there is an n' layer on the back surface of the semiconductor substrate 12' instead of the p' layer for the anode region, and other things are basically the same. Therefore, the explanation will be omitted. However, in the case of a transistor, the cathode is called the source and the anode is called the drain.

〔Effect of the invention〕

As described above, in the semiconductor device according to the present invention, since the interface level between the insulating film covering the guard ring region forming area and the semiconductor substrate is approximately 5×10"Cl11-" or less, the shallow It has sufficient breakdown voltage even in the guard ring area.

[Brief explanation of drawings]

Figure 1 is a schematic cross-sectional view showing the structure of the diode of Example 1, Figure 2 is a schematic illustration of the depletion layer of this diode, and Figure 3 is the interface state and breakdown voltage in the diode. Figure 4 shows the relationship between Example 2.
FIG. 5 is a schematic cross-sectional view showing the structure of the static induction transistor of Example 3, and FIG. 6 is a schematic cross-sectional view showing the structure of the static induction transistor of Example 3. FIG. 7 is a schematic cross-sectional view showing a guard ring region portion of a semiconductor device.

Claims (1)

[Claims] 1. A semiconductor device including a guard ring region on the side of an actual operation area formed on a semiconductor substrate, and a guard ring region forming area of the semiconductor substrate covered with an insulating film. The interface level between is about 5
A semiconductor device characterized in that the size is less than ×10^1^1 cm^-^2.