JPH03198337A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To sufficiently relieve stress in a silicon oxide film and the interface between the silicon oxide film and a silicon substrate, stabilize element characteristics like transistor characteristics, and form an element of high reliability, by annealing an impurity-introduced layer. CONSTITUTION:When stress generated in a silicon oxide film 2 and the interface between the film 2 and a silicon substrate 1 is relieved, the film 2 is firstly formed on the substrate 1 by, e.g. thermal oxidation, and a polysilicon layer 3 is formed on the film 2. Next, when an impurity-introduced layer 4 is formed on the layer 3, the layer 4 composed of WSi in which fluorine is introduced as impurity is formed, and then annealing is performed in an N2 gas atmosphere (an inert gas atmosphere is also applicable) at 1050 deg.C, for 30 minutes. A silicon oxide film 5 is formed on the layer 4 by, e.g. CVD method, and the film 5, the layer 4, and the layer 3 are patterned, thereby forming a gate electrode composed of the layer 4 and the layer 3. Hence the stress in the film 2 and the interface between the film 2 and the silicon substrate can be sufficiently relieved, so that element characteristics such as transistor characteristics are stabilized, and an element of high reliability can be formed.

Description

[Detailed Description of the Invention] [Summary] Regarding a method for manufacturing a semiconductor device, the stress in the silicon oxide film and at the interface between the silicon oxide film and the silicon substrate can be sufficiently relaxed to stabilize device characteristics such as transistor characteristics. The purpose of the present invention is to provide a method for manufacturing a semiconductor device that can form a highly reliable element, and a method for manufacturing a semiconductor device having a silicon oxide film on a silicon layer. The method is configured to include a step of introducing impurities into the interface between the film and the silicon layer by performing an annealing treatment, and relaxing stress in the silicon oxide film and at the interface between the silicon oxide film and the silicon layer.

[Industrial application field]

The present invention relates to a method of manufacturing a semiconductor device, and relates to a method for manufacturing a radiation-resistant IC.
It can be applied to a method of manufacturing semiconductor devices such as Mo3) transistors used for etc., and particularly relates to a method of manufacturing a semiconductor device that can relieve stress in a silicon oxide film and at the interface between a silicon substrate and a silicon oxide film. .

In recent years, radiation-resistant ICs have been used in outer space, and if they become damaged, they cannot be repaired, and extremely reliable ICs are required. In particular, in outer space, there is a problem that radiation damage occurs when radiation such as gamma rays is incident on the moon C. Normally, this radiation damage occurs largely in insulators such as oxide films. For example, when energy rays such as gamma rays are incident on a MoS transistor, electrons and holes are generated, and if a stress field is generated in the silicon oxide film (gate oxide film) and between the silicon oxide film (gate oxide film) and the silicon substrate, If it exists, mainly holes will be captured by this stress field. Furthermore, if stress exists at the interface between the silicon substrate and the silicon oxide film, radiation may break bonds such as 5i-0 and 5i-H, causing the generation of interface states. If such fixed positive charges or interface states occur, transistor characteristics such as threshold voltage and switching speed will fluctuate, resulting in reliability problems.

Therefore, the stress in the silicon oxide film and at the interface between the silicon oxide film and the silicon substrate can be alleviated to stabilize element identification such as transistor characteristics, thereby manufacturing semiconductor devices that can form highly reliable elements. A method is required.

[Conventional technology]

Conventionally, manufacturing methods for improving the radiation resistance of the silicon oxide film and the interface between the silicon oxide film and the silicon substrate include lowering the temperature of subsequent processes (film formation), including when forming silicon oxide films such as gate oxide films. (reducing the temperature difference between the temperature at room temperature and room temperature) and reducing the residual stress when cooled to room temperature), and making the silicon oxide film thinner (which essentially reduces the amount of damage that occurs). methods have been considered.

[Problem to be solved by the invention]

The conventional manufacturing method by lowering the temperature of the process mentioned above aims to alleviate the stress caused by the difference in thermal expansion coefficient between the silicon substrate and the silicon oxide film by performing the low-temperature process. It is effective in reducing stress in the silicon oxide film. However, since silicon does not bond sufficiently with oxygen at the interface between the silicon substrate and the silicon oxide film, there is a problem in that the generation of interface states is large and the stress at the interface between the silicon substrate and the silicon oxide film cannot be sufficiently alleviated.

Furthermore, in the manufacturing method of thinning the silicon oxide film, it has not been possible to easily reduce the thickness of the silicon oxide film from the viewpoint of oxide film breakdown voltage and the like. Specifically, by making the silicon oxide film thinner, we can substantially reduce the number of electrons and holes generated in the silicon oxide film, thereby alleviating stress within the silicon oxide film and at the interface between the silicon oxide film and the silicon substrate. However, if the silicon oxide film is made too thin, the breakdown voltage of the silicon oxide film will deteriorate. Therefore, there is a limit to how thin the silicon oxide film can be made, and there is a problem in that a sufficient effect for alleviating the stress cannot be obtained.

Therefore, conventional manufacturing methods such as lowering the process temperature and thinning the silicon oxide film cannot achieve sufficient effects to alleviate the above stress, and device characteristics such as transistor characteristics such as threshold voltage and switching speed cannot be obtained. There is a problem that the characteristics tend to fluctuate, making it impossible to form highly reliable elements.

Therefore, the present invention provides a semiconductor that can sufficiently relax the stress in the silicon oxide film and the interface between the silicon oxide film and the silicon substrate to stabilize device characteristics such as transistor characteristics, and form a highly reliable device. The purpose is to provide a method for manufacturing the device.

[Means to solve the problem]

In order to achieve the above object, the method for manufacturing a semiconductor device according to the present invention includes a method for manufacturing a semiconductor device having a silicon oxide film on a silicon layer, in which defects are removed in the silicon oxide film and at the interface between the silicon oxide film and the silicon layer. This method includes a step of introducing impurities to compensate for this by performing an annealing treatment to relieve stress in the silicon oxide film and at the interface between the silicon oxide film and the silicon layer.

In the present invention, the introduction of impurities to compensate for defects into the silicon oxide film and at the interface between the silicon oxide film and the silicon layer may be performed by annealing the silicon oxide film into which impurities have been introduced in advance. Note that the silicon oxide film into which impurities have been introduced in advance refers to the case where it is formed by introducing impurity gas during film formation, and the case where it is formed by introducing impurity ions after film formation. This includes aspects.

In the present invention, impurities are introduced into the silicon oxide film and at the interface between the silicon oxide film and the silicon layer by annealing an impurity-introduced layer formed on the silicon oxide film and into which impurities have been introduced in advance. It is also possible to do so. Note that the impurity-introduced layer in which impurities have been introduced in advance refers to a mode in which it is formed by introducing an impurity gas during film formation, and a mode in which it is formed by introducing impurity ions after film formation. This includes:

Impurities that compensate for defects according to the present invention include impurities such as fluorine and chlorine.

[Effect]

In the present invention, impurities are introduced into the silicon oxide film and at the interface between the silicon oxide film and the silicon layer by performing an annealing treatment to compensate for defects. stress is alleviated.

Therefore, the stress in the silicon oxide film and at the interface between the silicon oxide film and the silicon layer (silicon substrate) can be sufficiently alleviated to stabilize device characteristics such as transistor characteristics, thereby forming a device with high reliability. You will be able to do this. Details will be explained in Examples.

〔Example〕

Hereinafter, the present invention will be explained based on the drawings.

FIG. 1 and FIGS. 2(a) and 2(b) are diagrams illustrating an embodiment of the manufacturing method of a semiconductor device according to the present invention, and FIG. 1 is a diagram illustrating the manufacturing method of one embodiment, Figure 2 (a), (
b) is a diagram illustrating the effect of one embodiment.

In these figures, 1 is a silicon substrate, 2 is, for example, S
3 is a polysilicon layer, 4 is an impurity-introduced layer made of WSi, for example, and 5 is a silicon oxide film made of SiOz, for example. Note that the polysilicon layer 3 and W
By forming the impurity-introduced layer 4 made of Si, it can function as a gate electrode. Also, Figure 2 (
a) shows each layer 1 without annealing for stress relaxation after forming the impurity-introduced layer 4 made of WSi.
．． Figure 2(b) shows the distribution of fluorine concentration for 2, 3, and 4.5, and Fig. 2(b) shows the case where annealing treatment for stress relaxation is performed after forming the impurity-introduced layer 4 made of WSi. This figure shows the distribution of fluorine concentration for each layer 1, 2, and 3°4.5. Specifically, Fig. 2(a)
, (b), the distribution of fluorine concentration of each sample is S T M
S (SecondaryIon Microprob
This is the result of an investigation using e5pectroscopy).
The amount of fluorine ions (count 7 seconds) when sequentially sputtering from the silicon oxide film 5 to the silicon substrate 1 is calculated with respect to the sputtering time.

Next, the manufacturing method will be explained.

Here, inside the silicon oxide film 2 and silicon oxide film 2
A manufacturing method for alleviating the stress generated at the interface between the silicon substrate 1 and the silicon substrate 1 will be specifically described, but this manufacturing method can be applied to a method for manufacturing Mos transistors and the like.

First, as shown in FIG. 1, a silicon oxide film 2 having a thickness of, for example, 2,000 wafers is formed on a silicon substrate 1 by, for example, thermal oxidation, and polysilicon is deposited on the silicon oxide film 2 by, for example, a CVD method. After forming a polysilicon layer 3 having a film thickness of, for example, 3000, wsi is deposited on the polysilicon layer 3 by, for example, the CVD method to have a film thickness of, for example, 1000.
An impurity-introduced layer 4 of 0.000 people is formed. At this time, an impurity-introduced layer 4 made of WSi into which fluorine is introduced as an impurity.
is formed. Impurity introduced layer 4 made of WSi here
The film forming conditions are such that SiH4 gas (6
secm) and WF6 gas (6secm), and the temperature of the silicon substrate 1 is, for example, 400°C. Next, annealing treatment is performed, for example, at 1050° C. for 30 minutes in an N2 gas atmosphere (an inert gas atmosphere may be used). Then, a film thickness of, for example, 2 is formed on the impurity introduced layer 4 by, for example, the CVD method.
00 silicon oxide film 5 is formed. Next, the silicon oxide film 5, WSiN4, and polysilicon N3 are patterned to form a gate electrode consisting of the WSi layer 4 and the polysilicon layer 3, and using the patterned material as a mask, impurities are implanted into the surface of the silicon substrate 1 by ion implantation. is introduced to form a source region and a drain region.

That is, in the above embodiment, impurities are introduced into the silicon oxide film 2 and into the interface between the silicon oxide film 2 and the silicon substrate 1 by subjecting the impurity introduction layer 4 made of WSi into which impurities (fluorine) have been introduced in advance to the above-mentioned annealing treatment. This is intended to relieve stress in the silicon oxide film 2 and at the interface between the silicon oxide film 2 and the silicon substrate 1.

Specifically, as shown in FIG. 2(a), if the annealing treatment for stress relaxation is not performed after forming the impurity-introduced layer 4 made of WSi, the silicon oxide film 2 The fluorine concentration inside and at the interface between the silicon oxide film 2 and the silicon substrate 1 is low, and the silicon oxide film 2
The fluorine concentration at the interface between the silicon oxide film 2 and the silicon substrate 1 is smaller than the fluorine concentration at the interface between the silicon oxide film 2 and the polysilicon layer 3, and is not equal to the fluorine concentration in the silicon oxide film 2 and at the interface between the silicon oxide film 2 and the silicon substrate 1. It can be seen that stress is significantly generated. Note that the silicon oxide film 2 here
The fluorine introduced inside and at the interface between the silicon oxide film 2 and the silicon substrate 1 was introduced when forming the impurity-introduced layer 4 made of WSj, and was not introduced for the purpose of stress relaxation.

On the other hand, as shown in FIG. 2(b), in the case where the annealing treatment for stress relaxation is performed after forming the impurity-introduced N4 made of WSi,
The fluorine concentration at the interface between the silicon oxide film 2 and the silicon substrate 1 is significantly higher than in the case shown in FIG. 2(a) without annealing. Therefore, it can be seen that stress in the silicon oxide film 2 and at the interface between the silicon oxide film 2 and the silicon substrate 1 is significantly relaxed. Since the fluorine concentration at the interface between silicon oxide film 2 and silicon substrate 1 is almost equal to the fluorine concentration at the interface between silicon oxide film 2 and polysilicon N3, stress at the interface between silicon oxide film 2 and polysilicon layer 3 increases. It can be seen that the stress at the interface between the silicon oxide film 2 and the silicon substrate 1 is equal. Therefore, the stress in the silicon oxide film 2 and at the interface between the silicon oxide film 2 and the silicon substrate 1 can be sufficiently alleviated, making it possible to stabilize device characteristics such as transistor characteristics, and to achieve high reliability devices. can be formed.

Note that the above embodiment describes a case where impurities are introduced into the silicon oxide film 2 and into the interface between the silicon oxide film 2 and the silicon substrate 1 by annealing the impurity introduction layer 4 made of WSi into which impurities have been introduced in advance. However, the present invention is not limited to this (the polysilicon layer 3 is formed by introducing an impurity gas such as fluorine or chlorine during the formation of the polysilicon layer 3), and the polysilicon layer 3 is formed by introducing an impurity gas into which impurities are introduced in advance. It may be performed by annealing the silicon layer 3. In this case, the polysilicon N3 film is formed by, for example, adding NF3 gas to monosilane gas at a ratio of 0.1 to 0.5% by volume. 1.1To
It can be performed by low pressure CVD at 625° C., and the annealing treatment condition is, for example, N.

1050° C. for 10 to 20 minutes in a gas atmosphere.

Alternatively, the polysilicon layer 3, which is formed by introducing impurity ions after forming the polysilicon layer 3 and becomes an impurity-introduced layer, may be annealed. In this case, the conditions for ion implantation into the polysilicon layer 3 are, for example, when the thickness of the polysilicon layer 3 is 4000, for example, 10 fluorine ions are implanted into the polysilicon layer 3.
~20KeV.

1 to 3E15/C11l, and the annealing treatment conditions are, for example, 1000°C in an N2 gas atmosphere for 15 to 30 minutes.

Further, in the case where the silicon oxide film 2 is formed by introducing an impurity gas such as fluorine or chlorine during the film formation of the silicon oxide film 2 and becomes an impurity-introduced layer in which impurities are introduced in advance, the silicon oxide film 2 is annealed. Good too. In this case, the polysilicon layer 3 is formed using, for example, oxygen gas, NF3 gas, and HCI! The annealing process can be carried out by CVD at 625-700°C by mixing gases at a ratio of 0.1-0.3% by volume, and the annealing treatment conditions are, for example, 1050°C in a N2 gas atmosphere.
°C for 30 minutes.

〔Effect of the invention〕

According to the present invention, stress in the silicon oxide film and at the interface between the silicon oxide film and the silicon substrate can be sufficiently relaxed to stabilize device characteristics such as transistor characteristics, and a highly reliable device can be formed. There is an effect.

[Brief explanation of drawings]

1 and 2 are diagrams showing an embodiment of the method for manufacturing a semiconductor device according to the present invention. It is a figure explaining an effect. 1... Silicon substrate, 2... Silicon oxide film, 3... Polysilicon layer, 4... Impurity introduced layer, 5... Silicon oxide film. Figure 1 Subafuta time (minutes) (8) Figure illustrating the manufacturing method of one embodiment■ (b) Figure illustrating the manufacturing method of one embodiment

Claims (3)

[Claims] (1) In a method for manufacturing a semiconductor device having a silicon oxide film (2) on a silicon layer (1), in the silicon oxide film (2) and in the silicon oxide film (2).
) and the silicon layer (1) by introducing an impurity to compensate for defects at the interface into the silicon oxide film (2) and between the silicon oxide film (2) and the silicon layer (1). A method of manufacturing a semiconductor device, comprising a step of relaxing stress at an interface. (2) Inside the silicon oxide film (2) and inside the silicon oxide film (
2. The method of manufacturing a semiconductor device according to claim 1, wherein the impurity is introduced into the interface between the silicon layer (1) and the silicon layer (1) by annealing the silicon oxide film into which the impurity has been introduced in advance. (3) Inside the silicon oxide film (2) and inside the silicon oxide film (
2) Introducing impurities to compensate for defects at the interface between the silicon layer (1) and the silicon layer (1) is carried out by annealing the impurity-introduced layer (4) formed on the silicon oxide film (2) and into which impurities have been introduced in advance. A method for manufacturing a semiconductor device according to claim 1.