JPH0319328A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To manufacture a bipolar transistor with high precision in current amplification factor by a method wherein the second conductivity type impurity is ion-implanted in a semiconductor substrate deeper than the first conductivity type impurity through the intermediary of an amorphous layer containing the first conductivity type impurity and simultaneously heat treated to from an emitter region and a base region in the semiconductor substrate. CONSTITUTION:P-type impurity 17 such as boron is ion-implanted through the intermediary of a film 16 made amorphous by ion-implanting 15 n-type impurity such as arsenic to restrain the channeling phenomenon during the ion-implanting process for assuring the impurity concentration distribution without any channeling table as a base region 19. Furthermore, the p-type impurity 17 is ion- implanted in the deeper position than the ion-implanted region of n type impurity 15 passing through the film 16 previously made amorphous so that an emitter region 18 and the base region 19 may be formed simultaneously by the same heat treatment as well as low concentration n type region may be formed between the n-type base region 18 and the p type base region 19 to exhibit an LEC structure.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Applications] The present invention relates to the manufacture of semiconductor devices, particularly hyperpolar transistors.

[Summary of the invention]

The present invention provides a method for manufacturing a semiconductor device in which a second conductivity type impurity is ion-implanted into a semiconductor substrate deeper than the first conductivity type impurity through an amorphous layer containing a first lightning conduction type impurity, and is heat-treated at the same time. By forming an emisoter region of the first conductivity type and a haze region of the second conductivity type in the semiconductor substrate, the channeling phenomenon during ion implantation of impurities of the second conductivity type for forming the haze is suppressed, and the current amplification factor hF is suppressed.
This makes it possible to manufacture semiconductor devices with high accuracy in E.

[Conventional technology]

Currently, bibolar transistors are doubly defeated (or 3f
The emitter region and base region are formed by ion implantation technology, and advances in ion implantation technology have made it possible to realize shallower junctions and higher concentration in each diffusion layer, leading to miniaturization. However, as the concentration of junctions becomes higher, noise becomes a problem due to crystal defects and larger internal electric fields.

On the other hand, as a low-noise transistor, L E shown in FIG.
C (Low Emitter Concentra
tion) structure has been proposed. This high voltage transistor (1) is, for example, n4
An n-type collector region (4) on a silicon substrate (5),
P-type intrinsic Heath region (3) and n-type emitter region (2)
In particular, the emitter region (2) is 2N consisting of a high concentration emitter region (2A) and a low concentration emitter region (2B), that is, a high concentration emitter region (2A) and an intrinsic base region (2N).
3) A low-concentration engineered ξ ivy area (2B) is provided in between,
Achieves low noise. (6) is the base extraction area;
(7) indicates an emitter electrode.

? Problems to be Solved by the Invention] However, the above-mentioned LEC structure transistor (1)
In this case, the intrinsic base region (3) may be formed by high-energy ion implantation, but due to the channeling phenomenon during ion implantation, the Another problem is that the impurities in the base region (3) tend to draw a tail as shown by the broken line (a), increasing the variation in the current amplification factor hFE.

In view of the above-mentioned points, the present invention provides a method for manufacturing a semiconductor device in which the accuracy of h■ is improved.

[Means to solve the problem]

The method for manufacturing a semiconductor device of the present invention includes ion-implanting a second conductivity type impurity into a semiconductor substrate deeper than the second conductivity type impurity through an amorphous layer containing a first conductivity type impurity, and simultaneously heat-treating the semiconductor substrate. The emitter area and heath area should be properly shaped.

Here, the amorphous layer containing impurities of the first conductivity type includes those formed as follows.

A polycrystalline layer is formed on a semiconductor substrate, and a first conductivity type impurity is ion-implanted into the polycrystalline layer or into the polycrystalline layer and the semiconductor substrate to make the polycrystalline layer amorphous.

An amorphous layer is formed on a semiconductor substrate, and a first conductive type impurity is ion-implanted into the amorphous layer or into the amorphous layer and the semiconductor substrate.

An amorphous layer containing impurities of a first conductivity type is formed on a semiconductor substrate.

(Function) According to the above-mentioned manufacturing method, since the base region is shaped by ion-implanting the second conductivity type impurity into the semiconductor substrate through the amorphous layer, the channeling phenomenon at the time of ion implantation is suppressed, and so-called channeling. A base region having an impurity concentration distribution without a tail is formed.Therefore, a bipolar transistor with a highly accurate current amplification factor hFE can be obtained.

Furthermore, by ion-implanting the second conductivity type impurity deeper than the first conductivity type impurity and performing heat treatment, it is possible to simultaneously form the ivy region and the base region, and to form the L
Since it has an EC structure, a low noise bipolar transistor can be used.

(Example) An example of a method for manufacturing a semiconductor device according to the present invention will be described below with reference to the drawings.

An example of a method for manufacturing the essential parts which is the basis of the present invention will be explained using FIG.

As shown in FIG. 1A, a Si.
A field insulating film (12) consisting of a film or the like is formed, and an epitaxial long layer (12) is formed on this field insulating film (12).
After forming the opening (13) facing the opening (1),
) selectively on a predetermined area including
A polycrystalline silicon film (14) of about 3,000 layers is then formed.

Next, as shown in FIG. 1B, an n-type impurity such as arsenic (As) is introduced into the emitter through the opening (l3).
l5) in the polycrystalline silicon film (l4), or in the polycrystalline silicon film (l4) and an epitaxial long layer (11).
Ions are implanted shallowly inside. For example, ion implantation is performed with an implant energy of about 70 keV. This n-type impurity (
By ion implantation of 15), the polycrystalline silicon film (14) becomes amorphous. (16) is an amorphous film.

Next, as shown in FIG. 1C, a p-type impurity (17) such as a base impurity such as boron (B) is ionized deeply into the epitaxial layer (11) through the same opening (13). inject. For example, 100ke V~500ke
Ion implantation is performed with an implantation energy of about V. That is, the p-type impurity (17) is introduced by high-energy ion implantation so that the dose peak Rp is located at a deeper position than the ion-implanted region of the n-type impurity (15).

Next, an annealing process is performed to activate the impurities, and a heavily doped ξ ivy region (18) and a haze region (19) are formed at the same time. The high concentration ξ ivy region (18) is mainly formed by the diffusion of arsenic (As) from the amorphous film (16).

Here, the reason for deeply ion-implanting the p-type impurity (17) will be described. Arsenic (
When trying to form the plant ivy region and the base region by introducing heat treatment and diffusing coefficients (boron has a higher diffusion coefficient than arsenic), arsenic (As) and boron (B) are introduced and heated. It is known that due to the "absorption effect" of boron (B) by the polycrystalline silicon of the As) dove, boron (B) is not diffused into the epitaxial extrusion layer and a base region cannot be formed. Therefore, in this example, boron (
The ion implantation of B) needs to be deeper than the arsenic (As) ion implantation region.

In this way, p-type impurities such as boron (
By ion-implanting 17), the channeling phenomenon during ion implantation is suppressed, and an impurity concentration distribution without channeling tails can be obtained as the base region (19).

In addition, the p-type impurity (17) is an amorphous film (
16) and is implanted deeper than the ion implantation region of the n-type impurity (15), the emitter region (18) and base region (step 9) are simultaneously formed in the same heat treatment, and A low concentration n-type region is formed between the shaped base region (l8) and the p-type heath region (19), and the L
The E C structure is constructed.

Next, an example of a method for manufacturing a bibolar transistor according to the present invention using the manufacturing method shown in FIG. 1 described above will be described with reference to FIG.

In this example, first, as shown in FIG. 2A, a low-concentration epitaxial growth layer (22) of the same conductivity type is formed on a semiconductor substrate of a first conductivity type, for example, a silicon substrate (21).

For example, SiOz is deposited on the main surface of the Ebitital Bocho layer (22).
After forming the insulating film (23) such as a film, the insulation ■Δ (23)
For example, a polycrystalline silicon film (24) is selectively formed on h. This polycrystalline silicon film (24) is formed in a portion corresponding to an emitter region to be formed later.

Using this polycrystalline silicon film (24) as a mask, boron (B) (25) is ion-implanted at a high concentration to form a base extraction region (26) (see FIG. 2B).

Next, as shown in FIG. 2B, a polycrystalline silicon layer (24
) is coated with Si by CVD (Chemical Vapor Deposition)
02 film (27) was applied, and this Sin. Membrane (27)
Heat treatment, or densification, is applied to make the material denser and more stable.

Next, as shown in FIG. 2C, a photoresist coating Iff (28) is formed and then flattened by etchback to expose the surface of the polycrystalline silicon film (24).

Next, a polycrystalline silicon film (24) is formed using KOII solution or the like.
is removed by etching, and the insulating film (23) in the recess formed by this removal is removed by etching to form an opening (
29).

Next, the manufacturing method described above in FIG. 1 is followed. That is, as shown in FIG. 2D, the surface including the inside of the opening (29) is covered with polycrystalline silicon II! After applying (30), arsenic (As) (3l
) is shallowly implanted into the polycrystalline silicon 119 (30) or into the epitaxial predominant layer (22) through the polycrystalline silicon film (30) and the opening (29). This A
Polycrystalline silicon 119 (
30) becomes an amorphous film (32).

Next, the amorphous 11 inside the same openings (two)
Boron (B) (33) is ion-implanted at high energy through No. 2 (32) into the epitaxial growth layer (22) so that the dose peak Rp exists at a deeper position than the As (31) ion implantation region.

Next, an annealing treatment is performed to activate the impurities, and the high concentration emitter region (34A) and the base extraction region (2
At the same time, the intrinsic base area (35) connected to 6) is formalized. Between the high concentration emitter region (34A) and the intrinsic base region (35), a low concentration optical region (34B) consisting of an epitaxial long layer (22) is formed.

Thereafter, the M emitter electrode (37) is shaped, and the amorphous film (32) is selectively etched away except for the part directly under the emitter electrode (37). Thus, as shown in FIG. 2F, the emitter region (34) is separated from the high concentration region (34A) and the low concentration region (34B).
, a bipolar transistor (38) having an LEC structure consisting of an intrinsic base region (35) and a collector region (36) is obtained.

According to the above manufacturing method, the polycrystalline silicon film (30) is shaped including the opening (29) facing the epitaxial layer (22), and arsenic (A s) is added to form the emitter.
After (31) is ion-implanted, boron (B) (33) is ion-implanted to form a base through the film (32) in which the polycrystalline silicon film (30) has become amorphous. , channeling phenomenon during boron (B) ion implantation can be suppressed. Therefore, it is possible to form an intrinsic base region (35) having an impurity concentration distribution without channeling, and it is possible to manufacture a bipolar transistor (38) with extremely high accuracy of current amplification hFE.

Also, boron (B) (33) is converted to arsenic (A s) (3
Since the ion implantation is deeper than the ion implantation region in 1), heat treatment is performed to form the emitter region (34A) and the intrinsic base region (34A).
35) can be formed at the same time, an LEC structure can be obtained, and a low-noise transistor can be realized.

Furthermore, ions are implanted using the opening (29) used to form the emitter region (34A) to form the heath region (35A).
) can be formed using self-aligned lines, making it possible to miniaturize a high-polar transistor with an L E C structure.

In the above example, arsenic (As) is added to the polycrystalline silicon film (30).
(3l) was ion-implanted to make it amorphous, and then boron (B) (33) was ion-implanted. In addition, for example, as shown in FIGS. 3A and B, an amorphous silicon film (4l) was made from the beginning. After ion implantation of arsenic (As) (31) into the amorphous silicon film (41) or into the amorphous silicon film (41) and the epitaxial growth layer (22), poron (B) (33) is formed. Alternatively, the emitter region (34A) and the base region (35) may be formed simultaneously by deeply ion-implanting and heat-treating. Furthermore, as shown in FIGS. 4A and 4B, an amorphous silicon film (42) containing As is first formed including an opening (29), and boron (B) ( 33) may be deeply ion-implanted and then annealed to simultaneously form the industrial ivy region (34A) and the base region (35).

In these embodiments as well, effects similar to those shown in FIG. 2 can be obtained.

〔Effect of the invention〕

According to the method for manufacturing a semiconductor device of the present invention, since the base region is formed by ion-implanting the second conductivity type impurity through the amorphous layer containing the first conductivity type impurity, the base region has an impurity concentration distribution without channeling tails. Therefore, a bibolar transistor with a highly accurate current amplification factor hFE can be manufactured.

Furthermore, since the base region is formed deeper than the emitter region by high-energy ion implantation, an LEC structure can be obtained, and a low-noise transistor can be manufactured.

[Brief explanation of the drawing]

1A to 1D are process diagrams showing an example of the manufacturing method of the basic essential parts according to the present invention, FIGS. 2A to 2F are process diagrams showing an example of the manufacturing method of the bibolar transistor according to the present invention, and FIG. A and B
4A and 4B are process diagrams showing still another example of the method for manufacturing a bipolar transistor according to the present invention, and FIG. 5 is a process diagram showing another example of the method for manufacturing a bipolar transistor according to the present invention. FIG. 6 is a cross-sectional view of the bipolar transistor structure, and FIG. 6 is a diagram showing its impurity concentration distribution. (2l) is an n-silicon substrate, (22) is a low concentration n-type epitaxial layer, (23) is a Sin2 film, (3l)
) is arsenic (As), (33) is boron (B), (34A
) is a high concentration emitter region, (34B) is a low concentration emitter region, (35) is an intrinsic Hess region, and (36) is a collector region.

Claims (1)

[Claims] The second conductivity type is
A conductivity type impurity is ion-implanted into the semiconductor substrate deeper than the second conductivity type impurity, and simultaneously heat-treated to form a first conductivity type emitter region and a second conductivity type base region in the semiconductor substrate. A method for manufacturing semiconductor devices.