JPH03191550A - Semiconductor device - Google Patents

Abstract

PURPOSE:To reduce an amount to be used of Au and to reduce a production cost by installing a branch-line power-supply bus which is proportional to a current capacity required by a circuit block of an internal gate at a gate-array semiconductor device. CONSTITUTION:The following are provided: internal gates 2 installed on a semiconductor substrate 1 so as to be arranged in a matrix shape; circuit blocks 3 installed by selectively connecting the internal gates 2; a main trunk power- supply bus 4 which is used to supply electric power to the circuit blocks 3 and which is composed of an Au layer formed in a frame shape; and branch-line power-supply buses 5 whose interconnection width is proportional to a current capacity required by the respective circuit blocks 3 and which is composed of an Au layer. In this case, regarding the branch-line power-supply buses 5, the branch-line power-supply buses 5 whose width is proportional to the current capacity are installed only in regions of the internal gates 2 which form the circuit blocks 3, and the branch-line power-supply buses 5 are not installed in regions of the internal gates 2 which do not form any circuit block. Thereby, it is possible to reduce an mount to be used of Au which is used for the branch- line power-supply buses 5.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a semiconductor device, The present invention relates to a semiconductor device of this type.

In particular, gate array [prior art] In a conventional gate array one-type semiconductor device, as shown in the second section, internal gates 2 are arranged in rows and columns on a semiconductor substrate 1, and internal gates 2 are selected. a main power supply bus 4 made of a frame-shaped Au layer for supplying power to the circuit block 3;
The main power bus 4 is placed above each of the internal gates 2.
and a branch power supply bus 5 that connects between the circuit block 3 and the circuit block 3.

[Problem to be solved by the invention]

In the conventional semiconductor devices mentioned above, the degree of integration of internal gates has increased, and the power supplied to the circuit blocks has increased, so the power supply bus for power supply has been strengthened using a material that can flow a large current, such as an Au layer. It is designed. However, this power supply bus does not take into account the usage rate of internal gates and the placement of internal gates depending on the product type, so even in the case of a circuit block with a low usage rate of internal gates, a thick wiring reinforced with an Au layer is designed. In the manufacturing process, there is a drawback that the amount of Au used in Au plating is large, and the manufacturing cost is high regardless of the usage rate of the internal gate.

[Means to solve the problem]

The gate array semiconductor device of the present invention includes internal gates arranged in rows and columns on a semiconductor substrate, a circuit block provided by selectively connecting the internal gates, and a circuit block for supplying power to the circuit block. In a semiconductor device comprising a main power supply bus and a branch power supply bus connecting between the main power supply bus and the circuit block, the branch power supply bus has a wiring width proportional to the current capacity required for the circuit block. ing.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a layout diagram of an embodiment of the present invention.

As shown in FIG. 11, internal gates 2 are arranged in rows and columns on a semiconductor substrate 1, and a circuit block is provided by selectively connecting internal gates 2 (parallel diagonal lines are drawn in the drawing). area) 3, a main power supply bus 4 consisting of a frame-shaped Au layer for supplying power to the circuit blocks 3, and an Au layer having a wiring width proportional to the current capacity required for each circuit block 3. Branch line power bus 5 tons! : Prepared and configured.

Here, the branch power supply bus 5 is provided with a width proportional to the current capacity only in the area of the internal gate 2 forming the circuit block 3, and the width of the branch power supply bus 5 is proportional to the current capacity. Since the branch power bus 5 is not provided in the area, the amount of Au used for the branch power bus 5 can be reduced.

〔Effect of the invention〕

As explained above, the present invention reduces the area of the A0 layer relative to the semiconductor chip area by providing a branch power supply bus proportional to the current capacity required for the circuit block of the internal gate in a gate array type semiconductor device. This has the effect of reducing the amount used and reducing manufacturing costs.

[Brief explanation of drawings]

FIG. 1 is a layout diagram of an embodiment of the present invention. Second
The figures are diagrams 14791 to 14791 showing an example of a conventional semiconductor device. DESCRIPTION OF SYMBOLS 1... Semiconductor board, 2... Internal gate, 3... Circuit block, 4... Main power supply bus, 5... Branch power supply bus.

Claims (1)

[Claims] internal gates arranged in rows and columns on a semiconductor substrate;
A circuit block provided by selectively connecting the internal gates, a main power supply bus for supplying power to the circuit block, and a branch power supply bus for connecting between the main power supply bus and the circuit block. 2. A semiconductor device according to claim 1, wherein the branch power supply bus has a wiring width proportional to a current capacity required for the circuit block.