JPH03181290A - Central controller - Google Patents
Central controllerInfo
- Publication number
- JPH03181290A JPH03181290A JP1319904A JP31990489A JPH03181290A JP H03181290 A JPH03181290 A JP H03181290A JP 1319904 A JP1319904 A JP 1319904A JP 31990489 A JP31990489 A JP 31990489A JP H03181290 A JPH03181290 A JP H03181290A
- Authority
- JP
- Japan
- Prior art keywords
- external terminal
- write
- processing process
- storage device
- processor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 claims abstract description 11
- SUBDBMMJDZJVOS-UHFFFAOYSA-N 5-methoxy-2-{[(4-methoxy-3,5-dimethylpyridin-2-yl)methyl]sulfinyl}-1H-benzimidazole Chemical compound N=1C2=CC(OC)=CC=C2NC=1S(=O)CC1=NC=C(C)C(OC)=C1C SUBDBMMJDZJVOS-UHFFFAOYSA-N 0.000 abstract 1
- 230000002950 deficient Effects 0.000 abstract 1
- 238000012423 maintenance Methods 0.000 description 2
- 230000004913 activation Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
Landscapes
- Monitoring And Testing Of Exchanges (AREA)
- Exchange Systems With Centralized Control (AREA)
- Debugging And Monitoring (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は蓄積プログラム制御方式の電子交換機に関し、
特に交換処理を制御する中央制御装置に関する。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an electronic exchange using a storage program control method.
In particular, it relates to a central control unit that controls exchange processing.
従来、メインプロセッサ部にプロセッサのバストレース
用バッファメモリを実装した中央制御装置は無く、プロ
セッサの処理経過を知る手段としては、各々のマイクロ
プロセッサ専用のソフトウェア開発ツールであるインサ
ーキットエミュレータ等を外付けしている。Conventionally, there was no central control unit with a processor bus trace buffer memory installed in the main processor section, and the only way to know the processing progress of the processor was to install an external in-circuit emulator, which is a software development tool dedicated to each microprocessor. are doing.
上述したように、各々マイクロプロセッサ専用のソフト
ウェア開発ツールであるインサーキットエミュレータ等
を外付けしてプロセッサの処理経過を知ることは、運用
システムを停止させてしまう危険性が高い為、運用時の
プロセッサの処理経過を調べることが非常に困難である
。As mentioned above, if you attach an external in-circuit emulator, which is a software development tool dedicated to each microprocessor, to know the processing progress of the processor, there is a high risk of stopping the operating system. It is extremely difficult to investigate the progress of the process.
本発明の中央制御装置は、交換処理を制御するメインプ
ロセラ゛す部にプロセッサの処理経過を蓄積する手段と
、前記処理経過を蓄積する条件を設定する手段と、外部
端末に蓄積情報を出力する手段とを備える。The central control device of the present invention includes means for accumulating the processing progress of the processor in a main processor unit that controls exchange processing, means for setting conditions for accumulating the processing progress, and outputting the accumulated information to an external terminal. and means.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
本発明の一実施例を示す第1図を参照すると、電子交換
機は交換処理を制御するマイクロプロセッサ(μp)2
.マイクロプロセッサ2の処理経過を蓄積するトレース
メモリ(TMEM)3.蓄積エリアを設定する制御部(
CNT)4を搭載する中央制御装置lと、中央制御装置
1のプログラムやデータを蓄積する記憶装置(MEM)
5と、電子交換機の各種データの登録、変更及びトレー
スメモリ3の内容を出力するメンテナンスコンソールな
どの外部端末(TERM>7と、外部端末制御装置(I
OC>6と、交換用接続パスの制御を行う時分割スイッ
チ(TSW)8とから構成される。Referring to FIG. 1 illustrating one embodiment of the present invention, an electronic exchange has a microprocessor (μp) 2 that controls the exchange process.
.. Trace memory (TMEM) that stores the processing progress of the microprocessor 2;3. Control unit for setting the storage area (
CNT) 4 and a storage device (MEM) that stores the programs and data of the central controller 1.
5, an external terminal (TERM>7) such as a maintenance console that registers and changes various data of the electronic exchange and outputs the contents of the trace memory 3, and an external terminal control device (I
OC>6 and a time division switch (TSW) 8 that controls the exchange connection path.
このflI戒において、マイクロプロセッサ2は、アク
セスした記憶装置5または外部端末制御装置6のアドレ
ス及びデータと記憶装置5からのデータ読出し及び書込
みか外部端末制御装置6からのデータ読出し及び書込み
かの識別情報を制御部4からの起動によりトレースメモ
リ3に随時書込む。In this flI command, the microprocessor 2 identifies the address and data of the accessed storage device 5 or external terminal control device 6 and whether data is read and written from the storage device 5 or data is read and written from the external terminal control device 6. Information is written into the trace memory 3 at any time upon activation from the control unit 4.
制御部4は常時書込みを行い、記憶装置5及び外部端末
制御装W6からのアクセス時、アクセス不可やデータネ
良等の障害発生以後のトレースメモリ3への書込みを停
止し、障害発生までのマイクロプロセッサ2の処理経過
をトレースメモリ3に蓄積する。また、外部端末7から
入力された蓄積開始・終了アドレスを制御部4に保持し
、マイクロプロセッサ2の処理アドレスを監視して蓄積
指定エリア内の処理経過のみをトレースメモリ3に蓄積
する。外部端末7からの入力によりトレースメモリ3の
内容を外部端末7の表示部に表示したりプリンタに出力
する。The control unit 4 constantly writes data, and when accessed from the storage device 5 and the external terminal control unit W6, stops writing to the trace memory 3 after a fault occurs such as inaccessibility or data failure, and stops writing to the trace memory 3 until the fault occurs. 2 is stored in the trace memory 3. Further, the storage start and end addresses inputted from the external terminal 7 are held in the control unit 4, the processing address of the microprocessor 2 is monitored, and only the processing progress within the designated storage area is stored in the trace memory 3. In response to input from the external terminal 7, the contents of the trace memory 3 are displayed on the display section of the external terminal 7 or output to a printer.
以上説明したように本発明によれば、交換処理を制御す
るメインプロセッサ部に、プロセッサの処理経過を蓄積
する手段と、処理経過を蓄積する条件を設定する手段と
、メンテナンスコンソール等の外部端末に蓄積情報を出
力する手段とを設けることにより、ソフトウェア開発ツ
ールであるインサーキットエミュレータ等を用いること
なく、プロセッサの処理経過を知ることが出来る為、運
用時においても記憶装置及び外部端末制御装置に対する
アクセスの割合を容易に測定できるとともに、障害発生
時においては、障害発生原因の究明が容易になる。As explained above, according to the present invention, the main processor unit that controls the replacement process includes a means for accumulating the processing progress of the processor, a means for setting conditions for accumulating the process progress, and an external terminal such as a maintenance console. By providing a means for outputting accumulated information, it is possible to know the processing progress of the processor without using an in-circuit emulator, which is a software development tool, so access to the storage device and external terminal control device can be maintained even during operation. This makes it easy to measure the ratio of failures, and when a failure occurs, it becomes easy to investigate the cause of the failure.
第1図は本発明の一実施例を示す構成図である。
1・・・中央制御装置(CPU)、2・・・マイクロプ
ロセッサ(μp)、3・・・トレースメモリ(TMEM
)、4・・・制御部(CNT)、5・・・記憶装置(M
EM)、6・・・外部端末制御装置(IOC)、7・・
・外部端末(TERM) 、8・・・時分割スイッチ(
TSW)。FIG. 1 is a block diagram showing an embodiment of the present invention. 1... Central control unit (CPU), 2... Microprocessor (μp), 3... Trace memory (TMEM)
), 4...control unit (CNT), 5...storage device (M
EM), 6... External terminal control device (IOC), 7...
・External terminal (TERM), 8...Time division switch (
TSW).
Claims (1)
の処理経過を蓄積する手段と、前記処理経過を蓄積する
条件を設定する手段と、外部端末に蓄積情報を出力する
手段とを備えることを特徴とする中央制御装置。The main processor unit that controls the exchange process is equipped with means for accumulating the processing progress of the processor, means for setting conditions for accumulating the process progress, and means for outputting the accumulated information to an external terminal. Central control unit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1319904A JPH03181290A (en) | 1989-12-08 | 1989-12-08 | Central controller |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1319904A JPH03181290A (en) | 1989-12-08 | 1989-12-08 | Central controller |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03181290A true JPH03181290A (en) | 1991-08-07 |
Family
ID=18115532
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1319904A Pending JPH03181290A (en) | 1989-12-08 | 1989-12-08 | Central controller |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03181290A (en) |
-
1989
- 1989-12-08 JP JP1319904A patent/JPH03181290A/en active Pending
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