JPH03150835A - Charged beam lithography method - Google Patents

Abstract

PURPOSE:To eliminate an improper mask or wafer generated due to manual operation by automatically setting a peripheral mark pattern necessary for lithography and lithographical conditions. CONSTITUTION:A graphic position is positioned on a predetermined subfield by a main deflector 33, the graphic position is positioned in the subfield by a subdeflector 34, and a beam shape is controlled by a beam size varying deflector 32 and a shaping apertures 35, 36. A lithography stripe region collected with frame forces divided in a rectangular shape in response to a beam deflecting width from a LSI chip pattern region is plotted while unidirectionally continuously moving a table 12. Further, the table 12 is steppedly moved in a direction perpendicular to the continuously moving direction, and this process is repeated to sequentially plot lithography stripe regions. Thus, generation of an improper mask due to manual operation error can entirely be eliminated.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention is directed to a charging method for drawing patterns of semiconductor integrated circuits such as LSIs on samples such as masks and semiconductor wafers at high speed and with high precision. The present invention relates to a beam writing method, and particularly to a charged beam writing method in which writing conditions for writing a pattern are decoded from a pattern identification name and writing is performed.

(Prior Art) In recent years, LSI patterns have become increasingly finer and more complex, and electron beam lithography devices are widely used as devices for forming such patterns. When drawing a desired pattern using this device, LS such as CAD
Design pattern data created using the pattern design tool of I cannot be supplied as drawing pattern data in its original format, but must be converted into drawing pattern data that can be accepted by the above-mentioned drawing apparatus.

In this data conversion process, for example, the design pattern data is subjected to contouring processing to remove multiple exposure areas, and then one rectangle, one trapezoid, one triangle, etc. is formed for each unique unit drawing area (frame area) determined by the beam deflection area. By dividing the data into basic figures, the figure data can be made acceptable to the electron beam lithography system. As a result, Shufi! Drawing pattern data related to the circuit and chip placement data defining where on the sample the LSI chip should be drawn are generated, and these data are stored in a storage medium such as a magnetic disk.

In the drawing processing process, from the data stored in the storage medium,
The drawing pattern data expressing the drawing pattern for each frame area is read out to the pattern data buffer and temporarily stored in the pattern data buffer, and this data is decoded and the drawing unit figure (figure size (rectangles with restrictions on shape and triangles with restrictions on shape and size). Then, the beam position and beam shape are controlled based on the resulting graphical data, and the table on which the sample is placed is continuously moved in the X or Y direction to form a desired pattern within the frame area. draw.

Next, the table is moved in steps by the width of the frame area in a direction perpendicular to the continuous movement direction, and the above process is repeated to perform the drawing process on the entire desired area. In addition,
In the two-stage deflection method, in which the main deflection means determines the sub-deflection position and the sub-deflection means performs drawing, a frame area is composed of a collection of unit drawing areas (subfields), and the width of the frame area is determined by the main deflection means. It is defined by the beam deflection width. In this drawing method, drawing pattern data is read out for each frame area in the same way as described above, and drawing processing is performed while continuously moving the table.

A sample drawn by such a drawing process, for example, in the case of a mask, is mainly used for light exposure and for a reduction projection exposure apparatus. In addition to the LSI pattern, the mask also contains alignment marks and drawing accuracy evaluation marks that are necessary for highly precise positioning when transferring the LSI pattern formed on the mask to the wafer using the reduction projection exposure apparatus. It is necessary to form various mark patterns.

Further, depending on the process conditions after the pattern drawn on the mask is transferred to the wafer, it is necessary to invert the black and white of the pattern or to draw the pattern by mirror inversion. Furthermore, even when the sample to be drawn is a semiconductor wafer and the pattern is directly drawn with an electron beam, the pattern to be drawn may be inverted in black and white, or
It is necessary to mirror-reverse the drawing process.

Conventionally, in order to set the selective arrangement of mark patterns on a mask as described above, necessary mark data is arranged at necessary positions in a process of converting design pattern data into drawing data. Furthermore, drawing conditions such as black-and-white reversal and mirror reversal are also defined as part of the drawing pattern data.

However, this type of method has the following problems. In other words, the type and arrangement position (mark information) of the mark pattern formed on the mask vary widely depending on the type of reduction projection exposure device that exposes the mask pattern onto the wafer and the mask drawing conditions. The work of selecting and arranging mark types with consideration was dependent on humans. Therefore, errors may occur in the type or position of the mark,
A situation has arisen in which the drawn masks end up being defective. Further, a worker who converts the design pattern data into drawing pattern data, a worker who draws a pattern on a mask based on the drawing pattern data, and a worker who transfers the mask pattern onto a wafer are usually separated. Therefore, when conditions such as the type and position of marks to be drawn change, the information is sequentially communicated from the pattern transfer worker to the data conversion worker, until the change in conditions is inserted into the drawing pattern data. The efficiency of this process was extremely low, and mistakes were often made.

Furthermore, writing conditions such as black-and-white reversal writing and mirror reversal writing are defined by the data conversion operator based on a specific drawing, as described above, and may be incorrectly defined, resulting in the drawn mask or wafer being There were cases where the product was defective.

With the spread of automatic design of LSI patterns and conversation design methods using workstations, the number of masks to be drawn tends to increase exponentially. This was a major hindrance in moving forward.

(Problem 8 to be solved by the invention) Conventionally, mark information, drawing conditions, etc. have been artificially set by an operator in the process of converting design pattern data to drawing pattern data. This resulted in poor work efficiency and caused the production of defective masks and defective wafers. Note that the above-mentioned problem is not limited to the electron beam lithography method, but also applies to an ion beam lithography method using an ion beam.

The present invention has been made in consideration of the above circumstances, and its purpose is to eliminate the occurrence of defective masks or defective wafers that conventionally occurred due to manual intervention, and to eliminate the occurrence of defective masks or defective wafers that were conventionally caused by manual intervention. An object of the present invention is to provide a charged beam drawing method that can improve the reliability of LSI patterns produced and the device operating rate.

[Structure of the Invention] (Means for Solving the Problems) The gist of the present invention is to decipher mark information, drawing conditions, etc. from the identification name of a pattern to be drawn on a mask or wafer, thereby creating peripheral marks necessary for drawing. The goal is to automatically set patterns, drawing conditions, etc.

That is, the present invention uses LSI in a mask used for pattern transfer.
In a charged beam drawing method for drawing a pattern, mark information regarding peripheral mark patterns to be located around the main pattern (for example, mark pattern type, arrangement position, and In addition to deciphering the mark pattern and main pattern writing conditions (for example, black and white reversal of the writing pattern, mirror reversal, writing magnification, beam irradiation amount during writing, and proximity effect correction procedure),
In this method, a main pattern and a peripheral mark pattern are drawn on the mask based on the decoding result.

The present invention also provides a charged beam drawing method for directly drawing an LSI pattern on a mask or a semiconductor wafer used for pattern transfer, in which a pattern is drawn based on a pattern identification name representing the pattern to be drawn on the mask or wafer. This is a method in which the drawing conditions are deciphered and the pattern is drawn based on the deciphered results.

(Function) According to the method of the present invention, mark information, drawing conditions, etc. are automatically set from the pattern identification name, so the data conversion operator can be determined according to the model of the reduction projection exposure apparatus and the mask drawing conditions. The complicated work of selecting and arranging a wide variety of mark types and placement positions is eliminated, and the occurrence of defective masks due to human error can be completely eliminated.

Also, errors in setting drawing conditions such as black-and-white reversal drawing and mirror reversal drawing can be completely eliminated due to the same background as described above. Furthermore, it becomes possible to quickly respond to changes in the drawing conditions (including changes and additions to the types and placement positions of marks to be drawn). As a result, it becomes possible to increase the operating rate of the charged beam lithography apparatus and to improve the productivity of LSI. In addition, the above drawing method will be applied to future LSIs.
It is expected that this method will have a more effective effect on the miniaturization of patterns, the improvement in the degree of integration, and the increase in the number of drawn patterns accompanying the rapid progress in technology.

(Example) Hereinafter, details of the present invention will be explained with reference to illustrated embodiments.

FIG. 1 is a schematic diagram showing the configuration of an electron beam lithography system used in a method according to an embodiment of the present invention.

In the figure, reference numeral 10 denotes a sample chamber, and a table 12 on which a sample 11 such as a glass mask or a semiconductor wafer is placed is accommodated in the sample chamber 10. The table 12 is driven by a table drive circuit 13 in the X direction (left and right directions on the paper) and the Y direction (front and back directions on the paper). And table 12
The moving position of is measured by a position circuit 14 using a laser length measuring needle or the like.

An electron beam optical system 20 is arranged above the sample chamber 10. This optical system 20 includes an electron gun 21, various lenses 2
2-26, blanking deflector 31. Beam dimension variable deflector 32. Main deflector 33 for beam scanning Sub deflector 34 for beam scanning and beam shaping aperture 35.3
It consists of 6 mag. Then, it is positioned in a predetermined unit drawing area (subfield) by the main deflector 33,
The sub-deflector 34 positions the figure drawing position within the sub-field, and the beam dimension variable deflector 32
The beam shape is controlled by the shaping apertures 35 and 36, and while the table 12 is continuously moved in one direction, a drawing stripe area is drawn, which is a collection of frame areas obtained by dividing the LSI chip pattern area into strips according to the beam deflection width. Process. Further, the table 12 is moved stepwise in a direction perpendicular to the continuous movement direction, and the above process is repeated to sequentially draw each drawing stripe area.

Note that when drawing only one chip, the frame area is sequentially drawn in the same manner as above.

On the other hand, the control computer 40 has a magnetic disk (storage medium) 4.
1 is connected, and the drawing pattern data of the LSI chip is stored in this disk 41. The drawing pattern data of the LSI chip read from the magnetic disk 41 is temporarily stored in the pattern memory (data buffer section) 42 for each drawing stripe area.

The drawing pattern data for each drawing stripe stored in the pattern memory 42, that is, the drawing stripe information consisting of the drawing position, basic figure data, etc., is decoded by the pattern data decoder 43 and the drawing data decoder 44, which are data decoding units. and blanking circuit 45. Beam shaper driver 46. The signal is sent to a main deflector driver 47 and a sub deflector driver 48 .

That is, the pattern data decoder 43 receives the above data and performs inversion processing on the graphic data included in the drawing stripe area as necessary to generate inverted pattern data. Next, the basic figure data defined as drawing stripe data is applied to the forming aperture 35.36.
The beam control data is created based on this data and sent to the blanking circuit 45. Further, desired beam size data is created, and control data for beam shaping is sent to the beam shaper driver 46. Next, a predetermined deflection signal is applied from the beam shaper driver 46 to the beam size variable deflector 32 of the optical system 20, thereby controlling the size of the electron beam.

Further, the drawing data decoder 44 creates subfield positioning data based on the drawing stripe data, and sends this data to the main deflector driver 47. Then, from the main deflector driver 47 to the optical system 20
A predetermined signal is applied to the main deflector 33 of the main deflector 33, whereby the electron beam is deflected and scanned to a specified subfield position. Further, the drawing data decoder 44 generates a control signal for scanning the sub-deflector, and this signal is sent to the sub-deflector driver 48.

A predetermined sub-deflection signal is applied from the sub-deflector driver 48 to the sub-deflector 34, thereby performing drawing processing for each sub-field.

Next, an electron beam lithography method using the apparatus configured as described above will be explained. FIG. 2 shows the process of generating data for performing the drawing process. The LSI pattern is
Designed and created using a CAD system, the design pattern data is converted into a drawing pattern by a host computer with high processing power, such as a large computer. Then, this drawing pattern data is read out and electron beam drawing is performed.

Here, the data created by the CAD system is usually composed of a group of polygonal patterns, and is a graphic data system in which patterns are allowed to overlap each other. In order to convert LSI pattern data in this format into a graphic data system that can be accepted by an electron beam lithography system, the host computer performs the following data processing.

(1) Execute contouring processing of the figure to remove multiple beam exposure areas.

(2) As shown in FIG. 3(a), the area of the LSI chip is divided into frame areas 53a to 53d, which are unit drawing areas deflected by the beam, and subfield areas 54. FIG. 3(b) shows drawn figures in the subfield region 54, which are made into polygons 51 and 52 by removing the beam multiple exposure region.

(3) The drawing figures in the subfield area 54 are subjected to a figure division process into a basic figure group 56 consisting of rectangles, trapezoids, etc. as shown in FIG. 3(C).

The graphic data obtained through such a data generation process is expressed by ■ a graphic shape flag, ■ a graphic position, and ■ a graphic size, and is defined as a graphic data group in subfield area and frame area units, and is stored in the magnetic disk 41. .

When performing mask drawing processing, the fourth
A mask pattern as shown in the figure is drawn. The drawing mask includes an LSI generated in the data conversion process described above.
In addition to the pattern parts 60a to 60c, there are alignment marks (an example of the mark shape is shown in FIG. 5(a)) and drawings for the reduction projection exposure device around the LSI pattern parts (main patterns) as shown in 61 to 64. Accuracy evaluation marks (an example of the mark shape is shown in FIG. 5(b)), etc. are arranged,
Further, identification marks such as those shown at 65 are drawn so that the type of mask can be visually identified, thereby creating a desired mask.

Next, a process of drawing such a mask will be described. As shown in FIG. 2, the drawing pattern data 60a to 60c related to the LSI chip pattern converted by the host computer are stored in the magnetic disk 41 and placed under the control of the control computer 40. Then, the control computer 40 selects and arranges a necessary mark pattern based on the mask name (pattern name) representing the type of the converted pattern data, and performs drawing processing under necessary drawing conditions.

Specifically, the control computer 40 determines various drawing conditions while referring to a drawing information table as shown in FIG. 6, and uses the drawing conditions. In the drawing information table of FIG. 6, the LSI chip part whose data has been converted is replaced with the name "MA I N" corresponding to the keyword part extracted from a part of the mask name, and the name of the MA I N pattern is shown. Mark layout information to be drawn before drawing and mark layout information to be drawn after drawing the MAIN pattern are defined as mark information.

In this example, the 5th to 7th digits of the mask name are “EFG”.
The first definition information in the table indicates that the mark layout "Ao" will be drawn before the MAIN pattern is drawn, and the mark layout "B" will be drawn after the MAIN pattern is drawn. ing.

And mark layout “Ao” defined here
and "B" are stored in advance in the magnetic disk 41 of the control computer together with mark pattern data 61 to 64 as mark arrangement data of the system shown in FIGS. 7(a) and 7(b), respectively.

Furthermore, the above drawing information table includes a black and white inversion definition section, a mirror inversion definition section, and other specifications such as scaling (
It is a system in which writing conditions such as magnification specification), beam irradiation amount during writing, necessity of proximity effect correction writing and its method (type of correction) can be defined.

Therefore, if a part of the mask name defined second in the above table matches "EDC", the MA I N pattern part is inverted in black and white and is subjected to drawing processing as shown in FIG. 8(a). .Furthermore, the third definition “AB・
...In the case of the mask name E'', the system is such that the mirror is inverted and the writing process is performed as shown in Fig. 8(b).The above scaling, beam irradiation amount, and proximity effect correction are also performed in the same way. This will be reflected in the drawing process.

Therefore, the mask drawing process shown in FIG. 4 is performed in accordance with the following procedure.

(1) A mask rD pattern 65 corresponding to the mask name is drawn.

(2) Mark pattern 6 placed at the four corners of the mask
1 is drawn.

(3) Data-processed LSI putter 2 parts 60a to 60
c is drawn.

(4) Mark patterns 62 to 64 arranged around the LSI pattern portion are drawn.

Through the processing steps described above, when converting data, LS
It is now possible to create data without being aware of patterns and drawing conditions other than the 2nd part of the I pattern,
This eliminates the need for manual work in selecting, arranging, and setting drawing conditions for the marks required for each mask type, and it is possible to completely eliminate the occurrence of defective masks due to human error. As a result, the throughput of the drawing process can be improved, the operating rate of the apparatus can be improved, and the reliability of the LSI mask to be drawn can be improved. Furthermore, by referring to the ID pattern corresponding to the mask name, the processing conditions after drawing the sample can be clearly determined.

Furthermore, the processing system described above is also very effective when drawing a pattern directly on a wafer.

For example, in the case of wafer drawing, black and white inversion, dimension correction (pattern thickening/thinning processing), proximity effect correction, etc. are required depending on the processing process after drawing. Furthermore, if scaling, mirror inversion, etc. can be specified, the permissible range of the device will be widened, which has the advantage of improving usability.

Furthermore, when manufacturing LSIs by using both reduction transfer of a mask and direct writing on a wafer, the pattern drawing position is corrected when drawing the pattern on the wafer in accordance with the pattern transfer distortion of the transfer device, so that the pattern can be accurately drawn. Overlapping processing is required.

When performing such processing, by setting the drawing conditions using the pattern identification name in the same way as the mask drawing described above, it is possible to eliminate defective drawings due to human error, and as a result, it is possible to improve the drawing throughput, improve the operating rate of the equipment, and The reliability of the drawn wafer can be improved.

Thus, according to the method of this embodiment, when converting data, L
It is now possible to create data without being aware of patterns and drawing conditions other than the 2nd part of the SI putter,
This eliminates the need for manual work in selecting, arranging, and setting drawing conditions for marks required for each type of pattern, and it is possible to completely eliminate the occurrence of defective masks or defective wafers due to human error. Furthermore, changes or additions to mark types, placement positions, drawing conditions, etc. can be handled only on the side that processes the mask or wafer drawing process, thereby eliminating any influence on data conversion. As a result, the throughput of the drawing process can be improved, the operating rate of the apparatus can be improved, and the reliability of the LSI mask to be drawn can be improved.

Note that the present invention is not limited to the embodiments described above. For example, the means for storing the drawing pattern data is not limited to a magnetic disk, but other storage media such as a magnetic tape or a semiconductor memory can be used. Further, the configuration of the electron beam lithography apparatus is not limited to the same as that shown in FIG. 1, but can be modified as appropriate. Although the embodiments have been explained using an electron beam as an example, the application is not limited to electron beams, but can also be applied to ion beams, laser beams, etc., and the writing method can be a two-stage deflection method that combines main and sub-deflection. , a one-stage deflection method or a three-stage or more deflection method may be used. Furthermore, in addition to the shot method using a variable shaped beam, it is also applicable to a device method using a circular beam. Moreover, the drawing pattern data stored in the storage medium is also applicable not only to the graphic system of basic figures but also to drawing unit figures and polygonal figures.

In addition, various modifications can be made without departing from the gist of the present invention.

[Effects of the Invention] As described in detail above, according to the present invention, by decoding mark information, drawing conditions, etc. from the identification name of the pattern to be drawn on a mask or wafer, peripheral mark patterns and drawing conditions necessary for drawing can be determined. Conditions etc. can be set automatically. Therefore, it is possible to eliminate the occurrence of defective masks or defective wafers, which conventionally occurred due to manual intervention.
It is possible to improve the reliability of LSI patterns written by a charged beam drawing device and the device operating rate.

[Brief explanation of the drawing]

Fig. 1 is a schematic diagram showing the configuration of an electron beam lithography system used in a method according to an embodiment of the present invention, Fig. 2 is a schematic diagram showing the process of generating drawing pattern data, and Fig. 3 is a schematic diagram showing the process of generating drawing pattern data. A schematic diagram showing figure division and area division of
Fig. 4 is a schematic diagram showing an example of a mask layout to be drawn, Fig. 5 is a schematic diagram showing an example of a mark pattern, Fig. 6 is a schematic diagram showing the internal structure of a drawing information table, and Fig. 7 is a schematic diagram of a mark layout. FIG. 8 is a schematic diagram showing an example, and is a schematic diagram showing a drawing system when black and white inversion and mirror inversion are specified. DESCRIPTION OF SYMBOLS 10... Sample chamber, 11... Sample, 12... Table, 20... Electron optical system, 21... Electron gun, 22-26... Lens, 31-34... Deflector , 35.36... Beam shaping aperture, 40... Control computer, 41... Magnetic disk (storage medium), 42... Pattern memory, 43... Pattern data decoder, 44... Drawing data Decoder, 45...Blanking circuit, 46-48...Deflector driver, 51.52...Design pattern, 53a-53d...Frame area, 54...Subfield area, 56... Basic figure, 60 a ~ 60 c-LS I pattern part, 61.
...Alignment mark, 62-64...Evaluation mark, 65...Identification mark.

Claims (5)

[Claims] (1) In a charged beam drawing method for drawing an LSI pattern on a mask used for pattern transfer, a peripheral mark pattern to be located around the main pattern is determined from a pattern identification name indicating the type of pattern to be drawn on the mask. 1. A charged beam writing method comprising: decoding mark information related to the mask, decoding conditions for writing the mark pattern and the main pattern, and writing the main pattern and the mark pattern on the mask based on the decoding results. (2) The mark information indicates the type, arrangement position, and drawing order of the mark pattern, and the mark information is decoded by first extracting a part of the pattern identification name and placing it for each keyword. 2. The charged beam drawing method according to claim 1, wherein the drawing is carried out by referring to a table including a mark definition section in which the type, arrangement position, and drawing order of the mark pattern are defined. (3) In a charged beam lithography method in which an LSI pattern is directly drawn on a mask or semiconductor wafer used for pattern transfer, when drawing the pattern based on a pattern identification name indicating the type of pattern to be drawn on the mask or wafer. A charged beam writing method characterized by decoding writing conditions and performing writing processing on the pattern based on the result of the decoding. (4) The writing conditions indicate black and white reversal of the writing pattern, mirror reversal, writing magnification, beam irradiation amount during writing, proximity effect correction procedure, etc. To decipher the writing conditions,
Claim 1 or 3, wherein the drawing is performed by referring to a keyword section in which a part of the pattern identification name is extracted in advance and a table in which the drawing conditions are defined for each keyword.
Charged beam writing method described. (5) The charged beam drawing method according to claim 1 or 3, wherein the pattern identification name is written simultaneously on a peripheral portion of the main pattern when drawing the LSI pattern on the mask or wafer.