JPH02148824A - Method and apparatus for charged beam lithography - Google Patents

Abstract

PURPOSE:To largely accelerate a processing time by processing removal of graphic superposition, etc., for each block region by a graphic calculator of an exclusive use hardware. CONSTITUTION:Graphic data in a zone region is divided into basic graphic groups, the graphic data of graphic pattern group contained in the region which contains no shaded pattern of oblique lines except 45 deg. is represented as an assembly of vertex coordinates values, and stored in the inner buffer of a graphic calculator connected to a host computer. The calculator sorts the graphic data group with the vertex coordinates as a base, and slit-divides the graphic pattern in the region by a X-axis or Y-axis parallel linear lines passing the vertex coordinates of the data group. Whether the line segment crossing the slit is the starting or ending line segment of the graphic is discriminated in the slit-divided region to remove the superposition of the graphics.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a charged beam drawing technology for drawing patterns of semiconductor integrated circuits such as LSIs on samples such as masks and wafers at high speed and with high precision. In particular, the present invention relates to a charged beam lithography method and a lithography apparatus that enable high-speed generation of lithography pattern data used for lithography.

(Prior Art) In recent years, LSI patterns have become increasingly fine and complex, and an electron beam lithography system has been used as a device for forming such patterns. When drawing a desired pattern using this device, it is not possible to supply design pattern data created using an LSI pattern design tool such as CAD as drawing pattern data to the drawing device in its original format. Can not.

In other words, since design pattern data is generally created as a data system with a very high degree of freedom, the following restrictions must be satisfied in order to create a data system that can be accepted by an electron beam lithography system. .

■A graphic system consisting only of basic shapes such as trapezoids and rectangles that can be accepted by electron beam lithography equipment.

■ Eliminate overlaps between figures that result in multiple beam exposures and reduce pattern accuracy.

■A graphic system divided into unit drawing areas that is closely related to the drawing method of electron beam drawing equipment.

Therefore, the multiple exposure areas of the graphic patterns defined as the above design pattern data are removed, and then rectangles and
By dividing the data into basic graphic groups such as trapezoids, a graphic data system acceptable to the electron beam lithography system is created. Through these steps, drawing pattern data related to the integrated circuit is generated, and this data is stored in a storage medium such as a magnetic disk for use in drawing processing.

In the drawing processing step, the drawing pattern data is read out for each frame area and temporarily stored in a pattern data buffer, and this data is decoded and the basic figure group is a collection of drawing unit figures that can be formed by beam forming means. shall be. Then, while controlling the beam position and beam shape based on the results, the table on which the sample is placed is
or the Y direction to draw a desired pattern within the frame area.

Next, the table is moved in steps by the width of the frame area in a direction perpendicular to the continuous movement direction of the table, and the above process is repeated to perform the drawing process on the entire desired area.

In addition, in the two-stage deflection method in which the main deflection means controls the sub-deflection position and the sub-deflection means performs writing, a frame area is composed of a collection of sub-fields, and the width of the frame area is the beam deflection width of the main deflection means. It is stipulated by. In this method as well, drawing pattern data is read out for each frame area and drawing processing is performed while continuously moving the table, similarly to the above.

However, this type of method has the following problems. That is, in order to generate drawing pattern data that can be accepted by an electron beam drawing device, it is essential to perform processes such as overlap removal and black-and-white inversion on graphic data defined as design pattern data created by CAD, etc. be.

Conventionally, this process involves the process of generating drawing pattern data from design pattern data (hereinafter referred to as data conversion process).
This is done by a software process using a technique called the touch puffer method or the slit method, without distinguishing whether or not diagonal lines other than 45 degrees exist. When using such a method, the processing time is proportional to the number of shapes to the 1.5th power in the touch jig method, and the processing time is proportional to the number of shapes to the 1.5th power in the slit method. Furthermore, the performance of the processing computer has a large effect on the processing time.

Such processing time is causing the data conversion processing time to become longer as LSIs become smaller and more highly integrated, and as the drawing throughput of the drawing device itself improves. This may cause a problem in which the supply of pattern data is delayed, and there is a constant need to expand the computers that perform data conversion processing and upgrade to faster computer systems.

These problems will reduce the operation rate of electron beam lithography equipment and cause a decline in LSI productivity.In the future, with the rapid progress of LSI, pattern miniaturization and increased integration will lead to electronic This poses a major problem when operating the beam drawing device efficiently.

(Problem to be Solved by the Invention) As described above, in the data conversion process for generating drawing pattern data from design pattern data, conventional methods have been used to determine whether the graphic data has a diagonal line or whether the diagonal line is a 45° diagonal line. Without distinguishing whether it is a diagonal line other than ``,
Using techniques called the touch jig method or the slit method, a single data conversion computer was used to perform processes such as removing overlaps between figures and reversing black and white. Therefore, it is quite conceivable that the data conversion time becomes longer, which may lead to a problem of lowering the drawing throughput.

Note that the above-mentioned problem is not limited to the electron beam drawing method, but also applies to an ion beam drawing method using an ion beam.

The present invention has been made in consideration of the above circumstances, and its purpose is to significantly speed up the processing required for removing overlapping figures, etc., shorten data conversion time, and increase drawing throughput. An object of the present invention is to provide an improved charged beam drawing method and a charged beam drawing apparatus used therein.

[Configuration of the Invention (Means for Solving the Problems) The gist of the present invention is to determine whether graphic data other than 450 is defined as graphic data for each block area configuring design pattern data. , a dedicated graphic calculation unit processes overlap removal for a group of figures in a block area that does not include figures other than 45'', and a data conversion computer performs overlap removal processing for block areas that include figures other than 45°. By performing the processing on its own, the purpose is to reduce the processing time required for removing overlapping figures, etc. while reducing the development cost of the graphic calculation unit.

That is, the present invention generates writing pattern data for charged beam writing from LSI design pattern data defined by a set of locking areas composed of at least one of graphic data and reference data of other blocks, In a charged beam drawing method for drawing a desired pattern on a sample based on this drawing pattern data, in the figure data defined in the block area including the figure data,
It is determined whether there is a diagonal line pattern other than 45" in which the length of the projected line segment on the X-Y coordinate axis of the line segment constituting the graphic data is different. 1 trick for graphic data included in 0 block area (1
Then, a graphic calculation section 1 connected to a computer sends out the graphic data and performs predetermined graphic processing (overlap removal processing).

For graphic data included in a block area that includes a diagonal line other than 45° (a turn),
This is a method in which the computer itself performs the graphic processing (therefore, the graphic data subjected to the graphic processing is divided into unit drawing areas and basic figures to generate the drawing X-turn data.

The present invention also provides graphical data and other professional information. Drawing pattern data for charged beam writing is generated from LSI design pattern data defined as a set of block regions made up of at least one of the reference data of In a charged beam drawing device that draws a desired pattern, the graphic data is subjected to predetermined graphic processing, and the graphic data subjected to the graphic processing is divided into a group of basic figures in basic area units that can be accepted as the drawing pattern data, and a drawing pattern is created. A computer that generates data, a graphic operation unit that is coupled to this computer and performs graphic processing on graphic data independently of the computer, and a graphic processing unit that is connected to this computer and performs graphic processing on graphic data independently of the computer; Line segment composing figure data
and means for determining whether a diagonal line pattern other than 45° exists that has a different length of projected line segment on the Y coordinate axis, and is included in a block area in which there is no diagonal line pattern other than 45°. Regarding the graphic data group, the graphic data is sent to the graphic calculation unit to perform graphic processing on these figures, and the graphic data included in the block area including the diagonal line pattern other than 45 degrees is processed by the computer itself. The above graphical processing is performed using

(Operation) According to the present invention, the graphic processing (the mutual overlap removal process 1 inversion process) that requires the longest processing time among the data conversion processes for generating drawing pattern data from design pattern data can be performed using the design pattern data. The processing time required to remove overlaps between figures can be reduced by sending the figure data to the figure operation unit, which is dedicated hardware that performs high-speed processing such as removing overlaps between figures, for each constituent block area. It is possible to significantly speed up the process. Furthermore, while the graphic calculation unit is processing the above-mentioned shape removal processing, etc., the data conversion computer itself can perform other processing, and the overall data conversion time can be significantly speeded up.

In addition, 4 pieces of graphic data whose overlaps can be removed in the graphic calculation section are
By limiting the figure to a figure that does not include a diagonal line pattern other than 5°, the circuit configuration (circuit scale) of the figure calculation section can be greatly simplified. The reason for this is that for graphic data that does not include diagonal patterns other than 45°, even if the graphic is divided into parts, which is necessary in processes such as overlap removal, the apex coordinates of the graphic, which are treated as internal data of the graphic calculation unit, are This is because the minimum unit (hereinafter referred to as a design grid) in which design pattern data is created does not deviate from the minimum unit (hereinafter referred to as a design grid), so that all internal processing of the graphic calculation unit can be performed using integer value calculations. On the other hand, if an attempt is made to perform overlap removal processing on a group of figures that include a diagonal line pattern other than 45'', it is inevitable that the figure will deviate from the design grid, and floating point calculations must be performed using hardware. This not only complicates the circuit configuration but also causes various limitations.In addition, in practical terms, the number of block areas that include diagonal patterns other than 45@ is quite small, and the It is sufficiently practical to perform the process using a data conversion computer in parallel with the overlap removal process.

In addition, when removing overlap between graphic patterns in the graphic calculation unit, the graphic pattern sent from the computer is expressed by its circumscribed rectangle, and a first overlap check is performed as a standardized graphic data system. As a result, only for the graphic pattern group determined to have a type, overlap removal processing between the actual graphic patterns included in the circumscribed rectangle is performed. In this case as well, in the mold removal process described above,
By limiting the graphic data that can be overlapped and removed in the graphic calculation unit to figures that do not include diagonal patterns other than 45°, the circuit configuration (circuit scale) of the graphic calculation unit can be greatly simplified.

In addition, when removing mutual overlap between graphic patterns and inverting black and white in the graphic calculation unit, the graphic pattern sent from the computer is expressed by its circumscribed rectangle, and the first non-overlapping inversion process is performed as a standardized graphic data system. After generating a graphic to be processed, the actual graphic patterns included in the fusion area of the circumscribed rectangle are removed from each other and black and white are inverted. In this case as well, in the above-mentioned shape removal and black-and-white reversal processing, by limiting the graphic data to be subjected to the above processing in the graphic calculation unit to figures that do not include diagonal patterns other than 45°, the circuit configuration of the graphic calculation unit (circuit (scale) will be significantly simplified.

As described above, the method of the present invention makes it possible to significantly speed up the processing time required for removing overlapping figures and reversing black and white while reducing the development cost of the figure calculation unit, and as a result, reduces the data conversion time. It is possible to improve the image processing and drawing throughput. As a result, it is possible to increase the operating rate of the charged beam lithography apparatus and to improve the productivity of LSI. Furthermore, it is expected that the graphic processing method of the charged beam lithography system described above will be more effective for the miniaturization and higher integration of patterns that will accompany the rapid progress of LSI in the future.

(Example) Hereinafter, details of the present invention will be explained with reference to illustrated embodiments.

FIG. 1 is a schematic configuration diagram showing an electron beam lithography apparatus used in the first embodiment method of the present invention. In the figure, 10 is a sample chamber, and this sample chamber 1.

Inside is a sample 11 such as a semiconductor wafer or a glass mask.
A table 12 on which is placed is accommodated. table 1
2 is driven by a table drive circuit 13 in the X direction (left and right directions on the page) and Y direction (front and back directions on the page). The moving position of the table 12 is determined by n1 by a position circuit 14 using a laser length meter or the like.

An electron beam optical system is arranged above the sample chamber 10. This optical system 2o includes an electron gun 21. Various lenses 2
2-26. Blanking deflector 31. Deflector for variable beam dimensions 32. Main deflector for beam scanning 33. Sub deflector 34 for beam scanning and beam shaping aperture 35°3
It consists of 6 mag. Then, the main deflector 33 positions the predetermined sub-deflection area (subfield), the sub-deflector 34 positions the figure drawing position within the sub-field, and the beam size variable deflector 32 and the shaping aperture 35 The beam shape is controlled by .36, and the frame area is drawn while the table 12 is continuously moved in one direction. Further, the table 12 is moved stepwise in a direction perpendicular to the direction of continuous movement, and the above process is repeated to sequentially draw each frame area.

On the other hand, the control computer 40 has a magnetic disk (recording medium) 4.
1 is connected, and LSI chip data is stored in this disk 41.

The chip data read from the magnetic disk 41 is stored in a pattern memory (data buffer section) for each frame area.
42.

The pattern data for each frame area stored in the data buffer section 42, that is, the frame information consisting of the drawing position, basic figure data, etc., is analyzed by the pattern data decoder 43 and the drawing data analysis section 44, which are data analysis sections. Blanking circuit 45. Beam shaper driver 46, main deflector driver 47 and sub deflector driver 4
Sent to 8th.

That is, the pattern data decoder 43 inputs the above data, divides the basic figure data defined as frame data into a group of drawing unit figures that can be formed by the combination of the shaping apertures 35 and 36, and processes the data based on this data. blanking data is created and sent to the blanking circuit 45. Further desired beam size data is then sent to the beamformer driver 46. Next, a predetermined deflection signal is applied from the beam shaper driver 46 to the beam size variable deflector 32 of the electron optical system 20, thereby controlling the size of the electron beam.

Further, the drawing data decoder 44 creates subfield positioning data based on the frame data, and sends this data to the main deflector driver 47. Then, a predetermined signal is applied from the main deflector driver 47 to the main deflector 33 of the electron optical system 20, whereby the electron beam is deflected and scanned to a designated subfield position. Furthermore, the drawing data decoder 44 generates a control signal for sub-deflection scanning, and this signal is transmitted to the sub-deflector driver 4.
Sent to 8th. A predetermined sub-deflection signal is applied from the sub-deflector driver 48 to the sub-deflector 34, thereby performing drawing processing for each sub-field.

Next, a drawing method using the electron beam drawing apparatus configured as described above will be explained. FIG. 2 shows the process of generating data for performing the drawing process. LSI patterns are designed and created using a CAD system, and the design pattern data is converted into drawing pattern data by a host computer. Then, this drawing data is read out and drawing processing using an electron beam is performed.

Here, design pattern data created by a CAD system is usually expressed by a combination of several blocks as shown in Figure 3(a), and the internal structure of the data expressing each block is It is defined by at least one of block graphic data and reference information of other blocks. For example, the data of block 2 is combined with the reference information of another block 3 as shown in FIG. 3(b).
It is expressed as a collection of data of figure 4 included in block 2. The graphic data is expressed as polygonal data, and the graphic data system allows patterns to overlap each other between the respective graphics.

In order to convert LSI pattern data in this format into writing pattern data having a data system that can be accepted by an electron beam writing system, the host computer performs preprocessing to remove pattern overlap between the blocks. A region 7 in which block regions 5 and 2 overlap with each other as shown in FIG. 4 is processed according to the procedure disclosed below.
The pattern is expanded to its upper block 1, and the block structure is reorganized and the block data is rearranged.

That is, in block area 1, which corresponds to the entire LSI chip as a block structure, a graphic data group including reference information of block areas 2 and 5 and development patterns of block areas 5 and 2 is defined, and in block area 2, block area 1 is defined. 3 reference information and graphic data 4 are defined, and block areas 5 and 3 are defined.
is a data structure in which a group of graphic data included in each area is defined.

Then, the graphic processing procedure for removing the overlap of the graphic data groups defined in each block area is performed for the area 8 where the graphic pattern group of the block area 1 is defined as shown in FIG. explain.

■A predetermined standard is set for the size of the block area, and block areas larger than the standard size are shown in Figure 6 (a).
), the area is divided into 9 areas (hereinafter referred to as zone areas) of a predetermined size, and a graphic data group consisting of the graphic pattern shown in FIG. 6(b) is selected from the area as a zone to be subjected to graphic calculation Extract as a region.

(2) Dividing the graphic data (polygonal graphic pattern) in the zone area into basic graphic groups such as trapezoids and rectangles as shown in FIG. 6(e). In this figure dividing step into basic figures, a zone area including a diagonal line pattern other than 45'' and a zone area not including a diagonal line pattern other than 45'' are distinguished.

(2) For a group of graphic patterns included in a zone area that does not include a diagonal pattern other than 45° for each zone area, each graphic data is expressed as a set of its vertex coordinate values, as shown in FIG. Then, as shown in FIG. 8, the data is stored in the internal buffer of the graphic calculation unit connected to the host computer.

■The graphic calculation unit performs sorting processing (ordering figures in order from small to large vertex coordinate values) on the group of figure data sent from the host computer based on their vertex coordinates, and then The figure pattern in the zone area is divided into slits by X-axis parallel straight lines or Y-axis parallel straight lines passing through the vertex coordinates of the data group, as shown in Fig. 6(d).
The graphical system shown in

■Using the slit method, which removes mutual overlap between figures while determining whether the line segment that crosses the slit is the start line or end line segment of the figure, within the area divided into slits in the above processing step■. As a result, the graphic system shown in FIG. 6(e) is created.

■Then, for the figure pattern subdivided by the slit method, as shown in Figure 6(f), the figures are fused to reduce the number of figures, and the resulting set of apex coordinate values of the figure pattern is A group of graphic data expressed as a field is stored in a buffer, and a termination signal indicating that the graphic overlap removal process for one zone area has been completed is output to the host computer as an interrupt signal.

(2) After the host computer sends the graphic data to the graphic calculation section in the above processing step (2), it repeats the processing steps (2) to (2) for the next zone area or block area. Also,
As shown in Figure 8, a plurality of graphic calculation units are connected to the host computer via high-speed buses, and when the graphic data is sent to the graphic calculation unit in the processing step ① above, the operating status of each graphic calculation unit is The process is carried out while monitoring the process and selecting the graphic arithmetic unit that actually performs the overlap removal process.

■ Through the processing steps described above, overlapping graphic patterns included in block areas or zone areas that do not include diagonal patterns other than 45 degrees can be processed at high speed, as shown in Figure 6 (g). Block areas or zone areas containing diagonal line patterns other than 45'' are not processed by the graphic calculation unit, but the host computer performs graphic overlap removal processing in the same processing steps ① to ③.

Through the above-described processing steps, the mutual overlapping of graphic patterns in all block regions constituting the LSI chip is removed. As shown in FIG. 9, block reference information is provided in block areas 2 and 3.5 that are referenced by referring to all block areas 2 and 3.5 within the space of block area 1 that corresponds to the entire LSI chip. The block structure is reorganized so that it becomes a data system consisting only of graphic data without defining it.

Next, each block area is divided into subfield areas 50, which are unit drawing areas in which the beam can be deflected only by the sub-deflection means, to create a system as shown in FIG. However, for a block area that is smaller in both X and Y directions than the subfield area, the above division process into subfields is not necessary, and furthermore, the zone area when performing overlap removal for graphic patterns in the above block area is an area in subfield units. By doing so, the above-mentioned division process into subfields is unnecessary. Then, the graphic pattern in units of subfields is divided into basic figures such as rectangles and trapezoids, and data in units of subfields is expressed as a set of basic figures.

The figure data obtained through such a data generation process is expressed by a figure shape flag, figure position, and figure size to construct data for each subfield, and the reference position of this subfield area is determined as shown in Fig. 11. frame areas 61 to 65 are defined while determining whether or not the field is included in a predetermined width that allows the beam to be deflected by the main deflection means, and frame data is constructed by collecting subfield data included in the frame area. Furthermore, drawing pattern data for drawing the LSI chip area is created as a collection of the frame data.

Through the processing steps described above, writing pattern data in which figures do not overlap can be converted at high speed, and the turnaround time for supplying data to the electron beam writing apparatus can be significantly shortened.

Thus, according to the method of this embodiment, it is possible to significantly shorten the time required to convert the design pattern data into the drawing pattern data that can be accepted by the electron beam drawing apparatus, and also to reduce the time required to convert the design pattern data into the drawing pattern data that can be accepted by the electron beam drawing apparatus. By adding a restriction that the figure to be processed by the figure arithmetic unit that removes mutual overlap between figure patterns does not include diagonal patterns other than 45°, the processing load of the figure arithmetic unit (circuit scale) can be significantly reduced.

Next, a second embodiment method of the present invention will be explained.

This embodiment is the same as the previous embodiment up to the step shown in FIG. 5, but differs from the step shown in FIG. 6 onwards. That is, the graphic processing for removing the overlap of the graphic data groups defined in each block area is performed on the area 8 in which the graphic pattern group of the block area 1 as shown in FIG. 5 is defined. Explain the steps.

■A predetermined standard is set for the size of the block area, and block areas larger than the standard size are shown in Figure 12 (
As shown in a), the graphic data group consisting of graphic patterns 101 to 109 shown in FIG. 12(b) is divided into areas 9 of a predetermined size (hereinafter referred to as zone areas) 9 and subjected to graphic operations. Extract as the target zone area.

■Graphic data (polygon pattern) in the zone area 101
-109 are graphically divided into basic graphic groups 111-127, such as trapezoids and rectangles, as shown in FIG. 12(c). Then, for each of the divided graphic patterns, a graphic data group as shown in FIG. 13 is generated with a graphic code that distinguishes whether it is a diagonal line pattern other than 45°, and the host The data is sent to a data buffer in a graphic processing unit connected to a computer via a high-speed bus.

■Each graphic operation unit connected to the host computer is
A circumscribed rectangle as shown in FIG. 12(d) is obtained by calculating the XY minimum and maximum values from the coordinate values of the four vertices of each graphic data defined as a graphic data group as shown in FIG. 13 above. The data group lit' is set to 127°.

(2) Then, all the graphic patterns are expressed as uniform graphic data called circumscribed rectangles, and it is determined whether or not each circumscribed rectangle has an overlapping area, and a circumscribed rectangle 113' that does not have an overlapping area is determined. , 11G'
~122°, 124', 127 are actual graphic patterns 113, 118 to 1 included in the circumscribed rectangle.
22, 124, and 127 are also determined to have no overlap,
The graphic data is stored in a first data buffer within the graphic calculation section.

■“Overlapping” is detected by checking the overlap between the above circumscribed rectangles
The figure pattern 111° determined to be .

112, 114, 115', 123°, 125°
, 126, a circumscribed rectangular fusion region 131, as shown in FIG. 12/6) that selectively overlaps only
The graphic patterns included in 132 are checked for mutual overlap.

■When inspecting the mutual overlap of figure patterns, it is determined whether or not figure patterns other than 45° are included as figure patterns included in the circumscribed rectangle;
Only for the mutual overlap removal processing of graphic patterns included in the area +32 that does not include diagonal patterns other than 5",
Processing is performed within the graphic calculation unit according to the processing procedure described later. As for the graphic data for the graphic pattern group included in the area 131 that includes diagonal line patterns other than 45°,
The data is stored in the second data buffer in the graphic arithmetic unit in its original format.

■As shown in the area 132, mutual overlap between graphic patterns that do not include diagonal line patterns other than 45'' can be removed by dividing the graphic pattern group by using X-parallel straight lines or Y-axis parallel straight lines passing through the vertex coordinates of each graphic data group. Figure 12 (
The slit area 133 is divided into slits as shown in r).
~136, while determining whether the line segment that crosses the slit is the start line or end line segment of the figure, generates a figure pattern in which the figures do not overlap each other, as shown in Fig. 12(g). Graphic patterns 141 to 146.

■The graphic patterns 145 and 146 subdivided by the slits shown in FIG. 12(g) above are subjected to graphic fusion processing to generate 145゛, and the number of figures is reduced to form the graphic pattern shown in FIG. 12(h). , the process of additionally storing the graphic data group in the first data buffer of the graphic calculation unit as the same system as the graphic data shown in FIG. 13 is repeated to determine the mutual overlap of graphic patterns in one block area or zone area. The removal process is performed and a completion signal is sent to the host computer.

■The host computer receives the end signal from the graphic arithmetic unit and performs overlap removal processing on a group of graphic patterns containing diagonal patterns other than 45″ that are stored in the second data buffer of the graphic arithmetic unit. The graphic data obtained as a result is processed by software using the same procedure as the method described above, and the graphic data group stored in the first data buffer of the graphic calculation unit is integrated into one block area or Performs overlap removal processing for graphic patterns included in one zone area.

[Phase] The above-mentioned overlap removal process for each block area or zone area is performed in parallel by several graphic calculation units connected to the host computer via a high-speed bus, as shown in FIG. 14, to speed up the processing. ing.

Through the above-described processing steps, the mutual overlapping of graphic patterns in all block regions constituting the LSI chip is removed. Then, as in the previous embodiment, the block structure is reorganized to form a data system as shown in FIG. Furthermore, each block area is divided into subfield areas 5
A division process into 0 is performed to create a system as shown in FIG. Then, the graphic pattern in units of subfields is divided into basic figures such as rectangles and trapezoids, and data in units of subfields is expressed as a set of basic figures.

The graphic data obtained through such a data generation step is expressed by a graphic shape flag, a graphic position, and a graphic size to construct data for each subfield.
As shown in the figure, frame areas 61 to 65 are defined to construct frame data, and drawing pattern data for drawing the LSI chip area is created as a collection of the frame data. Through the processing steps described above, drawing pattern data in which figures do not overlap each other can be converted at high speed as in the previous embodiment.

Next, a third embodiment method of the present invention will be described.

This embodiment is a method in which pattern inversion processing is performed in addition to overlap removal processing. The steps up to the step shown in FIG. 5 are the same as those in the first embodiment, and the steps after FIG. 6 are different. That is, the graphic processing for removing the overlap of the graphic data groups defined in each block area is performed for area 8 where the graphic pattern group of block area 1 is defined as shown in FIG. explain.

■A predetermined standard is set for the size of the block area, and block areas larger than the standard size are shown in Figure 15 (
As shown in a), the graphic data group consisting of graphic patterns 201 to 209 shown in FIG. 15(b) is divided into regions 9 of a predetermined size (hereinafter referred to as zone regions) 9 and subjected to graphic operations. Extract as the target zone area. Note that the graphic pattern 209 is a graphic pattern corresponding to the external size of the block area 2 referred to by the block area.

■Graphic data (polygon pattern) within the zone area 201
-209 are divided into basic figure groups 211-227, such as trapezoids and rectangles, as shown in FIG. 15(e). and,
Generate a graphic data group as shown in FIG. 13, in which a graphic code is assigned to each divided graphic pattern to distinguish whether or not it is a diagonal line pattern other than 45°,
As shown in FIG. 14, the data is sent to the data buffer in the graphic arithmetic unit connected to the host computer via a high-speed bus.

■Each graphic operation unit connected to the host computer is
The X-Y minimum and maximum values are calculated from the four apex coordinate values of each figure data defined as a figure data group as shown in FIG. 13 above, and the result is calculated as shown in FIG. It is assumed that the circumscribed rectangle data group is 211° to 227°.

②In this way, all graphic patterns are expressed as uniform graphic data called circumscribed rectangles, and the zone area 9 is defined by Y-axis parallel straight lines passing through the vertices of each circumscribed rectangle, as shown in FIG. 15(e). Slit area 2 as shown in
The above circumscribed rectangle 211° to 2
Inverted graphic patterns 232a to 232k for 27° are generated and stored in the first data buffer in the graphic calculation section.

0th order 211', which has an overlapping area between the circumscribed rectangles among the circumscribed rectangles 211'' to 227''.

213, 214', 215° and 224゛~226°
As shown in FIG. 15<n, the fused figures 233 and 234 are circumscribed rectangles.

■Then, each circumscribed rectangle and the above fused figure 233
, 234, depending on whether a diagonal line pattern other than 45° is defined in the figure pattern included in the circumscribed rectangle and the fused figure, whether the inversion processing for the figure pattern included in the circumscribed rectangle and the fused figure is performed in the figure calculation unit or by the host computer. As shown in FIG. 15(g), for a region 234 that does not include a diagonal line pattern other than 45", the graphic calculation unit uses the Y-axis that passes through the apex of each shape to pass through the region. Figure patterns 238 to 242 are divided into slits using parallel shapes and are inverted patterns within the slits.
are generated, and a group of graphic data for these graphic patterns is additionally stored in the first data buffer.

■As shown in FIG. 15(g), for the area 233.219° that includes a diagonal line pattern other than 45°, the graphic pattern included in that area and the data indicating the area are input to the second part of the graphic calculation unit. Store it in the data buffer and send an end signal to the host computer.

■The host computer divides the area 233 shown by the polygon in the above fused figure into areas 233a and 233b,
Inversion processing is performed on the graphic patterns included in each of the areas 233a, 233b, and 239' to generate inversion patterns 235 to 237 for areas including diagonal patterns other than 45 degrees.

■Reverse patterns obtained in the above processing step ■Reverse patterns that do not include diagonal patterns other than 45° and that are stored in the first data buffer of the figure calculation unit are collected and shown in FIG.
The graphic system shown in h) is adopted, and further, a graphic fusion process is performed on these figures to reduce the number of figures.

Through the processing steps described above, inverted graphic patterns without overlapping with respect to the graphic patterns in all the block regions constituting the LSI chip are generated. Then, as in the previous embodiment, the block structure is reorganized into a data system as shown in FIG. Furthermore, each block area is divided into subfield areas 50 and the 10th
The system will be as shown in the figure. Then, the graphic pattern in units of subfields is divided into basic figures such as rectangles and trapezoids, and data in units of subfields is expressed as a set of basic figures.

The graphic data obtained through such a data generation step is expressed by a graphic shape flag, a graphic position, and a graphic size to construct data for each subfield.
As shown in the figure, frame areas 61 to 65 are defined to construct frame data, and drawing pattern data for drawing the LSI chip area is created as a collection of the frame data. Through the processing steps described above, it is possible to quickly convert the drawing pattern data that has been subjected to inversion processing so that the figures do not overlap with each other.

Note that the present invention is not limited to the embodiments described above. For example, the means for storing the chip data is not limited to a magnetic disk, but may be a storage medium such as a magnetic tape or a semiconductor memory. Further, the configuration of the electron beam lithography apparatus is not limited to the same as shown in FIG. 1, but can be changed as appropriate according to specifications. In addition, although the embodiments have been explained using an electron beam as an example, the application is not limited to electron beams (it is applicable to charged beams including ion beams, and can be applied to shot methods using variable shaped beams as well as raster scanning methods). It is also applicable to devices.

In addition, various modifications can be made without departing from the gist of the present invention.

[Effects of the Invention] As detailed above, according to the present invention, it is possible to significantly shorten the time for converting design pattern data into writing pattern data that can be accepted by an electron beam lithography system, and as a result, the writing throughput can be improved. This can contribute to improving LSI productivity.

In addition, after inspecting the overlap with a standardized figure using the circumscribed rectangle of the figure pattern in the figure calculation unit that performs figure overlap removal and black-and-white inversion processing, the figure to be overlapped is selected and the figure is rotated at 45°. By adding the restriction that it does not include any other diagonal pattern, the internal processing of the graphic calculation unit can be realized without using floating point calculations, reducing the development cost of the graphic calculation unit without degrading practical performance. can do.

[Brief explanation of the drawing]

1 to 11 are for explaining the method of the first embodiment of the present invention, FIG. 1 is a schematic configuration diagram showing the electron beam lithography apparatus used in the same embodiment, and FIG. 2 is a lithography method. A schematic diagram showing the pattern data generation process, Fig. 3 is a schematic diagram showing the data structure of design pattern data, Fig. 4 is a schematic diagram showing the block structure reorganization process, and Fig. 5 is a schematic diagram showing the processing target in the block area. A schematic diagram for showing a group of figures, Fig. 6 is a series of figure system diagrams for explaining the overlapping removal process of figures, and Fig. 7 is a figure in a block area or zone area stored in the buffer of the figure calculation unit. System diagram showing data, No. 8
The figure is a schematic diagram showing the relationship between the host computer that performs data conversion processing and the graphic calculation unit, Figure 9 is a schematic diagram showing the block structure reorganization process, and Figure 10 explains the division process into subfield areas. FIG. 11 is a schematic diagram showing the process of dividing into frame regions, and FIGS. 12 to 14 are for explaining the method of the second embodiment of the present invention. The figure is a series of graphic system diagrams for explaining the process of removing overlaps in figures, FIG. 13 is a system diagram showing graphic data in a block area or zone area stored in the buffer of the graphic calculation unit, and FIG. 14 is a data system diagram. Schematic diagram showing the relationship between the host computer that performs the conversion process and the graphic calculation unit, Part 1
FIG. 5 is a series of graphic system diagrams for explaining the third embodiment of the present invention, and for explaining the process of removing overlaps in graphics. 1 to 3.5... Block, 2.6... Figure pattern, 7... Overlapping area of blocks, 8... Area where figure pattern of plot area is defined, 9... zone area, 10...sample chamber, 11...sample, 12.
... table, 20 ... electron optical system, 40 ... control computer, 41 ... magnetic disk (storage medium), 42 ...
...Pattern memory (data buffer section), 43...
- Pattern data decoder, 44... Drawing data decoder, 50... Subfield area, 61-65...
-Frame area.

Claims (6)

[Claims] (1) Generate drawing pattern data to be used for charged beam writing from LSI design pattern data defined as a set of block areas consisting of at least one of graphic data and reference data of other blocks, and generate this drawing pattern. In a charged beam drawing method for drawing a desired pattern on a sample based on data, X and Y line segments constituting the graphic data are included in the graphic data defined in a block area that includes the graphic data.
Determine whether there is a diagonal line pattern other than 45° with different lengths of projected line segments on the coordinate axes, and combine with the computer for graphic data included in a block area where there is no diagonal line pattern other than 45°. The graphic data is sent to the graphic calculation unit that has been created to perform predetermined graphic processing, and for graphic data included in a block area where a diagonal line pattern other than 45° exists, the computer itself performs the above graphic processing, and A charged beam drawing method, characterized in that the drawing pattern data is generated by dividing the processed figure data into unit drawing areas and basic figures. (2) The charged beam lithography according to claim 1, wherein the graphic processing is the removal of overlapping graphics, and the overlapping removal is performed for each block area or each zone area obtained by dividing the block area into predetermined areas. Method. (3) The graphic processing is a graphic inversion process, and the inversion process is performed for each block area or each zone area obtained by dividing the block area into predetermined areas.
Charged beam writing method described. (4) A computer generates writing pattern data to be used for charged beam writing from LSI design pattern data defined as a set of block areas consisting of at least one of graphic data and reference data of other blocks. In a charged beam drawing method for drawing a desired pattern on a sample based on drawing pattern data, a group of figure data included in the block area is sent to a figure operation unit coupled to the computer, and the figure operation unit processes each figure data. express the figure data of as a circumscribed rectangle, determine whether the circumscribed rectangle overlaps with another circumscribed rectangle, store the original figure data group in the first data buffer for figures that do not overlap, and express the circumscribed rectangle to be overlapped. Only for figures included in a rectangle, is there a diagonal line pattern other than 45° in which the lengths of the line segments projected onto the X-coordinate axis and the line segments projected onto the Y-coordinate axis are different? 45 additionally stores a graphic data group obtained by selectively performing overlap removal processing on figures included in a group of circumscribed rectangles that do not include a diagonal line pattern other than 45° in the first data buffer; Graphic data groups containing diagonal line patterns other than ° are stored in the second data buffer as they are and sent to the computer, and only the graphic data groups stored in this second data buffer are overlapped by the computer. repeating the process of carrying out removal processing and collecting the graphic data group from which overlaps have been removed by the graphic calculation unit and computer to obtain a non-overlapping graphic data group of one block area;
The drawing pattern data is generated by obtaining a group of figure data in which figure patterns do not overlap each other over the entire LSI chip, and dividing the figure data group into unit drawing areas and basic figures based on the group of figure data. Charged beam writing method. (5) A computer generates writing pattern data to be used for charged beam writing from LSI design pattern data defined as a set of block areas consisting of at least one of graphic data and reference data of other blocks. In a charged beam drawing method for drawing a desired pattern on a sample based on drawing pattern data, a graphic operation unit coupled to the computer is provided with a circumscribing rectangle that includes the entire block area and a figure included in the block area. The data group and the circumscribed rectangle information of the block area referenced by the block area are added to the above graphic data group and sent, and this graphic calculation unit expresses each graphic data as a circumscribed rectangle, and the overlap between the circumscribed rectangles is From the fused figure group obtained by performing the fusion process of the circumscribed rectangles to remove the block area, the figure data group subjected to the inversion process cut from the circumscribed rectangle of the entire block area is stored in the first data buffer, and each Regarding the figures included in the fused figure, the lengths of the line segments projected onto the X-coordinate axis and the line segments projected onto the Y-coordinate axis of each line segment composing the figure are different.45
It is determined whether there is a diagonal line pattern other than 45°, and for a fused figure that does not include a diagonal line pattern other than 45°, the figure is extracted from the fused figure area after the overlap of the actual figure pattern included therein is removed. A graphic data group whose pattern has been inverted is additionally stored in the first data buffer, and a graphic data group including a diagonal line pattern other than 45° is stored in the second data buffer in its original format. The computer performs graphic inversion processing only on the graphic data group sent to the computer and stored in the second data buffer, and the graphic data group inverted by the graphic calculation unit and computer is collected into one block area. By repeating the process of obtaining a group of inverted figure data within the LSI chip, a group of figure data in which figure patterns do not overlap with each other is obtained over the entire LSI chip, and based on this group of figure data, division into unit drawing areas and basic figures is performed. A charged beam drawing method characterized in that the drawing pattern data is generated by performing the following steps. (6) Generate writing pattern data to be used for charged beam writing from LSI design pattern data defined as a set of block areas consisting of at least one of graphic data and reference data of other blocks, and generate this writing pattern. In a charged beam drawing device that draws a desired pattern on a sample based on data, the figure data is subjected to predetermined figure processing, and from the figure data subjected to the figure processing, a basic figure in a basic area unit that can be accepted as the drawing pattern data is provided. a computer that generates drawing pattern data by dividing it into groups; a graphic calculation section that is coupled to this computer and performs graphic processing on graphic data independently of the computer; and a graphic defined in a block area that includes the graphic data. means for determining whether or not a diagonal line pattern other than 45° exists in the data, in which line segments constituting each graphic data have different lengths projected onto the X and Y coordinate axes. For a group of graphic data included in a block area in which there is no diagonal line pattern other than 45 degrees, the graphic data is sent to the graphic operation section to perform graphic processing on these figures, and to create a diagonal line pattern other than 45 degrees. A charged beam lithography apparatus, characterized in that the computer itself performs the graphic processing for graphic data included in a block area containing the .