JPS63127532A - Charged-beam lithography - Google Patents

Abstract

PURPOSE:To improve the writing speed and throughput by building the chip data of an integrated circuit as a collection of pattern data and providing it for the lithographic process. CONSTITUTION:Subfield information is generated from pattern information, and frame information is generated as a collection of information. The chip data of an LSI is constructed as a collection of the frame information and stored in a desk. In this case, a chip region 70 of the LSI consists of regions 72a, 72b where the pattern density is high and a region 71 where the pattern density is low. The frame information is built with frame widths 81b to 81f being set so as to be a maximum data size storable in a pattern memory, and a lithographic process is performed with pattern data generated by this frame information. With this, the overflow of the pattern memory can be prevented in advance, further the table stepping time required before and after the lithographic process can be supressed to a minimum, and as a result, the throughput of the lithographic process can be improved.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention provides a charged beam for drawing patterns of semiconductor integrated circuits such as LSIs on samples such as masks and wafers at high speed and with high precision. The present invention relates to a drawing method, and particularly relates to a charged beam drawing method in which the size of a frame area A is made variable.

(Prior Art) In recent years, LSI patterns have become increasingly finer and more complex, and electron beam lithography devices have been used to form such patterns.

When drawing a desired pattern using this device, CA
Design data generated by an LSI design tool such as D cannot normally be used as drawing data for the above-mentioned drawing device in its original format. The reason for this is: (1) Design data is generally expressed in polygons, whereas data used for electron beam lithography can only have basic shapes such as trapezoids or rectangles.

■ If there is overlap between figures, multiple exposure will occur and drawing accuracy will deteriorate.

(2) Data to be used for electron beam lithography must be divided into unit lithography areas for which lithography processing is performed.

This is due to this.

Therefore, for example, the above design data is subjected to contouring processing to remove multiple exposure, and then a basic figure such as a rectangle 0 trapezoid for each unique unit drawing area tU (frame area 1i1) determined by the beam deflection area. Drawing pattern data related to integrated circuits is generated and stored in a storage medium by dividing the drawing pattern into drawing unit figures to make the drawing pattern data acceptable to the electron beam drawing apparatus. Then, the drawing pattern data is read out for each frame area and temporarily stored in a pattern data buffer, and while decoding this data, the beam deflection means controls the beam position and beam shape to perform drawing processing of a desired pattern. .

However, this type of method has the following problems. That is, when generating drawing pattern data (frame information) for each frame area, the data is generated by setting the frame area to be the largest area that can be deflected by the beam deflection means. Then, the frame information cannot be stored in the pattern data buffer, rendering it impossible to draw, and it is necessary to reduce the unit drawing area and generate data again. Further, when the data is regenerated in the above step and subjected to drawing processing, the frame area is set to be uselessly small even for areas with a sparse pattern density, which results in an increase in drawing time.

As a result of the above, there have been problems such as lowering the operation rate of the electron beam lithography apparatus and lowering the productivity of LSI. In addition, the above-mentioned problems can be solved by the rapid progress of simulated SI, which has resulted in finer patterns and improved integration, which has led to improvements in the reliability of LSI patterns drawn with the electron beam lithography equipment and to the availability of the equipment. This will be a big problem in increasing.

(Problems to be Solved by the Invention) Conventionally, when the four frame areas are set to be large, pattern data cannot be stored in the data buffer section in areas with high pattern density, resulting in the inability to draw. Conversely, if you set the frame area small, the drawing time will increase.
<As a result, there was a problem that the throughput decreased. Further, the above-mentioned problem is not limited to the electron beam drawing method, but also applies to an ion beam drawing method in which a desired pattern is drawn on a sample using an ion beam.

The present invention has been made in consideration of the above-mentioned circumstances, and its purpose is to be able to set the frame area appropriately without overflowing the data buffer section or increasing the number of frame divisions. An object of the present invention is to provide a charged beam drawing method that can improve drawing speed and throughput.

[Structure of the Invention] (Means for Solving the Problems) The gist of the present invention is to adjust the size of the frame area according to the data storage size of a data buffer section that temporarily stores drawing pattern data related to the frame area. The purpose is to set and generate data, construct chip data of an integrated circuit as a collection of the pattern data, and use it for drawing processing.

That is, in the present invention, chip data of an integrated circuit is stored in a storage medium, and pattern data of a frame area obtained by dividing the chip area of the integrated circuit into predetermined widths is read from the storage medium and temporarily stored in a data buffer section. The pattern data stored in the data buffer section is read out and decoded by the data analysis section to obtain beam deflection information, and a desired pattern is formed on the sample by irradiating the charged beam onto the sample according to this beam deflection information. In a charged beam drawing method for drawing, when generating frame information, which is drawing pattern data in units of frames, from design pattern data of the integrated circuit, the frame information is smaller than the maximum deflection width of the beam and can be stored in the second data buffer. In this method, a frame area is determined so that frame information is maximized, and the chip data is configured as a collection of the frame information.

(Function) With the above method, when performing IFJ image processing based on chip data stored in a storage medium, the data buffer section temporarily stores frame information, which is pattern data in units of 7 frames, from the storage medium. By setting the size of the frame area according to the buffer size of the frame area and generating data, pattern data related to the frame area cannot be stored in the data buffer section, and the process of regenerating data is unnecessary. Become. Furthermore, the time required for the drawing 11i process can be shortened by making the most effective use of the memory 8 of the data buffer section. As a result, it becomes possible to increase the operating rate of the charged beam lithography apparatus and to improve the productivity of LSI. Furthermore, the above-described drawing method is expected to be more effective in increasing the RAM and integration density of patterns accompanying the rapid advancement of LSI in the future.

(Example) Hereinafter, the details of the present invention will be explained with reference to an actual flow example shown in the drawings.

FIG. 1 is a schematic diagram showing the structure of an electron beam lithography system used in an exemplary method of the present invention. 10 in the figure is a sample! The sample 10 houses a table 12 on which a sample 11 such as a semiconductor wafer is mounted. table 12
is driven by a table drive circuit 13 in the X direction (left and right directions on the VA plane and in the Y direction (front and back directions on the paper).The movement position of the table 12 is measured by a position circuit 14 using a laser length meter or the like. It has become something that

An electron beam optical system is arranged above the sample chamber 10. This optical system unit includes an electron gun 21°, various lenses 22~
26. Blanking deflector 31, beam dimension variable deflector 32. Main deflector 33 for beam scanning. It is composed of a beam scanning ff'l (!ii deflector 34, a beam shaping aperture 35, 36, etc.), and is positioned at a predetermined sub-deflector l11 (subfield) by the main deflector 33, and The figure drawing position within the subfield is determined by the device 34, and the beam shape is controlled by the beam dimension variable deflector 32 and the shaping aperture 35, 36, and the unit drawing area is controlled while the table 12 is continuously moved in one direction. Roughly speaking, the table 12 is moved stepwise in a direction perpendicular to the direction of continuous movement, and the above process is repeated to sequentially draw each frame area.

On the other hand, a magnetic disk (storage medium) is used for control calculation t140.
41 is connected, and this disk 41 stores LSI chip data. Chip data read from the magnetic disk 41 is temporarily stored in a pattern memory (data buffer section) 42 for each frame area, which is a unit drawing area. The pattern data for each frame area stored in the data buffer 7 section 42, that is, the frame information consisting of the drawing position, drawing figure data, etc., is analyzed by the pattern data decoder 43 and the drawing decoder 44, which are data analysis sections, and then Ranking circuit 45. Beam shaper driver 46. The signal is sent to a main deflector driver 47 and a sub deflector driver 48 .

That is, the pattern data decoder 43 creates blanking data based on the above data, and sends this data to the blanking circuit 45.

Additionally, desired beam size data is generated and sent to beamformer driver 46. Then, from the beam shaper driver 46 to the optical system 2
A predetermined deflection signal is applied to the beam size variable deflector 32 of No. 0, thereby controlling the size of the electron beam.

Furthermore, the drawing data decoder 43 creates subfield positioning data based on the above data, and sends this data to the main deflector driver 47. Then, a predetermined signal is applied from the main deflector driver 47 to the main deflector 33 of the optical system, whereby the electron beam is deflected and scanned to a designated subfield position. Further, the drawing data decoder 44 generates a control signal for scanning the sub-deflector, and this signal is sent to the sub-deflector driver 48. Then, a predetermined sub-deflection signal is applied from the ivI (Ia deflector driver 48 to the sub-deflector 34), thereby performing drawing for each sub-field.

Next, an electron beam lithography method using the apparatus configured as described above will be explained. FIG. 2 shows the process of generating data for drawing processing.

LSI patterns are designed using a CAD system, and the design pattern data is converted into drawing data by a host machine. Then, this writing data is read out and electron beam writing is performed.

Here, the data designed by the CAD system usually has a polygonal pattern 51. as shown in FIG. 3(a).
52, and has a data system in which overlapping patterns as shown by 53 exist.

In order to make LSI data in this format acceptable to an electron beam lithography system, a post computer is used to convert it into data shown in Figure 3 (
As shown in b), the contouring process of the figure is performed to remove the multiple exposure area of the beam. Subsequently, division into the sub-field regions 54 and 55 as shown in FIG. 3(C) is performed, and unit drawing figures (1) which can be formed by the beam shaping means as shown in FIG. 3(d) and (e) are then performed. Divide into ~■.

As a result, as shown in FIG. 4, the type 61 of figures indicating the figure shape. Beam irradiation m62. Subfield information is generated from drawing figure information consisting of a figure position M63 indicating a beam irradiation position and a figure size 64, and frame information is generated as a collection of this information. Furthermore, LSI chip data is constructed as a collection of frame information, and this chip data is stored on the disk 41. in this case,
The chip region 7o of the LSI shown in FIG. 5(a) is composed of regions 72a and 72b with high pattern density and a region [71] with low pattern density.

The data size of subfield information related to area 72b is large, and the data size of subfield information related to area 71 is small.

Therefore, when collecting the subfield information and constructing the frame information #1, as shown in FIG. Now, the main and sub deflector 33.3
The maximum width that can be deflected by the combination of 4 is the frame width 81a.
, 81q, and as the pattern density becomes denser, the frame information cannot be stored in the pattern memory 42. Therefore, the frame widths 81b to 81f are set to have the maximum data size that can be stored in the pattern memory 42, and the frame information is constructed, and drawing processing is performed using the drawing pattern data generated from the frame information.

This makes it possible to prevent the pattern memory 42 from overflowing, and also to minimize the table step movement time required before and after the frame area drawing process, thereby improving the throughput of the drawing process. can be measured.

Thus, according to the method of this embodiment, the pattern memory 42 is always used at its maximum storage capacity, making it possible to prevent the pattern memory 42 from overflowing and to reduce the number of frame divisions. Therefore, the step shift 111rgf of the table 12 can be minimized, and the drawing throughput can be greatly improved. In addition, the conventional device itself can be used as is, and there are advantages that it can be easily realized by simply changing the frame information creation process.

Note that the present invention is not limited to the embodiments described above, and can be implemented with various modifications without departing from the gist thereof. For example, the device for storing the chip data is not limited to a magnetic disk, but may be a magnetic tape or other storage medium. Furthermore, the configuration of the electron beam lithography apparatus is not limited to the same as that shown in FIG. 1, but can be modified as appropriate. Furthermore, although this embodiment has been described using an electron beam as an example, the beam is not limited to the electron beam, and can be applied to vJffi beams including ion beams. Furthermore, the drawing method may be a two-stage deflection method combining main and sub-deflection, or a single-stage deflection method, and a shot method using a variable shaped beam or a scanning method using a circular beam can also be applied.

[Effects of the Invention] As detailed above, according to the present invention, wasted time in drawing processing is minimized, drawing speed is improved,
It is possible to increase the operating rate of the charged beam drawing device and to improve the productivity of LSI.

[Brief explanation of the drawing]

Figure 1 shows the fruit of the present invention 71! ! FIG. 2 is a schematic diagram showing the process of generating writing pattern data; FIG. 3 is a schematic diagram showing figure division until generating writing pattern data; FIG. 4 is a schematic diagram for explaining the structure of drawing data, and FIG. 5 is a schematic diagram showing how the chip area of the SI is divided into frame areas. DESCRIPTION OF SYMBOLS 10... Sample chamber, 11... Sample, 12... Table, 20-... Electron optical system, 21... Electron gun, 22.
~. 26...lens, 31. ~, 34... Deflector, 35
゜36... Beam shaping aperture, 40... Control computer, 41... Magnetic disk (storage medium), 42...
- Pattern memory (data buffer section), 43... pattern data decoder, 44... drawing data decoder. Applicant's agent Patent attorney Takeshi Suzue No. 1 Agony No. 2

Claims (3)

[Claims] (1) Chip data of an integrated circuit is stored in a storage medium, and pattern data of a frame area obtained by dividing the chip area of the integrated circuit into predetermined widths is read from the storage medium and temporarily stored in a data buffer section; The pattern data stored in the data buffer section is read and decoded by the data analysis section to obtain beam deflection information, and a desired pattern is drawn on the sample by irradiating the charged beam onto the sample according to this beam deflection information. In the charged beam writing method,
When generating frame information, which is the frame-by-frame drawing pattern data, from the design pattern data of the integrated circuit, the frame information is generated such that the frame information is smaller than the maximum deflection width of the beam and the frame information that can be stored in the data buffer section is maximum. A charged beam drawing method characterized in that a region is determined and the chip data is configured as a collection of the frame information. (2) The frame information is configured as a collection of subfield information that has generated drawing pattern data of a subfield area that is positioned by the main deflection means and in which a desired pattern is drawn by the sub deflection means, and is based on the data. Claim 1, characterized in that drawing processing is performed.
Charged beam writing method described in Section 2. (3) A patent characterized in that the sample is placed on a table movable in the X-Y direction, and the beam deflection means is driven to perform drawing processing while the table is continuously moved. A charged beam drawing method according to claim 1.