JPH01243520A - Writing method by charged particle beam - Google Patents

Abstract

PURPOSE:To increase a drawing speed, by finding a time required for drawing of a frame and the optimum table speed based on a total drawing area of a figure contained in the frame, the number of unit drawing areas, etc. CONSTITUTION:In a sample chamber 10, there is a table 12 carrying a sample 11. The table 12 is moved in X and Y directions by a driving circuit 13 and its location is measured by a location circuit 14. By continuous movement of the table 12 with a beam emitted from an electron beam optical system 20, a drawing is processed for a frame. The chip data from a magnetic disk 41 of a control computer 40 is analyzed at data analizing portions 43 and 44, to be sent to a blanking circuit 45, a beam forming device driver 46, a main deflecting system driver 47 and an assistant deflecting system driver 48. The control calculator 40 determines a table movement speed against each frame. By processing a drawing according to the table movement speed, time can be saved remarkably in the drawing process.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention provides a charged beam for drawing patterns of semiconductor integrated circuits such as LSIs on samples such as masks and wafers at high speed and with high precision. The present invention relates to a lithography method, and particularly to a charged beam lithography method that improves lithography throughput by optimizing table movement speed.

(Prior Art) In recent years, LSI patterns have become increasingly finer and more complex, and electron beam lithography devices have been used to form such patterns.

When drawing a desired pattern using this device, CA
Design data created using an LSI pattern design tool such as D cannot be supplied as drawing data to the above-mentioned drawing apparatus in its original format. The reason for this is: (1) Design data is generally expressed in polygons, whereas data provided to an electron beam lithography system is only allowed to have basic shapes such as trapezoids or rectangles.

■If the figures overlap each other, multiple exposure will occur and the drawing accuracy will deteriorate.

■Data to be used for electron beam writing must be divided into unit writing areas that conform to the writing method.

This is due to this.

Therefore, by performing contouring processing on the above design data to remove multiple exposures, and then dividing it into basic shapes such as a rectangle and a trapezoid for each unique region (frame region) determined by the beam deflection region, the electronic Drawing pattern data related to an integrated circuit is generated through the process of converting graphic data acceptable to a beam drawing device and stored in a storage medium such as a magnetic disk.

Then, the drawing pattern data is read out for each frame area and temporarily stored in the pattern data buffer,
While decoding this data and continuously moving the table on which the sample is placed in the X or Y direction, the beam deflector divides it into a collection of drawing unit figures that can be formed, and the beam position is determined based on the results. and controlling the shape of the beam to draw a desired pattern within the frame area. Next, the table is moved in steps by the width of the frame area in a direction perpendicular to the continuous movement direction, and the above process is repeated to perform the drawing process on the entire desired area.

In addition, in the two-stage deflection method in which the main deflection means determines the sub-deflection position and the sub-deflection means performs drawing, a frame area is composed of a collection of unit drawing areas (subfields), and the width of the frame area is determined by the main deflection means. It is specified by the deflection width. In this method as well, the drawing pattern data is read out for each frame area, and drawing processing is performed while continuously moving the table.

As mentioned above, in the drawing process, the table movement speed when drawing a frame area is determined by the patterning time (time to draw a desired pattern by controlling the position and shape of the beam) of all drawing unit figures in the frame area. It must be a value that can sufficiently follow the table movement speed mentioned above. The following two methods have been used to determine the table movement speed that satisfies this condition.

(2) When drawing a frame area, set an extremely low table movement speed so that patterning can sufficiently follow the table movement speed, and perform drawing processing at this movement speed over the entire frame area.

■Before patterning a sample such as a mask or wafer, try and find a table movement speed that will not cause patterning errors (errors that occur when the patterning process is unable to follow the table movement speed) for each frame area that makes up the drawing area. The error is found and set using one method, and the drawing process is executed using the table movement speed.

However, this type of method has the following problems. That is, when determining the table movement speed when drawing the frame area, in the method of determining the table movement speed by the method (2) above, The table movement speed must be set to a value that is lower than the table movement speed that allows high frame areas to be drawn without error. Therefore, in frame areas other than the frame area, drawing is performed at a lower table movement speed than necessary, resulting in an extremely large amount of wasted time in the drawing time of the entire LSI chip.

On the other hand, in the method (2), it is possible to perform drawing processing with less waste for each frame area that constitutes an LSI chip, but in order to determine the table speed, the mask or wafer to be drawn is placed on the table. As a pre-treatment for mounting,
It is necessary to repeat trial and error for each frame region to determine a table movement speed that can minimize wasted drawing time. The time spent on the above process in the entire drawing process cannot be ignored, and in some cases, the time required to determine the table movement speed may be longer than the time required for the actual drawing process. could be.

Under these circumstances, in the current drawing process, the drawing time increases, that is, the throughput decreases due to the method of determining the table movement speed for each frame area. and,
As mentioned above, the problem will reduce the operation rate of the electron beam lithography system and cause a decrease in the productivity of LSI.In the future, with the rapid progress of LSI, patterns will become finer and the degree of integration will increase. This poses a major problem in increasing the reliability of the LSI pattern drawn by the beam drawing device and the operating rate of the device.

(Problems to be Solved by the Invention) As described above, conventionally, when drawing is performed at a sufficiently slow table movement speed that does not cause a drawing error, the loss of drawing time is large and the drawing throughput is significantly reduced. On the other hand, in the drawing process in which drawing is performed by finding a table movement speed that minimizes loss during drawing, time is spent in the preprocessing process to determine the table movement speed, which lengthens the entire drawing process. As a result, there was still a problem that the throughput decreased.

Furthermore, the above-mentioned problems are not limited to electron beam lithography methods, but apply to all charged beam lithography methods in which a desired pattern is formed on a sample using a charged beam such as an ion beam.

The present invention has been made in consideration of the above-mentioned circumstances, and its purpose is to adjust the table movement speed of each frame area constituting an LSI chip without performing a preprocessing step of repeating trial and error. It is an object of the present invention to provide a charged beam method in which the optimum table movement speed can be determined for each frame region, thereby optimizing the writing speed and improving throughput.

[Structure of the Invention] (Means for Solving the Problems) The gist of the present invention is to obtain the time required to draw a frame area based on various information obtained from drawing pattern data through simple calculations, and to calculate the optimal time from this time. The purpose is to calculate table movement speed.

That is, the present invention divides the drawing area on the sample into frame areas determined by the deflection width of the main deflection means, and while continuously moving the table on which the sample is placed for each frame area, the main deflection unit directs the charged beam to a predetermined position. In the charged beam drawing method, the unit drawing area is sequentially positioned in a unit drawing area, the unit drawing area is expressed as a collection of drawing unit figures that can be formed by a beam forming means, and the unit drawing area is drawn by a sub-deflection means. The time required to draw the frame area is determined based on the total area of figures included in the frame area and the number of unit drawing areas included in the frame area, and the length of the frame area is divided by this time to calculate the table. This is a method for determining the moving speed of (claim 1).

Further, the present invention provides a time T required for drawing the frame area.
As a means of determining the number of virtual drawing unit figures in the frame area, which is obtained by dividing the total area of figures included in the frame area by the average area of the drawing unit figures, A11 drawing units The beam irradiation time required for a figure is P, the beam setting time required for one drawing unit figure is Q1, the number of unit drawing areas included in the frame area is B, and the time required for beam positioning to one unit drawing area is R. , T=A×(P+Q)+B×R This method calculates the time T using the formula (
In claim 2), the table movement speed when drawing the frame area is set to a value S=L/T, which is obtained by dividing the length L of the frame area by the time T obtained from the equation, for the pattern to be drawn. Variety.

In this method, the speed is reduced by multiplying by a predetermined coefficient determined by considering the number of figures in the layer and frame area (claim 3).

(Function) According to the method of the present invention, by determining the time required to draw a frame area based on the total area of figures included in the frame area, the number of unit drawing areas, etc., trial drawing processing can be performed prior to actual drawing processing. There is no need for pre-processing to find the optimum value of the table movement speed through repeated errors, and a substantially optimum table movement speed can be easily determined for each frame area. As a result, it becomes possible to increase the operating rate of the charged beam lithography apparatus and to improve the productivity of LSI. Furthermore, the above-described drawing method is expected to be more effective in achieving finer patterns and higher integration as LSI advances rapidly in the future.

(Example) Hereinafter, details of the present invention will be explained with reference to illustrated embodiments.

FIG. 1 is a schematic diagram showing the configuration of an electron beam lithography system used in a method according to an embodiment of the present invention. In the figure, reference numeral 10 denotes a sample chamber, and a table 12 on which a sample 11 such as a semiconductor wafer or a glass mask is placed is accommodated in the sample chamber 10. The table 12 is driven by a table drive circuit 13 in the X direction (left and right directions on the paper) and the Y direction (front and back directions on the paper). The moving position of the table 12 is
The position is measured by a position circuit 14 using a laser length meter or the like.

An electron beam optical system 20 is arranged above the sample chamber 10. This optical system 20 includes an electron gun 21 and various lenses 2.
2 to 26, blanking deflector 31, beam dimension variable deflector 32, beam scanning main deflector 33, beam scanning sub-deflector 34, and beam shaping aperture 35.3
It is composed of 6th grade. Then, it is positioned in a predetermined unit drawing area (subfield) by the main deflector 33,
The sub-deflector 34 positions the figure drawing position within the sub-field, and the beam dimension variable deflector 32
The beam shape is controlled by the shaping apertures 35 and 36, and the frame area is drawn while the table 12 is continuously moved in one direction.

Further, the table 12 is moved stepwise in a direction perpendicular to the direction of continuous movement, and the above process is repeated to sequentially draw each frame area.

On the other hand, the control computer 40 has a magnetic disk (recording medium) 4.
1 is connected, and LSI chip data is stored in this disk 41. Chip data read from the magnetic disk 41 is temporarily stored in a pattern memory (data buffer section) 42 for each frame area. The pattern data for each frame area stored in the data buffer unit 42, that is, the frame information consisting of drawing positions, basic figure data, etc., is analyzed by a pattern data decoder 43 and a drawing decoder 44, which are data analysis units, and blanking is performed. Circuit 45. Beam shaper driver 46. Main deflector driver 47 and sub deflector driver 48
sent to.

That is, the pattern data decoder 43 receives the above data and performs inversion processing on the graphic data included in the frame area as necessary to generate inverted pattern data.

Next, the basic figure data defined as frame data is divided into drawing unit figure groups that can be formed by the combination of the forming apertures 35 and 36, and blanking data is created based on this data. It is sent to the ranking circuit 45. Further, desired beam size data is created and this beam size data is sent to the beam shaper driver 46. Next, a predetermined deflection signal is applied from the beam shaper driver 46 to the beam size variable deflector 32 of the optical system 20, thereby controlling the size of the electron beam.

Furthermore, the drawing data decoder 44 creates subfield positioning data based on the frame data, and sends this data to the main deflector driver 47.

Then, a predetermined signal is applied from the main deflector driver 47 to the main deflector 33 of the optical system, whereby the electron beam is deflected and scanned to a designated sub-feed position. moreover,
The drawing data decoder 44 generates a control signal for scanning the sub-deflector, and this signal is sent to the sub-deflector driver 48. Then, a predetermined sub-deflection signal is applied from the sub-deflector driver 48 to the sub-deflector 34, thereby performing drawing for each sub-field.

Next, an electron beam lithography method using the apparatus configured as described above will be explained. FIG. 2 shows the process of generating data for performing the drawing process.

LSI patterns are designed and created using a CAD system, and the design pattern data is converted into drawing data by a host computer. Then, this writing data is read out and electron beam writing is performed.

Here, the data created by the CAD system is usually a graphic data system in which the pattern is composed of a group of polygonal figures, and patterns are allowed to overlap each other. In order to make this type of LSI pattern data into a data system that can be accepted by an electron beam lithography system, the host computer performs contouring processing on the figure, removes the beam multiple exposure area, and then performs the process shown in Fig. 3 ( As shown in a),
The chip area is divided into frame areas 53a to 53d, which are unit drawing areas in which the beam can be deflected, and a subfield area 54. FIG. 3(b) shows drawn figures in the subfield region 54, which are made into polygons 51 and 52 by removing the beam multiple exposure region. Next, this drawn figure is divided into a basic figure group 56 consisting of rectangles and trapezoids as shown in FIG. 3(c).

The graphic data obtained through such a data generation process is expressed using a graphic shape flag, a graphic position, and a graphic size, and is defined as a graphic data group for each subfield area and frame area. The total area of included drawing figures, the number of figures, and the number of subfields are written and stored in the magnetic disk 41.

Note that the total area of the drawn figure is a value obtained by calculating the drawing area for each subfield area in the process of dividing the polygonal figure into basic figure groups, and then summing the value for the frame area. It is.

The drawing pattern data created through such a data generation process is then stored on the magnetic disk 41 for each frame area.
When reading data from and writing, the chip area of the LSI contains regions with a low pattern density and regions with a high pattern density, which continuously change and coexist. Therefore, the time required for patterning differs for each frame area that makes up the chip area, and it is therefore desirable to optimize the table movement speed during patterning, which is set for each frame area, from the perspective of improving throughput. It will be done.

Therefore, as shown in FIG. 3(c), which is divided into the frame area and subfield area as described above, the basic figure data is read out for each frame area, and the total drawing area of the figure described in the header part of the frame data is The control computer 40
Recognize by. This total drawing area is divided by the average beam dimension value of the drawing unit figures that can be formed by the beam shaper driver 47 to approximately estimate the number A of drawing unit figures included in the frame area. Furthermore, the number of drawing unit figures A
is multiplied by the sum of the beam setting time Q and the beam irradiation time P for each drawing unit figure to calculate the patterning time for all drawing unit figures in the frame area. Also,
The total time required for subfield positioning is calculated by multiplying the number of subfields B by the positioning setting time R for each subfield area. Then, from the added value of these times, the time T required to perform the drawing process on the target frame area is calculated. Then, by dividing the length of the frame area in the table continuous movement direction by this time T, a provisional table movement speed S' is determined.

However, the moving speed S' is a value derived on the assumption that the pattern distribution in the frame area is uniform,
In reality, the pattern distribution within the frame area is such that sparse and dense portions of the pattern continuously change depending on the type and layer of the LSI to be drawn. Therefore, the table moving speed S used in the actual drawing process is decelerated by a predetermined deceleration coefficient in consideration of this situation.

Specifically, as shown in FIG. 4, even if the total drawing area of the figures included in the frame area is the same, the number of drawing unit figures 57 to be drawn differs due to the difference in the number of basic figures. The number of basic figures per area is calculated, and the first deceleration coefficient α1 is determined according to the calculated value. In FIG. 4, the basic figure is a rectangle, and the subfield area 54 is defined only where the pattern exists. On the left side of the figure, the basic figure is divided into four subfield areas and drawn by filling the subfield areas.

Similarly, on the right side of the figure, each basic figure corresponds to one subfield area, and each basic figure is drawn by filling the subfield. Next, the second deceleration coefficient α2, which is empirically determined from the type of LSI to be drawn (memory device, random logic, ASIC, etc.) and layer (SDG layer, wiring layer, contact layer, etc.), is shown in Figure 7. As shown (read from the table), the deceleration coefficient α is determined based on α1 and α2, and the final table movement speed S is determined by multiplying the previously mentioned table movement speed S° by the deceleration coefficient α.

S' The optimal value for table movement speed also changes depending on whether the Therefore, in this case, it is sufficient to determine the deceleration coefficient α1 according to the layout of the basic figures, and further determine α2 in the same manner as described above to determine the final table movement speed. In FIG. 5, only the subfield areas indicated by hatching are drawn, and one subfield area 54
The figures included in the subfield area 54 are a set of a plurality of basic figures as shown in FIG. 3(c), and the same figure is drawn in each subfield area 54.

Further, when the figure shown in FIG. 3(C) is inverted by the pattern data decoder 43 and subjected to drawing processing in the basic figure system as shown in FIG. 6, the area of the frame area to be drawn is calculated, The total area β2 of the drawn figure for the inverted pattern is derived by subtracting the total area β2 of the figure before being inverted, which is written in the frame header, from this d value. Furthermore, the number of subfields in the inversion pattern is derived based on the ratio of β1 and β2 and the number of subfields included in the frame area described in the frame header section, and the same processing as described above is performed from the above two numbers. Through the process, a substantially optimal table movement speed for each frame area is determined.

Note that if multiple types of LSI chips are arranged in a mixed manner in one frame area, the table movement speed is determined by performing the above processing on each LSI chip, and the table movement speed that is the lowest among them is selected. Let's select the speed.

Through the processing steps described above, by determining the table movement speed for each frame area and performing the drawing process using that table movement speed, wasted time in the drawing process can be significantly suppressed, and as a result, the drawing process Throughput can be improved.

Thus, according to the method of this embodiment, it is possible to eliminate the need for a preprocessing step of searching for the optimum table movement speed that involves driving the table, which is performed prior to the actual drawing process, and significantly reduces wasted time in a series of drawing steps. As a result, we were able to significantly improve the drawing throughput. Also,
The conventional device itself can be used as is, and it can be easily implemented by simply changing the frame data creation process and adding a process to calculate the table movement speed during patterning as pre-processing for frame drawing. There are advantages such as that it can be realized.

Note that the present invention is not limited to the embodiments described above. For example, the means for storing the chip data is not limited to a magnetic disk, but other storage media such as a magnetic tape or a semiconductor memory can be used. Furthermore, the configuration of the electron beam lithography apparatus is not limited to the same as that shown in FIG. 1, but can be modified as appropriate. In addition, although the explanation was given using an electron beam as an example, the application is not limited to electron beams (it is applicable to charged beams including ion beams, and the writing method is also two-stage, combining main and sub-deflection). In addition to the deflection method, a single-stage deflection method or a three-stage or more-stage deflection method may be used, and a shot method using a variable shaped beam or an apparatus method using an elliptical beam can also be applied. The graphic system of the accumulated drawing data can be applied not only to basic figures but also to drawing unit figures and polygonal figures, and the pattern inversion process can also be performed as pre-processing before being stored on the magnetic disk 41 in addition to being performed by the pattern data decoder 43. In addition, various modifications can be made without departing from the gist of the present invention.

[Effects of the Invention] As described in detail above, according to the present invention, the time required to draw a frame area and the optimal table movement are determined based on the total drawing area of figures included in the frame area, the number of unit drawing areas, etc. By determining the speed, it is possible to significantly reduce wasted time in the writing process, improve the writing speed and increase the operating rate of the charged beam writing system, and as a result, the L
It can contribute to improving the productivity of SI.

[Brief explanation of the drawing]

Fig. 1 is a schematic diagram showing the configuration of an electron beam lithography system used in a method according to an embodiment of the present invention, Fig. 2 is a schematic diagram showing the process of generating drawing pattern data, and Fig. 3 is a schematic diagram showing the process of generating drawing pattern data. A schematic diagram showing figure division and area division of
FIG. 4 is a schematic diagram showing differences in drawing unit figures due to differences in basic figures, FIG. 5 is a schematic diagram showing dense and dispersed states of subfields to be drawn, and FIG. 6 is a schematic diagram showing an inverted pattern. FIG. 7 is a schematic diagram showing a coefficient table in which the deceleration coefficient α2 is registered. DESCRIPTION OF SYMBOLS 10... Sample chamber, 11... Sample, 12... Table, 20... Electron optical system, 21... Electron gun, 22-
26... Lens, 31-34... Deflector, 35.3
6... Beam forming aperture, 40... Control computer, 41... Magnetic disk (recording medium), 42... Pattern memory (data buffer section), 43... Pattern data decoder, 44... Drawing data decoder, 5
1.52...Polygon, 53.53a-53d...Frame area, 54...Subfield (unit drawing area), 56...Basic figure group, 57...Drawing unit figure. Applicant's agent Patent attorney Takehiko Suzue Figure 1 Figure 3 Figure 5

Claims (3)

[Claims] (1) Divide the drawing area on the sample into frame areas determined by the deflection width of the main deflection means, and while continuously moving the table on which the sample is placed for each frame area, the main deflection unit directs the charged beam into predetermined units. In a charged beam drawing method, the unit drawing area is expressed as a collection of drawing unit figures that can be sequentially positioned in the drawing area and formed by a beam shaping means, and the unit drawing area is drawn by a sub-deflection means, comprising: The time required to draw the frame area is calculated based on the total area of the figure to be drawn and the number of unit drawing areas included in the frame area, and the length of the frame area is divided by this time to move the table. A charged beam writing method characterized by determining the speed. (2) The time T required for drawing the frame area is calculated by dividing the total area of the figures included in the frame area by the average area of the drawing unit figure. The number of drawing unit figures is A, and the beam irradiation time required for one drawing unit figure is P.
, the beam setting time required for one drawing unit figure is Q, the number of unit drawing areas included in the frame area is B, the time required for beam positioning to one unit drawing area is R, and T=A×(P+Q 2. The charged beam drawing method according to claim 1, wherein the time T is calculated using the formula: )+B×R. (3) The table movement speed when drawing the frame area is calculated by dividing the length L of the frame area by the time T obtained from the above formula, S=L/T, and the type and layer of the pattern to be drawn. 3. The charged beam drawing method according to claim 2, wherein the speed is multiplied by a predetermined coefficient determined in consideration of the number of figures in the frame area.