JPH03145731A - Manufacture of semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To improve the step coverage without inducing a shortcircuit etc., in a metallic wiring layer by a method wherein a silicon nitride film and a silicone oxide film on the surface of an insulating film are selectively removed to make contact holes down to lower wiring layers; next, tungsten layers are formed on the whole surface; and after removing the tungsten layers in the other regions leaving the tungsten layers inside the contact holes, the silicon oxide film on the surface is removed. CONSTITUTION:A silicon nitride film 6 is formed on the surface of an insulating film 5 and then a silicon oxide film 7 is formed on the surface of the film 6. Next, the insulating film 5, the silicon nitride film 6 and the silicon oxide film 7 are selectively removed to make contact holes 8 down to the lower wiring layers of a diffused layer 2 and a polycrystal silicon layer 4. Next, a tungsten silicide layer 13 is formed on the whole surface and then a CVD tungsten layer 9 is further formed on the layer 13. Next, the CVD tungsten layer 9 in the other regions is removed leaving the tungsten layers 10 comprising the tungsten silicide layer 13 and the CVD tungsten layer 9 inside the contact holes 8. Finally, the silicon oxide film 7 is removed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor integrated circuit.

[Conventional technology]

In recent years, the degree of integration of semiconductor integrated circuits has increased, and the dimensions of semiconductor elements have also tended to become smaller and smaller. One of the problems that arises when manufacturing highly integrated semiconductor integrated circuits is step coverage when forming a metal wiring layer (usually aluminum alloy) in the minute contact holes of the semiconductor elements that make up the semiconductor integrated circuit. The problem was that it got extremely bad.

As a method to solve this problem, a method of manufacturing a semiconductor integrated circuit has been proposed in which a tungsten layer with good step coverage is formed inside a contact hole of a semiconductor element by a CVD method.

2(a), 2(b), and 2(d) are cross-sectional views showing the manufacturing process of a conventional semiconductor integrated circuit.
As shown in a), on the surface of the silicon substrate 1, there is a diffusion layer 2, which is a lower wiring layer. A polycrystalline silicon layer 4 and an element isolation oxide film 3 are formed. An insulating film 5 is formed on the surfaces of this element isolation oxide film 3 and polycrystalline silicon layer 4. Next, as shown in FIG. 2(b), the element isolation oxide film 3 and the insulating film 5 are selectively removed to form a contact hole 8. Next, as shown in Figure 2(c), CVD is applied to the entire surface.
A CVD tungsten layer 9 is formed by a method. Next, as shown in FIG. 2(d), the CVD tungsten layer 9 is etched by dry etching, leaving the tungsten layer 14 inside the contact hole 8 and CVD etching other areas.
Tungsten layer 9 is removed. Finally, a metal wiring layer (not shown) is formed on the tungsten layer 14 inside the contact hole 8.

In the semiconductor integrated circuit formed by this method, the step coverage of the CVD tungsten layer 9 (tungsten N14) left inside the contact hole 8 is extremely excellent, so an aluminum film formed by the sputtering method with poor step coverage is used. Even if this tungsten layer 14 is formed as a metal wiring layer, disconnection of the metal wiring layer at the contact hole 8 can be prevented.

[Problems to be Solved by the Invention] However, in such a method, as shown in FIG. When the CVD tungsten layer 9 in other areas is removed leaving the tungsten layer 14, the tungsten layer 11 remains on the stepped portion of the surface of the insulating film 5.In this way, the tungsten layer 11 remains and a metal wiring layer is formed on the surface. When a metal wiring layer is formed, there is a problem in that this metal wiring layer has an extremely high possibility of causing a short circuit.

SUMMARY OF THE INVENTION In view of the above-mentioned problems, an object of the present invention is to provide a method for manufacturing a semiconductor integrated circuit that can improve step coverage without causing short circuits in metal wiring layers.

[Means to solve the problem]

A method of manufacturing a semiconductor integrated circuit according to the present invention includes a step of forming a silicon nitride film on the surface of an insulating film formed to cover a lower wiring layer, and a step of forming a silicon oxide film on the surface of the silicon nitride film. , a step of selectively removing the insulating film, the silicon nitride film and the silicon oxide film to form a contact hole up to the lower wiring layer; a step of forming a tungsten layer on the entire surface; a step of removing the tungsten layer in other regions leaving the internal tungsten layer; and a step of removing the silicon oxide film;
The method includes a step of forming a metal wiring layer on the tungsten layer inside the contact hole.

[Function] According to the method for manufacturing a semiconductor integrated circuit of the present invention, a silicon nitride film and a silicon oxide film are formed on the surface of an insulating film formed to cover a lower wiring layer, and these are selectively removed. Then, a tungsten layer is formed on the entire surface, leaving the tungsten layer inside the contact hole and removing the tungsten layer in other areas, and then removing the silicon oxide film on the surface. Therefore, the tungsten layer remaining on the surface of the silicon oxide film can be completely removed.

〔Example〕

An embodiment of this invention is shown in FIGS. 1(a), (b), (C
), (el(d), (f)).

Figure 1 (a), (b), (C), (d), (e
) and (f) are cross-sectional views showing the manufacturing process of a semiconductor integrated circuit according to an embodiment of the present invention. As shown in FIG. 1(a), on the surface of a silicon substrate 1, a diffusion layer 2. A polycrystalline silicon layer 4 and an element isolation oxide film 3 are formed. This element isolation oxide film 3. An insulating film 5 is formed on the surface of the polycrystalline silicon layer 4. A silicon nitride film 6 is formed on the surface of this insulating film 5, and a silicon oxide film 7 is further formed on the surface of this silicon nitride film 6.

In this example, the insulating film 5 is a PSG (phosphosilicate glass) film with a thickness of 500 nm and a phosphorus concentration of 8 wt% formed by the CVD method, and the silicon nitride film 6 is a LP film with a thickness of 40 nm.
CVD silicon nitride film, silicon oxide film 7 has a thickness of 11
00n, a PSG film made by CVD with a phosphorus concentration of 8 wt%.

Next, as shown in FIG. 1(b), the insulating film 5, silicon nitride film 6, and silicon oxide film 7 are formed by photolithography.
'A contact hole 8 is formed down to the wiring layer below the diffusion layer 2 and the polycrystalline silicon layer 4 by selectively removing it by a lie etching method.

Next, as shown in FIG. 1C, a tungsten silicide layer 13 is formed on the entire surface by sputtering, and a CVD tungsten layer 9 is further formed on the surface of this tungsten silicide layer 13 by CVD.

The tungsten silicide layer 13 of this embodiment is a sputter-grown film with a thickness of 50 nm, and the CVD tungsten layer 9 has a thickness of 11000 nm and is formed by reducing WF6 with SiH4 (monosilane)/H2 system. Furthermore, the tungsten silicide layer 13 is formed to improve the adhesion between the CVD tungsten layer 9, the diffusion layer 2, and the polycrystalline silicon layer 4.

Next, as shown in FIG. 1(d), the tungsten silicide layer 13 and the CVD tungsten layer 9 are etched back by dry etching to remove the tungsten silicide layer 13 and the CVD tungsten layer 9 inside the contact hole. C in other areas except layer 10
VD tungsten layer 9 is removed. At this time, the tungsten layer 11 often remains in the stepped portion of the surface of the silicon oxide film 7.

Note that in the other regions of this embodiment, the tungsten silicide layer 13 and the CVD tungsten layer 9 are dry-etched using a gas containing SF as the main component, and the etching amount is approximately 11,000 nm thick. be.

Next, as shown in FIG. 1(e), by removing the silicon oxide film 7, the tungsten layer 11 remaining on the stepped portion of the surface of the silicon oxide film 7 is also removed.

Note that the silicon oxide film 7 in this example is made of HF/NH4F.
Wet etching is performed using an etching solution. In this case, the underlying silicon nitride film 6 is HF/NH
The 4F-based etching solution hardly causes etching, and acts as a so-called stopper layer to prevent the etching of the silicon oxide film 7 from reaching the underlying insulating film 5.

Furthermore, by adding a large amount of phosphorus to the silicon oxide film 7 and performing wet etching, the silicon oxide film 7 can be etched.
By increasing the wet etching speed, it is possible to minimize the scraping of the insulating film 5 on the side wall of the contact hole 8 when removing the silicon oxide film 7, and the shape of the contact hole 8 can be improved by wet etching. can be prevented from being damaged.

Next, as shown in FIG. 1(f), a metal wiring layer 12 is formed on the tungsten layer 10 inside the contact hole 8.

The metal wiring layer I2 of this embodiment is formed by processing a sputter-grown aluminum film by photography/dry etching.

The semiconductor integrated circuit manufactured by this method has extremely good step coverage with the metal wiring layer 12 formed on the tungsten layer 10 left in the contact hole 8, and is free from problems such as short circuits in conventional metal wiring. The remaining tungsten layer 11, which was the cause, can be completely removed.

〔Effect of the invention〕

According to the method for manufacturing a semiconductor integrated circuit of the present invention, a silicon oxide film and a silicon nitride film are formed on the surface of an insulating film formed to cover a lower wiring layer, and these are selectively removed to form a lower wiring layer. After forming a tungsten layer on the entire surface, leaving the tungsten layer inside the contact hole and removing the tungsten layer in other areas, the silicon oxide film on the surface is removed. The tungsten' layer remaining on the surface of the oxide film can be completely removed. As a result, the step coverage of the metal wiring inside the contact 1 to the hole can be improved without causing a short circuit in the metal wiring layer due to the remaining tungsten layer as in the conventional case.

[Brief explanation of the drawing]

Figure 1 (ah (b), (c), (d), (e)
, (f) is a cross-sectional view showing the manufacturing process of a semiconductor integrated circuit according to an embodiment of the present invention, and FIGS. 2(a), (b), (C
1 and (d) are cross-sectional views showing the manufacturing process of a conventional semiconductor integrated circuit. 5... Insulating film, 6... Silicon nitride film, 7... Silicon oxide film, 8... Contact hole, 10... Tungsten layer, 12... Metal wiring layer NC

Claims (1)

[Claims] forming a silicon nitride film on the surface of the insulating film formed to cover the lower wiring layer; forming a silicon oxide film on the surface of the silicon nitride film; and forming the insulating film, the silicon nitride film, and the silicon A step of selectively removing the oxide film to form a contact hole up to the lower wiring layer, a step of forming a tungsten layer on the entire surface, and a step of leaving the tungsten layer inside the contact hole and removing the tungsten layer in other areas. A method for manufacturing a semiconductor integrated circuit, comprising the steps of removing the silicon oxide film, removing the silicon oxide film, and forming a metal wiring layer on the tungsten layer inside the contact hole.