JP2002222812A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve production yield by preventing the wiring used for a peripheral circuit from peeling due to a liquid pressure at the time of a resist peeling processing by increasing the adhesion. SOLUTION: This semiconductor device is provided with a metal-base wiring (wiring 21 used for the peripheral circuit and bit wire 31) formed on a silicon oxide base insulation film (insulation film 12) formed by a film formation technique utilizing plasmas. The metal base wiring (wiring 21 used for the peripheral circuit) is provided with parts 23 where the wiring is thickened at prescribed intervals regardless of the positions of contacts.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly, to a semiconductor device having a metal-based wiring formed on a silicon-based insulating film.

[0002]

[Prior art]

In a DRAM (dynamic random access memory), a bit line may be used as a wiring around a cell. As shown in FIG.
An insulating film 111 is formed thereon. This insulating film 111
Is formed of, for example, a silicon oxide film, a silicon nitride film, a boron phosphorus silicate glass (BPSG) film, and a silicon oxide film formed by a film forming technique using plasma from the lower layer. On the insulating film 111, a wiring 121 used for a peripheral circuit and a bit line 131 are formed. Note that the sectional view shows only the bit line 131.

The bit line 131 is composed of a titanium film having a thickness of, for example, 20 nm, an adhesion layer 141 made of a titanium nitride film having a thickness of, for example, 20 nm, and a tungsten film 143 having a thickness of, for example, 100 nm. A silicon nitride oxide film (not shown) having a thickness of, for example, 80 nm is further formed on the upper layer. Also,
The wiring 121 used for the peripheral circuit also has the same wiring layer structure as the bit line 131.

[0005] Of the wirings 121 used in the peripheral circuit,
The portion 121C where the contact C connected to the upper electrode (not shown) is formed is formed thicker than the wiring portion,
Other wiring portions are formed to have a constant width.

The bit line 131 is connected to a plug (polysilicon plug or amorphous silicon plug) 135 having a silicide layer 133 formed at the interface thereof.
It is connected to the silicon substrate 101 by plugs 135 formed at m intervals. Thus, the plug 135
, The bit lines 131 are hardly peeled off.

The method of forming the bit line 131 and the wiring 121 used for the peripheral circuit is as follows. First, a titanium film having a thickness of, for example, 20 nm is formed on the insulating film 111 by sputtering, and then, in a nitrogen atmosphere at 700 ° C. RTA (Rapid Thermal Annealing) processing is performed for 30 seconds. Thereafter, chemical vapor deposition (hereinafter referred to as CVD)
A titanium nitride film having a thickness of, for example, 20 nm is formed by a mical vapor deposition (abbreviation) method, and RTA processing is performed in a nitrogen atmosphere at 700 ° C. for 30 seconds. Then, C
A tungsten film 143 having a thickness of, for example, 100 nm is formed by a VD method, and a silicon nitride oxide film (not shown) having a thickness of, for example, 80 nm serving as an antireflection film is formed to form a wiring. Is formed.

After that, the wiring forming layer is processed by lithography and etching to obtain, for example, 0.13
Wiring 121 and bit line 131 used for a peripheral circuit of μm width
To form Next, the resist film used as a mask is removed by etching. This resist stripping process is performed by, for example, ACT935 processing for 12 minutes, rinsing with isopropyl alcohol, and D1 rinsing with nitrogen gas splash. Alternatively, it is performed by oxygen plasma treatment. As an example of the oxygen plasma processing conditions,
Oxygen is supplied at 12 dm ³ / min, the pressure of the processing atmosphere is 4 kPa, the RF power is 700 W, and the substrate temperature is 250
C. and the processing time is set to 90 seconds.

[0009]

However, as shown in the plan view of FIG. 3, when the resist stripping process is performed,
The wiring 121 used for the peripheral circuit formed over the insulating film 111 is peeled off by the liquid pressure at the time of the separation treatment. The problem of peeling occurs irrespective of the type of liquid used for the peeling treatment. In particular, a certain length (for example, 0.3 μm) of a portion 121C where a wiring for forming a contact is thickened is provided.
In the case of a wiring having a width of m, the wiring is not disposed over a length of 70 μm or more, and the wiring in which the thickened portion 121C for forming a contact at the wiring end is not formed is likely to peel off. Actually, in the structure of the wiring 121 used for the peripheral circuit having a long portion where a contact is not formed, the end portion of the wiring has the same line width as the wiring portion and is at least 0.32 μm in width and 76 μm in length. Had occurred.

That is, peeling is likely to occur due to poor adhesion to the underlying silicon oxide. In particular,
Underlying low adhesion to the wiring in the case of so-called plasma silicon oxide (P-SiO ₂₎ film formed by the film forming technique using plasma. Then, there is a problem that a circuit cannot be formed due to the peeling, and a short circuit is caused when the peeled wiring adheres to the wafer, thereby causing a decrease in yield. In addition, a portion 121C in which a wiring for forming a contact is thickened is formed at a fixed interval, and a portion 121C in which a wiring for forming a contact is formed near a wiring end.
No peeling has occurred in the wiring 123 in which is formed.

[0011]

SUMMARY OF THE INVENTION The present invention is a semiconductor device for solving the above-mentioned problems.

A semiconductor device according to the present invention is a semiconductor device having a metal-based wiring formed on a silicon oxide-based insulating film formed by a film-forming technique utilizing plasma.
The metal-based wiring has a portion that is thickened at a predetermined interval regardless of the position of the contact.

In the above semiconductor device, the contact area between the thickened metal wiring and the underlying silicon oxide insulating film is increased, so that the adhesion between the metal wiring and the silicon oxide insulating film is improved. . Therefore, even if a force for peeling the metal-based wiring is applied to itself, the metal-based wiring is less likely to peel.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of a semiconductor device according to the present invention will be described with reference to FIG. 1 (1) a plan view of a metal wiring and (2) a schematic sectional view of a bit line. FIG. 1 shows an example of the configuration of bit lines of a DRAM and wiring used for peripheral circuits as an example.

As shown in FIG. 1, an insulating film 12 is formed on a substrate (for example, a semiconductor substrate) 11. At least the uppermost layer of the insulating film 12 is, for example, plasma CVD.
Consisting the formed silicon oxide (P-SiO ₂₎ film by law. On the insulating film 12, metal wirings (wirings 21 and bit lines 31 used for peripheral circuits) are formed in a plurality of columns. This metal-based wiring is, for example, 20 nm thicker than the lower layer.
Layer 41 formed of a titanium film having a thickness of 20 nm and a titanium nitride film having a thickness of 20 nm, and 100
and a tungsten layer having a thickness of nm.
Although not shown, a silicon nitride oxide film is formed on the main wiring layer 43 as an anti-reflection film (not shown), for example, 80 nm.
It is formed to a thickness of nm.

A connection hole 13 is formed in the insulating film 12 between the bit line 31 and the substrate 11 to connect the two. The substrate 11 and the bit line 31 are formed inside the connection hole 13. A contact 14 to be connected is formed.
The contact 14 includes a plug 15 formed inside the connection hole 13 and made of, for example, polysilicon, and the plug 1.
5 and a titanium silicide layer 16 formed at an interface between the titanium film and the upper portion.

On the other hand, the wiring 21 used for the peripheral circuit is formed with a thickened portion 23 at a predetermined interval.
Note that the wiring 21 used for the peripheral circuit has no contact with the lower layer. The thickened portion 23 is, for example, a value obtained by dividing the area A obtained by adding the area A1 of the thickened portion of the wiring and the areas A2 and A3 of the thickened portion of the wiring by the area A1 of the thickened portion of the wiring. Is 1.5 or more and 3.0 or less. That is, 1.5 ≦ A
/A1=(A1+A2+A3)/A1≦3.0. When A / A1 <1.5, it is not possible to sufficiently eliminate the ease of peeling. 3.0 <A / A1
In the case of (1), the distance between the adjacent wirings becomes too large, which hinders high integration.

Note that the wiring 21 used in the peripheral circuit and the wiring used in the peripheral circuit can be secured depending on the degree of adhesion between the wiring 21 used in the peripheral circuit and the underlying insulating film 12 so that the wiring 21 used in the peripheral circuit can maintain the adhesion without peeling. The arrangement interval of the thickened portion of the wiring and the areas A2 and A3 thereof are appropriately determined by the force applied to the wiring 21. For example, 0.32
In the case of a wiring having a width of μm, rectangular thickened portions 23 are formed at intervals of, for example, 95.12 μm, and the width thereof is, for example, 0.58.
μm. It has been confirmed that the wiring thus formed does not peel off even after the cleaning step.

It is to be noted that the thickened portion 23 of the wiring may have a part that coincides with the contact position with the upper conductive layer (not shown) and the contact position with the lower conductive layer (eg, substrate 11). There is no. Further, the shape of the thickened portion 23 of the wiring 21 used in the peripheral circuit may be rectangular as shown in FIG. 1 or, although not shown, a trapezoid, a triangle, a semi-ellipse, a half It may be circular, arcuate, or the like. Further, when there are a plurality of thickened portions 23 of the wiring, it is not necessary to make the shapes and areas of the thickened portions 23 of the respective wirings uniform.
As long as the area is within the range of 5 ≦ A / A1 ≦ 3.0, the shape described above can be used.

In the above-described semiconductor device, the wiring 21 used for the peripheral circuit has a predetermined contact irrespective of the position of the contact, ie, irrespective of the position of the contact, where the contact for connecting the upper electrode and the wiring drops and is thicker than the wiring portion. Since the wirings have the thickened portions 23 at intervals, the contact area with the base is increased, so that the adhesion is improved. Therefore, even in a cleaning step, for example, even if a force for peeling is applied to the wiring 21 used for the peripheral circuit by a cleaning liquid, a rinsing liquid, or the like, the wiring 23 used for the peripheral circuit is not peeled.

[0021]

As described above, according to the wiring apparatus of the present invention, the adhesion between the metal-based wiring and the silicon oxide-based insulating film formed by the film-forming technique using the underlying plasma is ensured. For this reason, among metal-based wirings, wirings used for peripheral circuits, in which peeling is particularly problematic, are formed thick at predetermined intervals, so that the adhesion between the metal-based wirings and the base is enhanced at that portion. Therefore, for example, even if a force for peeling off the metal-based wiring is applied in the cleaning step, the peeling of the metal-based wiring can be prevented. Therefore, prevention of formation of a circuit due to peeling, prevention of occurrence of a short circuit between wirings due to adhesion of the peeled wirings on the wafer, and the like can be achieved. In addition, since the semiconductor device has such a wiring structure, the semiconductor device can have an improved yield in a manufacturing process.

[Brief description of the drawings]

FIG. 1 is a view showing one embodiment of a semiconductor device of the present invention, in which (1) a plan view of a metal-based wiring and (2) a schematic configuration sectional view of a bit line.

FIG. 2 is a view showing one conventional example of a conventional semiconductor device, in which (1) a plan view of a metal-based wiring and (2) a schematic sectional view of a bit line. It is.

FIG. 3 is an explanatory diagram of a conventional problem.

[Explanation of symbols]

12: insulating film, 21: metal-based wiring (wiring used for peripheral circuit), 23: thicker part of wiring

[Procedure amendment]

[Submission date] March 5, 2001 (2001.3.5)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0003

[Correction method] Change

[Correction contents]

In a DRAM (dynamic random access memory), a bit line may be used as a wiring around a cell. As shown in FIG.
An insulating film 111 is formed thereon. This insulating film 111
Is formed of, for example , a silicon nitride film, a boron phosphorus silicate glass (BPSG) film, and a silicon oxide film formed by a film forming technique using plasma from the lower layer.
On the insulating film 111, a wiring 121 used for a peripheral circuit and a bit line 131 are formed. Note that the sectional view shows only the bit line 131.

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0008

[Correction method] Change

[Correction contents]

Thereafter, the wiring forming layer is processed by lithography and etching to obtain, for example, 0.1 μm. 32
Wiring 121 used for a peripheral circuit having a width of μm, for example, 0.13
A bit line 131 having a width of μm is formed. Next, the resist film used as a mask is removed by etching. This resist stripping process is performed, for example, by performing ACT935 processing on 12
Rinsing with isopropyl alcohol and D1 rinsing with nitrogen gas splash. Alternatively, it is performed by oxygen plasma treatment. As an example of the oxygen plasma processing conditions, oxygen is supplied at 12 dm ³ / min, the pressure of the processing atmosphere is 4 kPa, and the RF power is 70.
0 W, the substrate temperature is set to 250 ° C., and the processing time is set to 90 seconds.

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Claims (2)

[Claims] 1. A semiconductor device having a metal-based wiring formed on a silicon oxide-based insulating film formed by a film-forming technique using plasma, wherein the metal-based wiring is a predetermined type regardless of the position of a contact. A semiconductor device having a portion which is thickened at intervals of. 2. The method according to claim 1, wherein the thickened portion of the metal-based wiring comprises an area obtained by adding an area of the thickened portion of the metal-based wiring to an area of the thickened portion of the metal-based wiring. 2. The semiconductor device according to claim 1, wherein a value obtained by dividing by an area of a portion to be provided is 1.5 or more and 3.0 or less.