JPH031422U - - Google Patents

Info

Publication number
JPH031422U
JPH031422U JP5991989U JP5991989U JPH031422U JP H031422 U JPH031422 U JP H031422U JP 5991989 U JP5991989 U JP 5991989U JP 5991989 U JP5991989 U JP 5991989U JP H031422 U JPH031422 U JP H031422U
Authority
JP
Japan
Prior art keywords
terminals
rows
wiring board
arrangement
printed wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5991989U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5991989U priority Critical patent/JPH031422U/ja
Publication of JPH031422U publication Critical patent/JPH031422U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案によるQFP形ICの端子形状
の一実施の斜視図、第2図は同SOP形ICの端
子形状の一実施例の斜視図、第3図は従来のSO
P形ICの端子形状の斜視図である。 図中、1は接続端子、2は面積を広げた接続端
子、3,4,5はそれぞれIC本体である。
Fig. 1 is a perspective view of an embodiment of the terminal shape of the QFP type IC according to the present invention, Fig. 2 is a perspective view of an embodiment of the terminal shape of the same SOP type IC, and Fig. 3 is a perspective view of an embodiment of the terminal shape of the QFP type IC according to the present invention.
FIG. 2 is a perspective view of a terminal shape of a P-type IC. In the figure, 1 is a connection terminal, 2 is a connection terminal with an expanded area, and 3, 4, and 5 are IC bodies, respectively.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] プリント配線基板に表面実装する複数の接続用
端子を一列若しくは複数列に配列してなる部品に
おいて、各配列の両端の端子を、両端以外の端子
より広い半田付け面積を有する端子により構成し
たことを特徴とする部品の端子形状。
In a component that is surface-mounted on a printed wiring board and has a plurality of connection terminals arranged in one or more rows, the terminals at both ends of each arrangement are configured with terminals having a larger soldering area than the terminals at the other ends. Characteristic terminal shapes of parts.
JP5991989U 1989-05-24 1989-05-24 Pending JPH031422U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5991989U JPH031422U (en) 1989-05-24 1989-05-24

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5991989U JPH031422U (en) 1989-05-24 1989-05-24

Publications (1)

Publication Number Publication Date
JPH031422U true JPH031422U (en) 1991-01-09

Family

ID=31586843

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5991989U Pending JPH031422U (en) 1989-05-24 1989-05-24

Country Status (1)

Country Link
JP (1) JPH031422U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06260582A (en) * 1993-03-09 1994-09-16 Hitachi Ltd Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06260582A (en) * 1993-03-09 1994-09-16 Hitachi Ltd Semiconductor device

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