JPH01177886U - - Google Patents

Info

Publication number
JPH01177886U
JPH01177886U JP7442588U JP7442588U JPH01177886U JP H01177886 U JPH01177886 U JP H01177886U JP 7442588 U JP7442588 U JP 7442588U JP 7442588 U JP7442588 U JP 7442588U JP H01177886 U JPH01177886 U JP H01177886U
Authority
JP
Japan
Prior art keywords
chip mounting
mounting holes
socket
mounting surfaces
connection terminals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7442588U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7442588U priority Critical patent/JPH01177886U/ja
Publication of JPH01177886U publication Critical patent/JPH01177886U/ja
Pending legal-status Critical Current

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  • Connecting Device With Holders (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案のICチツプを取り付けた状態
のICソケツトの斜視図、第2図はICソケツト
の正面図、第3図は他の実施例のICソケツトの
斜視図である。 1…ICソケツト、2,20…多面体ブロツク
、4…配線基板、8…接続端子、10,12,2
2…チツプ取付面、14…ICチツプ搭載穴。
FIG. 1 is a perspective view of an IC socket with an IC chip of the present invention attached thereto, FIG. 2 is a front view of the IC socket, and FIG. 3 is a perspective view of an IC socket of another embodiment. 1... IC socket, 2, 20... Polyhedral block, 4... Wiring board, 8... Connection terminal, 10, 12, 2
2...Chip mounting surface, 14...IC chip mounting hole.

Claims (1)

【実用新案登録請求の範囲】 配線基板に形成された部品取付穴に挿入される
複数の接続端子を有するICソケツトであつて、 少なくとも2つのチツプ取付面を有する多面体
ブロツクを備え、この多面体ブロツクの底面には
前記接続端子が設けられる一方、前記各チツプ取
付面にはICチツプ搭載穴が形成され、かつ、前
記チツプ取付面の内の少なくとも一面に形成され
たICチツプ搭載穴は、前記端子間隔とは異なる
間隔に設定されていることを特徴とするICソケ
ツト。
[Claims for Utility Model Registration] An IC socket having a plurality of connection terminals inserted into component mounting holes formed in a wiring board, comprising a polyhedral block having at least two chip mounting surfaces, The connection terminals are provided on the bottom surface, and IC chip mounting holes are formed in each of the chip mounting surfaces, and the IC chip mounting holes formed in at least one of the chip mounting surfaces are arranged at the terminal spacing. An IC socket characterized in that the intervals are set at different intervals.
JP7442588U 1988-06-03 1988-06-03 Pending JPH01177886U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7442588U JPH01177886U (en) 1988-06-03 1988-06-03

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7442588U JPH01177886U (en) 1988-06-03 1988-06-03

Publications (1)

Publication Number Publication Date
JPH01177886U true JPH01177886U (en) 1989-12-19

Family

ID=31299538

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7442588U Pending JPH01177886U (en) 1988-06-03 1988-06-03

Country Status (1)

Country Link
JP (1) JPH01177886U (en)

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