JPH03141473A - Input/output circuit for picture data rotated at optional angle - Google Patents

Abstract

PURPOSE:To shorten the processing time of the picture data by providing three buffers, a picture element position arithmetic circuit, and a memory pre-read request picture element position arithmetic circuit to use two buffers as the parallel/serial (P/S) converters, transferring the picture data to these two converters alternately from the third buffer, and outputting the picture data after converting them into picture elements. CONSTITUTION:An input circuit is provided with three buffers that can hold the picture data, and two of these three buffers are used as the P/S converters 13 and 14. Then the third input buffer 11 sends the picture data alternately to both converters 13 and 14, and these converters 13 and 14 output the picture element trains alternately. Furthermore a pre-read memory request circuit 103 - 105 are added so as to hold the picture data in at least two of three buffers 11, 13 and 14. Thus the optional angle rotation processing time can be shortened.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an image editing function for binary image data, and in particular, when rotating an image to an arbitrary angle, it is possible to read and write image data into a memory at high speed. This invention relates to an input/output circuit for image data to be processed.

[Conventional technology]

In recent years, with the development and spread of electronic computers, the objects of processing have expanded from character data to image data. Editing processing for image data includes transfer and synthesis of enlarged/reduced two-part images, rotation, and the like. Among these editing processes, image rotation other than in units of 90 degrees requires access to the same image data more times than other editing processes, and the processing speed is slow.

FIG. 2 is an example of image rotation processing. The effect of rotation is a process of tilting an erect image, converting the image shown in FIG. 2(b) to the greasy image shown in FIG. 2(a).

There is a process of converting the image shown in FIG. 2(a) to the image shown in FIG. 2(b), in which a tilted image is erected.

However, both processes differ in the content of the image.

The processing contents are the same. Here, a description will be given of conversion from the image shown in FIG. 4A to the image shown in FIG.

First, from pixel 21 to pixel 22, pixels 1 pixel 21 and pixel 299 are aligned horizontally to the right of pixel 25 after rotation.
Pixel 21o1 pixel 211, etc. are read and transferred from pixel 25 to pixel 26.

Next, pixels 212 to 213 are transferred to the position of pixels 214 to 215. Furthermore, pixel 24 and pixel 2
The pixel rows are transferred downward toward 8, and the pixel 24 to 23 is transferred from the pixel 28 to the position of the pixel 27, thereby rotating the entire image.

By the way, a general memory device for storing one image is a small rectangle shown in FIG. 2, and is constructed with one word data 216 represented as a basic unit. That is, since one word data 216 is a basic unit, the pixels included in it can be read and written at one time.

Therefore, when reading pixel 29, pixels 210 and 211 are also read, but an unnecessary pixel to the right of pixel 211 is also read.

FIG. 3 is a diagram showing pixel positions when the image is rotated by 45 degrees. Similarly to FIG. 2, the data is read and transferred one after another from pixel 31 to pixel 32 and the lower right pixel. By repeating this transfer, in the case of 45 degree rotation, 1 word data 33
must be read four times: reading pixel 34, reading pixel 35, reading pixel 36, and reading pixel 37. For example, when reading pixel 37, black pixels are read from the upper left of pixel 37, and in front of one pixel 37, black pixels are read from the upper left of pixel 37.
This is because since the pixel above 6 is read, the other three pixels cannot be read.

There are various methods of configuring a processing device that rotates an image by an arbitrary angle, but in a typical processing device, the time to process one pixel is shorter than the time to read and write one word of data. For example, when using the Motorola processor MC68020, it takes 7 clocks to read data from memory, but it takes 4 clocks to shift the read data by 1 bit. Also, if you do not use a general-purpose processor and configure it with a dedicated logic circuit, there is no need to read instructions from memory, so the time to process one pixel is even shorter than the time to read and write one word of data. . In particular, by providing a buffer in the input/output circuit with the memory, data reading/writing and pixel processing can be performed simultaneously, and pixel processing, which requires a short processing time, can be hidden in the data reading/writing processing time.

FIG. 4 shows an input circuit of a conventional arbitrary angle rotation device. The input buffer 11 reads one word of data from the memory,
- Temporarily stored and sent to mask pattern register 41;

The mask pattern register 41 has input buffers 11 to 1.
Word data is obtained, unnecessary pixels are removed, and the data is sent to the parallel-to-serial converter 42. For example, in FIG. 2(a), the pixel to the right of pixel 211 is also read at the same time as pixel 211, but since it is unnecessary, it is removed. In addition, pixel 21
The three pixels to the left of are also unnecessary, so they are removed.

The parallel-to-serial converter 42 receives one word of data from the mask pattern register 41 and temporarily stores it.
Decomposes and outputs each pixel.

The input buffer 11 becomes empty when data is sent to the parallel-serial converter 42 via the mask pattern register 41, so while the parallel-serial converter 42 decomposes and outputs the sent data, the primary data is Read processing is possible. Thereby, data reading processing and pixel processing can be realized simultaneously.

In the rotation processing shown in FIG. 2, the processing of pixels 29, 210, and 211 consists of reading one word of data once and processing one pixel three times. As mentioned above, the data reading processing time is longer, so the data reading time for one word is 3.
If it is longer than the pixel processing time, pixel 29 and pixel 21
The processing of 0 and pixel 211 requires only one word of data reading time, which is hidden by the processing of one pixel three times. Also, assuming that the data reading time for one word is equal to the processing time for two pixels, the processing time for one pixel is hidden twice, and only the sum of the data reading time for one word and the time for processing one pixel is required. . This is also the time required to process one pixel three times. Therefore, in the rotation processing shown in FIG. 2, in order to process one word of data, the longer of the data reading time of one word or the pixel processing time within one word is required.

Related devices of this type include, for example, Japanese Patent Application Laid-open No. 6
3-24370 and the like.

On the other hand, in the 45 degree rotation in FIG. 3, pixel 34 and pixel 3
The processing of pixel 5, pixel 36, and pixel 37 consists of reading one word of data four times and processing one pixel four times. As described above, since the data reading processing time is long, it takes four words of data reading time to process all the pixels in one word of data 33. This clearly requires more processing time than the data processing time for one word in FIG.

This is because l-word data holds multiple pixels in the horizontal direction, and as the angle increases from 0 degrees to 45 degrees, the number of pixels obtained by reading one word of data decreases. The number of times the memory must be read to read the same number of pixels increases. Further, when the angle is 45 degrees or more, the lower one word data must be read in order to obtain the next pixel to be processed, so the same processing time as at 45 degrees is required.

For this problem, for example, JP-A No. 59-214969
This problem has been solved by inventions such as those disclosed in Japanese Patent Publication No.

First, in FIG. 2, the movement of the image in the vertical direction, that is, the diagonal line from pixel 21 to pixel 22, the movement of horizontal lines from pixel 25 to pixel 26, and the movement in the horizontal direction, that is, the diagonal line from pixel 21 to pixel 24, 25 to the vertical line from pixel 28. Next, a memory is used in which a plurality of pixels can be obtained in the horizontal direction by reading one word of data, and a plurality of pixels can be obtained in the vertical direction by reading one word of data. By obtaining a plurality of pixels in the horizontal direction when moving in the horizontal direction, and obtaining a plurality of pixels in the horizontal direction when moving in the vertical direction, the number of times one word of data is read is reduced.

Note that there are various uses for rotating an image at an arbitrary angle, and one of the useful ones is tilt correction of scanner input. This is to correct documents and drawings that are placed crooked and input at an angle when the scanner device reads them, converts them into electrical signals, and processes the images. . When displaying a tilted document, it will look unnatural if there is a reference line, and if you cut and paste a tilted document and another tilted document, it will look unsightly. Then, the tilted documents are rotated in the opposite direction to make them stand upright. Since this tilt angle is generally small, the rotation angle for correction may also be small.

[Problem to be solved by the invention]

The prior art described above does not take into account rotation processing of 45 degrees or large angles close to it, so even rotation processing of small angles can be performed as shown in Fig. 5 (c).
) Pixel 5012 In pixel 502 and pixel 503, pixel 502 requires time to read one word of data in order to process one pixel in the same manner as when rotated by 45 degrees, and there is a problem in that the processing time increases over time. When one word data 507 is decomposed and outputted by the parallel-serial converter 42 in FIG. 4, one word data 508 is stored in the input buffer 11. Parallel serial converter 42
outputs pixel 501 and becomes empty, so it receives one word of data 508 from input buffer 11 and then outputs pixel 5.
Outputs 02. Input buffer 11 has 1 word data 5
When 08 is output, reading processing of the next one word data 509 is started. Here, the parallel serial converter 42
immediately after leaving the pixel 502, one word data 509 is generated.
However, since the time to read one word of data 509 is longer than the processing time for one pixel, the input buffer 11 is still empty. This causes processing to be interrupted while waiting for input, increasing processing time.

Figure 5(d) (7) Pixel 5o42 pixel 5o52 pixel 50
The same is true for pixel 505 in 6.

Although the technology described after the above-mentioned prior art solves the above problem, it is extremely difficult to create a large capacity memory that can be read and written in units of one word in the vertical and horizontal directions.

The purpose of the present invention is to perform 1
Even if there is a pixel such as the pixel 502 or 505, data can be read from the memory at high speed, processing is not interrupted while waiting for input, and processing time is shortened.

Another object of the present invention is that in arbitrary angle rotation processing of small angles, data can be written to memory at high speed even if there is an output pixel such as pixel 502 or pixel 505, and the processing is interrupted while waiting for output. The goal is to reduce processing time and prevent this from happening.

Another object of the present invention is arbitrary angle rotation processing.

The object of the present invention is to realize a parallel-to-serial conversion circuit that is optimal for an input/output circuit.

Another object of the present invention is to provide a memory access means in the input/output circuit of the present invention, which prevents input/output waiting from occurring due to delays in requests for reading and writing to the memory.

[Means to solve the problem]

In order to achieve the above object, in the present invention.

Data can be held in the input circuit of arbitrary angle rotation processing device 3
Two buffers are provided, two of them are used as parallel-to-serial converters, data is sent alternately from the remaining one buffer to two parallel-to-serial converters, and data is sent alternately from the two parallel-to-serial converters. Outputs a pixel string to .

Furthermore, a memory request circuit for pre-reading is provided to ensure that at least two of the three buffers have data.

Alternatively, one of the three buffers is used as a parallel-to-serial converter, and the remaining two buffers and the parallel-to-serial converter are connected in series.

In order to achieve the other objectives mentioned above, 3g! can hold data in the output circuit of the arbitrary angle rotation processing device! buffers are provided, two of them are used as serial-to-parallel converters, pixel columns to be output are alternately input to the two serial-to-parallel converters, and the remaining pixel columns are alternately input from the two serial-to-parallel converters. Send data to one buffer and output data from the buffer.

In order to achieve the other objectives mentioned above, a sufficient number of latches to hold one word of data and one
A parallel-to-serial conversion circuit is constructed by providing a selector for selecting PIZU 1 and a counting means whose cycle is the number of selectors.

In order to achieve the above-mentioned other objects, the memory addresses to be read are provided as a table, and the memory request and the table address are output as soon as one of the three buffers becomes empty.

[Effect]

In the input circuit, one word data 507 is stored in one of the two parallel-serial converters, one word data 508 is stored in the other, and one word data 509 is stored in the buffer.
Suppose that you are storing . When the parallel-to-serial converter storing 1-word data 507 outputs pixel 501, the output is switched to the parallel-to-serial converter storing 1-word data 508, and from the buffer to the empty parallel-to-serial converter. One word data 509 is transferred. Transfer between buffers can be realized in the same time as the output of one pixel, so when pixel 502 is output, one word of data 509 can be stored in the other parallel-serial converter, and then the output can be switched without interrupting processing. pixel 5
03, the rotation processing time can be shortened.

In this process, it is necessary to store at least one word of data 509 in the buffer before starting processing of one word of data 508. This can be met by a read-ahead memory request circuit that ensures that more than one buffer is filled with data.

In the output circuit, the flow of data is simply reversed from that in the input circuit, and the rotation processing time can be shortened by performing the same operation.

The parallel-serial converter of the present invention uses the count value of one counter as the selection position of the two selectors of the two parallel-serial converters, so that when the output is switched from one to the other, the pixel 502 to The necessary pixels can be immediately output to the pixel 503, and the unnecessary processing time of discarding the pixel to the left of the pixel 503 can be omitted.

The addresses of 1 word data 507, 1 word data 508, and 1 word data 509 are registered in the table in order, and when the buffer becomes empty regardless of pixel processing,
By reading the data of the registered addresses in order, it is possible to read the 1-word data 509 instead of the right-hand side of the 1-word data 508 even when the pixels in the 1-word data 507 are being output. . As a result, data can always be stored in two or more buffers, so there is no need to wait for input.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG.

FIG. 1 shows an image data input circuit of an arbitrary angle rotation device used in this embodiment.

The input buffer 11 reads one word of data from the memory, temporarily holds it, and outputs it to the selector A12. The selector A12 converts the data from the input buffer 11 into the parallel-to-serial converter A1 according to the output of the latch (L) 101.
3 or to the parallel/serial converter B14 and outputs it. The parallel-to-serial converter A13 and the parallel-to-serial converter B14 have the same structure, and temporarily hold one word of data input from the selector A12, and set the count value of the word width counter A17 to the bit position within one word. The pixel at that bit position is output to the selector B15. Selector B15 NOT outputs the latch (L) 101
According to the signal inverted by the gate 102, either the parallel-to-serial converter A13 or the parallel-to-serial converter B14 is selected to input the pixel and output it to the interior of the arbitrary angle rotation device.

Selector B15 is set to selector A by NOT gate 102.
Select the parallel-to-serial converter on the opposite side of 12.

Pattern width counter A16 and pattern width counter B10
3 is a counter with the same structure, and when the input pixel is shifted in the vertical direction, the carry is sent to the OR gate 18 and the request buffer 10.
5 respectively. In FIG. 2, it is a quaternary counter and outputs a carry simultaneously with the output of pixel 211 from selector B15. The word width counter A17 and the word width counter B104 are counters having the same structure, and each outputs a carry to the OR gate 18 and the request buffer 105 at intervals of the number of bits of one word. The carry output timing is simultaneous with the output of the last pixel of one word from the selector B15. Also.

The word width counter A17 outputs the count value to the parallel-to-serial converter A13 and the parallel-to-serial converter B14, and sets it as the extraction position of one pixel. OR gate 18 and EOR
Gate 19 and latch 101 are pattern width counter A16
Or if either word width counter A17 outputs a carry.

This is a circuit that receives this as an input and inverts the output to the selector A12 and selector B15. That is, when a pixel shifts in the vertical direction or when all one word is output, the inputs and outputs of the parallel-to-serial converter A13 and the parallel-to-serial converter B14 are switched.

The request buffer 105 receives the carry output of the pattern width counter B103 or the word width counter B104, holds it, and outputs a read request to the memory. In other words, if a pixel shifts in the vertical direction or if all one word is output, one of the parallel-to-serial converters becomes empty, and the next data is requested.

Pattern width counter B103 and word width counter B10
In order to read ahead, the data request circuit consisting of 4 and the request buffer 105 starts a counting operation in advance of the pattern width counter A16 and the word width counter B17↓. Further, the request buffer 105 holds one request signal, and when the next carry is input while the held request cannot be accepted, the pattern width counter B103 and the word width counter B104 are stopped.

FIG. 5 is an example of image data. Only two lines are shown in each, one word is six pixels, and the read pixel position is shown by a circle.

One word data 513 in FIG. 5(a) is stored in the parallel-serial converter A13, one word data 514 is stored in the parallel-serial converter B14, one word data 515 is stored in the input buffer 11, and the pattern width counter The process starts with the count values of A16 and word width counter A17 being 1. The pixels are output one after another, and when the count value of the word width counter A1) reaches 6, a carry is output to the OR gate 18, and the parallel-serial converter A13 outputs the pixel 516 via the selector B15.

When OR gate 18 inputs a carry, FOR gate 1
EOR gate 19 inverts the input from latch 101 and outputs it to launch 101, inverting the output of latch 101. As a result, selector A12 selects parallel-serial converter A13, and selector B15 selects parallel-serial converter B15.

The count value of the word width counter A17 returns to 1, and the parallel-serial converter B14 outputs the pixel 517 through the selector B15. Since the parallel-serial converter A13 becomes empty, one word of data 515 is stored from the input buffer 11 via the selector A12. This results in
Since the input buffer 11 becomes empty, the request buffer 105
Request 1 word data 516 from 1 word data 5
16 is stored in the input buffer 11.

Furthermore, when the count value of the word width counter A17 reaches 6, the parallel-to-serial converter B14 outputs pixel 518 via the selector B15, and the same operation causes the selector A to output the pixel 518.
12 selects the parallel-serial converter B14, and selector B15 selects the parallel-serial converter A13.

The input processing progresses by repeating the above steps. In addition, Fig. 5 (a
), the pixels are not shifted in the vertical direction, so the pattern width counter A16 does not output a carry.

Next, the process of shifting the input pixels in the vertical direction will be described. Fifth
In Figure (b), 1 word data 519 is stored in the parallel to serial converter A13 and selected by the selector B15, and 1 word data 520 is stored in the parallel to serial converter B1.
4 and select it with selector A12. When the count value of word width counter A17 is 3, parallel to serial converter A13 outputs pixel 521. At the same time, pattern width counter A16 outputs a carry and latch 1
The output of 01 is inverted so that selector B15 selects parallel-serial converter B14. When the count value of the word width counter A17 reaches 4, the parallel-serial converter B14 outputs the pixel 522 immediately after the output of the pixel 521 due to the above selection.

The above processing allows input pixels to be shifted in the vertical direction.

Next, a case where the reading timing from memory is the most severe will be explained. In FIG. 5(Q), 1 word data 507 is stored in the parallel-serial converter A13 and selected by the selector B15, 1-word data 508 is stored in the parallel-serial converter B14, and 1-word data 507 is stored in the parallel-serial converter A13, and
09 is stored in the input buffer 11. When the count value of word width counter A17 reaches 6, parallel to serial converter A13 outputs pixel 501. Next, based on the carry output of the word width counter A17, the selector A12 selects the parallel-serial converter A13, and the selector B15 selects the parallel-serial converter B14.

The count value of the word width counter A17 returns to 1, and the parallel-serial converter B14 outputs the pixel 502 via the selector B15. At the same time, one word data 509 is sent from the empty parallel/serial converter A13 to the eight-person buffer 11 through the selector A12. Furthermore, pattern width counter A16 outputs a carry, and selector A
12 selects the parallel-serial converter B14, and selector B15 selects the parallel-serial converter 13. Since 1 word data 509 was stored when the pixel 502 was output, the parallel-serial converter A13 is connected to the selector B15.
1 pixel 502 followed by ii! j element 503 can be output.

FIG. 5(d) is also similar to FIG. 5(c), and the pixel 504
corresponds to pixel 5012, pixel 505 corresponds to pixel 5o2, pixel 506 corresponds to pixel 503, and are processed in the order of 1 word data 510.1 word data 511.1 word data 512.

According to this embodiment, no matter where the pixels are shifted in the vertical direction during rotation at a small arbitrary angle, processing is not interrupted while waiting for data input.

Next, another embodiment of the present invention will be described with reference to FIG.

FIG. 6 shows an image data input circuit of the arbitrary angle rotation device used in this embodiment, and has the same function as the circuit shown in FIG.

The selector A12, parallel-serial converter B14, selector B15, EOR gate 19, latch 101, and NOT gate 102 are removed from the circuit shown in FIG. 1, and an image buffer 61 is added. Image buffer 61 receives one word of data from input buffer 11, temporarily holds it, and outputs one word of data to parallel-serial converter A13 based on the input from OR gate 18.

In FIG. 5(c), one word data 507 is stored in the parallel-serial converter A13, and one word data 507 is stored in the parallel-serial converter A13.
8 is stored in the image buffer 61.

1 word data 509 to input buffer 11 #! I pay. When the count value of the word width counter A17 reaches 6, the parallel-to-serial converter A13 outputs the pixel 501, and the carry output of the word width counter A17 passes through the OR gate 18 to the image buffer 61 as one word data 508.
output. The parallel-to-serial converter A13 receives one word data 508 and converts pixel 501 to pixel 50.
Outputs 2. Furthermore, since the image buffer 61 becomes empty, the input buffer 11 stores one word data 509 into the image buffer 61. Furthermore, when the pixel 502 is output, the pattern width counter A16 outputs a carry and one image buffer 61
outputs one word data 509. As a result, the parallel-serial converter A13 receives one word data 509 and outputs the pixel 503 following the pixel 502.

According to this embodiment, the same effect as the circuit shown in FIG. 1 can be obtained, and the processing is not interrupted while waiting for input.

Next, another embodiment of the present invention will be described with reference to FIG.

FIG. 7 shows an image data output circuit of the arbitrary angle rotation device used in this embodiment, and is used when converting the image shown in FIG. 2(b) to the image shown in FIG. 2(a).

The input buffer 11 inputs one word of write destination data from the memory, temporarily holds it, and outputs it to the selector A12. For example, the pixel to the right of pixel 211 in FIG. 2 is not necessarily white and must maintain one original color;
Since a word is the basic unit of writing, something is written when writing to the pixel 211. Therefore, some colors are read in advance, combined with the pixels 211, and written. Input buffer 11 is used for this reading.

The selector A12 has the same function as that shown in FIG. Although the selection signal output circuit is omitted, switching is performed under the same conditions as in FIG. Serial-to-parallel converter A71 and serial-to-parallel converter B72 have the same structure; one word of data is input from selector A12 and held temporarily, pixels are input from selector C73 and combined, and one word is sent to selector D75. Output the data. The selector C73 inputs the processed pixels and selectively outputs them to the serial/parallel converter A71 or the serial/parallel converter B72. Selector D75 selects and inputs one word of data output from serial-to-parallel converter A71 or serial-to-parallel converter B72, and outputs it to output buffer 74. Output buffer 74
receives one word of data from selector D75, holds it temporarily, waits for a state in which it can be written to memory, and outputs it to memory.

In FIG. 5(c), the transfer destination data of 1 word data 507 is stored in the serial parallel converter A71, the transfer destination data of 1 word data 508 is stored in the serial parallel converter B72, and the transfer destination data of 1 word data 509 is transferred. The previous data is stored in the input buffer 11. Also, selector A
12 selects serial-parallel converter WB72, selector C73 selects serial-parallel converter A71, and selector D75 selects serial-parallel converter A71.

First, when a pixel is input to the serial-parallel converter A71 through the selector C73 up to the pixel 501, the selector A1
One word data 507 is output to the output buffer 74 in two outputs. Next, all the selectors switch their selections to the other converter, and the serial-parallel converter B72 inputs the pixel 502 by selecting the selector C. At the same time, the serial-parallel converter A71 inputs one word data 509 from the input buffer 11 via the selector A12. Next, selector A12 and selector C73 switch selection to the other converter, and serial-parallel converter A71 inputs pixel 503. Here, one word data 508 is stored in the serial-parallel converter B72, but the output buffer 74
Since one word of data 507 remains in the output buffer 74, it cannot be output to the output buffer 74. However, since the next pixel input to the serial-parallel converter B72 is 5 pixel light, if the light is transferred to the output buffer 74 by that time, the pixel processing will not be interrupted.

According to this embodiment, no matter where the pixel is vertically shifted during rotation at a small arbitrary angle, processing is not interrupted while waiting for data output.

Next, another embodiment of the present invention will be described with reference to FIG.

FIG. 8 shows a parallel-to-serial conversion circuit used in this embodiment, which can be used for the parallel-to-serial conversion circuit A13 and the parallel-to-serial conversion circuit B14.

The eight latches from latch 81 to latch 82 are elements that capture and hold image data that is input every 8 pixels. As soon as each latch holds data, the selector 8
3, and the output data is maintained as long as the captured data does not change. The selector 83 selects the counter value of the 3-bit counter 84 from the pixel data input from the eight latches.

Outputs only one pixel. When the counter value of the 3-bit counter is 0, the output of the latch 81 is selected and the counter value is 7.
In this case, the way the latch 82 comes out is selected.

With the above circuit, unlike a parallel-to-serial conversion circuit using a shift register in which latches are connected in series, pixel output can be started in the middle of one word of data. Processing time can be shortened without outputting the left pixel unnecessarily.

Note that although an 8-bit configuration is shown in this embodiment, the present invention is not limited to 8-bit configuration. Further, although the value of the 3-bit counter is set from 0 to 7, this is not limited to this, and for example, the value may be set from 1 to 8.

Next, another embodiment of the present invention will be described with reference to FIG.

FIG. 9(a) shows the image to be read on the memory, and the 9th
Figure (b) is a table of read addresses created on the memory. In FIG. 9(a), circles represent pixels to be processed, and rectangles represent one word of data. pixel 916
In order to read and process the image from 'M917' to 'M917', it is necessary to input one word data 91 to one word data 97.

FIG. 9(b) shows that there is a table from item 99 to item 915 in the memory contents 98, and the values are from 100 to 143, and each value is from 1 word data 91 to 1 word data 97. This is the address. That is, the address of 1 word data 91 is 100, and the address of 1 word data 92 is 110.

When 1 word data 91, 1 word data 92, and 1 word data 93 are already stored in the three buffers of the input circuit, 1 word data 91 to 1 word data 92
When processing advances to step 1, it becomes necessary to read one word data 94. At this time, by reading item 912 of the table,
It can be seen that the necessary data is located at memory address 121.

In order to read the 1-word data 94 located below without reading the right side of the 1-word data 93 while processing the 1-word data 92, the position of the pixel is calculated before the actual processing as in the embodiment of the present invention. The only way to do this is to specify the address to be read, or to store it in a table in advance as in this embodiment.

According to this embodiment, even if three buffers are installed in the input circuit and read ahead, the necessary data can be obtained accurately, so the three buffers can be used efficiently and processing interruptions due to waiting for input can be prevented. be able to.

Note that although this embodiment is applied to input processing, the same applies to output processing.

Next, an example of a system to which the present invention is applied will be explained. 1st
Figure o is a block diagram of an electronic file device, in which an image processing processor 953 uses the circuit of the present invention. FIG. 11 is a configuration diagram of the image processing processor 953. In this,
The present invention is applied to the circuit of the arbitrary angle rotation image data input section 961.

First, the electronic file device shown in FIG. 10 will be explained.

Each component of the electronic file device transfers data to each other via bus 956. The control processor 950 controls the operation of the entire electronic file device, instructs each component to start processing, and also manages the order in which the bus 956 is used when transferring data. The memory device 951 is a storage device for storing image data read by the scanner device 954, image data to be processed by the image processing processor 953, data obtained by compressing the image, and programs for the control processor. The optical disk device 952 is a storage device that mainly stores a large amount of compressed data. In addition to optical disks, large-capacity magnetic disks may also be used. The image processing processor 953 enlarges or reduces the image data in the memory device 951.

Alternatively, rotation processing is performed. This can be used to zoom in on a part of an image for a closer look, zoom out to see multiple images at the same time in -degrees, or rotate a tilted image to see it upright. do.

It also compresses the amount of image data to increase the amount of images that can be stored in the optical disk device 952, and restores the compressed data to the original image. The scanner device 954 optically reads an image written on paper or the like and converts it into electrical signal data. The converted image data is stored in the memory device 95.
Store to 1. The display device 955 is the memory device 9
The image data in 51 is displayed.

When inputting an image to an electronic file device, an image of paper or the like is inputted from a scanner device 954, stored in a memory device 951, and the stored image data is sent to an image processing processor 95.
3, the tilt is corrected using the arbitrary angle rotation of the present invention, and then compressed and stored in the optical disk device 952. Further, the image data in the memory device 951 is displayed on a display device 955 in order to confirm the reading result of the scanner device 954. Note that the control processor 950 controls the above processing procedure.

When outputting an image from the electronic file device, the compressed data is read from the optical disk device 952 and stored in the memory device 951 under the control of the control processor 950, and the stored data is restored to the original image data by the image processing processor 953. This image data is also stored in the memory device 951.
Store it in

The image data in the memory device 951 is stored in the display device 9.
55. At this time, if an image larger than the display screen of the display device 955 is stored in the memory device 951, the image processing processor cuts out and displays only the necessary portion, or reduces and displays the entire image. Also, regarding image data whose tilt has been corrected and has not been stored.

At the time of this display, the tilt can also be corrected using the arbitrary angle rotation of the present invention.

Next, the configuration of the image processing processor 953 will be explained using FIG. 11. The bus interface section 960 inputs data from the bus 956 and outputs it to the arbitrary angle rotation image data input section 961 and the compression/decompression section 963 . In addition, data is input from the scaling unit 962 and the compression/decompression unit 963,
Output to bus 956. Arbitrary angle rotation image data input section 9
61 is a circuit as shown in FIG. 1 or FIG. 6 according to the present invention. The scaling unit 962 simply scales the image when the rotation angle is O in the arbitrary angle rotated image data input unit 961, and corrects the change in image size due to rotation during one rotation process. The compression/decompression unit 963 compresses the amount of image data and restores the compressed data to the original image.

The control unit 964 controls the various units described above and presides over the entire process.

According to the embodiment described above, the circuit of the present invention can be appropriately applied to an electronic file device.

〔Effect of the invention〕

According to the present invention, in the process of rotating one image by a small arbitrary angle, the next image data can always be processed continuously no matter where the input pixel is shifted in the vertical direction. Since the process is not interrupted, the processing time for arbitrary angle rotation can be shortened.

Furthermore, no matter where the output pixel is shifted in the vertical direction, the pixel processing is not interrupted while waiting for the output of image data to the memory, so that the arbitrary angle rotation processing time can be shortened.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an input circuit according to an embodiment of the present invention, FIG. 2 is a diagram showing the pixel position relationship before and after arbitrary angle rotation processing, and FIG. 3 is a diagram showing the pixel position when rotated by 45 degrees. , 4th
The figure is a block diagram of a conventional input circuit, Figure 5 is a diagram showing the relationship between pixel position and memory word when rotating by a small angle, and Figure 6 is a diagram showing the relationship between pixel position and memory word when rotating by a small angle.
The figure is a block diagram of another configuration of the input circuit used in one embodiment of the present invention, Figure 7 is a block diagram of the output circuit of one embodiment of the present invention, and Figure 8 is the parallel-to-serial conversion circuit used in the present invention. FIG. 9 is a block diagram of a memory address table for pre-reading. FIG. 10 is a block diagram of an electronic file device to which the present invention is applied, and FIG. 11 is a block diagram of an image processing processor in the electronic file device of FIG. 11... Input buffer, 13... Parallel-serial converter A, 14... Parallel-serial converter B, 16
...Pattern width counter A, 17...Word width counter A. ``+r mi sho tochi 1 tope diagram fig. 1 1 2 1.)sa) sign shoulder meeting 1 to tl ki limit 4 science (to to tochiu °ζ1'' -) (b)

Claims (1)

[Claims] 1. In the image data input circuit of the image arbitrary angle rotation processing device, three buffers for holding image data, a pixel position calculation circuit, and a pixel position calculation circuit for requesting memory prefetching are provided,
The pixel position calculation circuit selects two of the three buffers.
is used as a parallel-to-serial converter, image data is alternately transferred from one other buffer to the two parallel-to-serial converters, and the image data is alternately converted to pixels in the two parallel-to-serial converters. An arbitrary angle rotation image data input circuit characterized in that the image data is inputted at an arbitrary angle. 2. In the arbitrary angle rotated image data input circuit described in item 1, the three buffers are connected in series, and only one in the final stage is used as a parallel-to-serial converter by a previous pixel position calculation circuit. An arbitrary angle rotation image data input circuit. 3. In the image data output circuit of the image arbitrary angle rotation processing device, three buffers for holding image data and a pixel position calculation circuit are provided, and two of the three buffers are serial-parallel converted by the pixel position calculation circuit. The pixel strings to be output are alternately input to the two serial-parallel converters, and the image data is alternately transferred from the two serial-parallel converters to the remaining one of the three buffers. An arbitrary angle rotation image data output circuit characterized by transmitting. 4. In the image data input circuit of the image arbitrary angle rotation processing device, a plurality of latches, a selection means for selecting one bit from the said number of bits, and a counting means for making the period equal to the number of bits are provided, and according to the value of the counting means, A parallel-to-serial converter, characterized in that the output of a specific latch from among the plurality of latches is selected and output by the selection means. 5. An arbitrary angle rotation image data input/output circuit, characterized in that the image data input circuit or output circuit of an image arbitrary angle rotation processing device is provided with a table of addresses of image data memory to be read and written. 6. In the arbitrary angle rotation image data input circuit according to claim 1 or the arbitrary angle rotation image data output circuit according to claim 3, an image data memory for reading and writing the image data;
A table of addresses of the image data memory is provided, and the image data is read ahead using the address table and the image data is always stored in two of the three buffers, or the image data is always stored in two of the three buffers. An arbitrary angle rotation image data input/output circuit characterized in that the image data is always outputted from the middle two to the image data memory. 7. An electronic file device that processes image data from an input means using an image processing means and stores it in a storage device, reads out the image data as appropriate and displays it on a display means, wherein the image processing means is the image processing means according to claim 1. or 2. An electronic file device comprising the arbitrary angle rotation image data input circuit according to 2, and applying necessary rotation processing to the image data from the input means.