JPH0313748U - - Google Patents
Info
- Publication number
- JPH0313748U JPH0313748U JP7447589U JP7447589U JPH0313748U JP H0313748 U JPH0313748 U JP H0313748U JP 7447589 U JP7447589 U JP 7447589U JP 7447589 U JP7447589 U JP 7447589U JP H0313748 U JPH0313748 U JP H0313748U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor
- semiconductor package
- semiconductor element
- lead frame
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 10
- 239000000463 material Substances 0.000 claims description 4
- 239000011347 resin Substances 0.000 claims 1
- 229920005989 resin Polymers 0.000 claims 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第１図は本考案の一実施例を示す半導体パツケ
ージの構造を示す断面図、第２図は従来の半導体
パツケージの構造を示す断面図である。
図において、１は半導体素子、２はリードフレ
ーム、３は配線材、４はエポキシ樹脂、５は感圧
材を示す。尚、図中、同一符号は同一、または相
当部分を示す。
FIG. 1 is a sectional view showing the structure of a semiconductor package according to an embodiment of the present invention, and FIG. 2 is a sectional view showing the structure of a conventional semiconductor package. In the figure, 1 is a semiconductor element, 2 is a lead frame, 3 is a wiring material, 4 is an epoxy resin, and 5 is a pressure sensitive material. In the drawings, the same reference numerals indicate the same or corresponding parts.
Claims (1)
フレームと前記半導体素子とリードフレームを配
線する配線材から構成される半導体が樹脂封止成
形されている半導体パツケージにおいて、半導体
パツケージの表面に感圧材を装着させたことを特
徴とする半導体パツケージ。 In a semiconductor package in which a semiconductor consisting of a semiconductor element, a lead frame on which the semiconductor element is mounted, and a wiring material for wiring the semiconductor element and the lead frame is molded with resin, a pressure-sensitive material is attached to the surface of the semiconductor package. A semiconductor package characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7447589U JPH0313748U (en) | 1989-06-26 | 1989-06-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7447589U JPH0313748U (en) | 1989-06-26 | 1989-06-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0313748U true JPH0313748U (en) | 1991-02-12 |
Family
ID=31614194
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7447589U Pending JPH0313748U (en) | 1989-06-26 | 1989-06-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0313748U (en) |
-
1989
- 1989-06-26 JP JP7447589U patent/JPH0313748U/ja active Pending