JPH03136372A - Mos control thyristor - Google Patents

Abstract

PURPOSE:To hardly cause a turn-OFF breaking in a MOS control thyristor, in which one electrode comes into contact with a first region and other electrode comes into contact to fifth and seventh regions, by a method wherein the specific resistance of a second region is specified. CONSTITUTION:A VAKX which is needed in practical use in an MCT is 2500 V or high and the specific resistance of a second region 2 must be 0.6OMEGAcm or lower for satisfying this VAKX. On the other hand, it is desirable that an ON-state voltage VON is 3.3 V or lower in 2000 A and the specific resistance of the region 2 must be 0.03OMEGAcm or higher for satisfying this value. Whereby the ratio of an electron current to all a current which is made to flow through an element can be reduced without being accompanied by a remarkable rise of the ON-state voltage. However, as a practical ON-state voltage, it is further desirable that the ON-state voltage is 3.0 V or lower. Therefore, the specific resistance of the region 2 must be 0.05OMEGAcm or higher. When the second region 2 and a third region 3 are an N-type, the VAKX is increased compared to that at the time when they are a P-type. Therefore, the MCT, whose VAKX exceeds 2500V on the condition of this specific resistance, is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a MOS control thyristor whose turn-on and turn-off are both voltage-driven and used as a power switching element.

[Conventional technology]

A gate turn-off thyristor (GTO) is commonly used as a thyristor that can be turned off. but,
Since this GTO thyristor is a current-driven element, it has drawbacks such as requiring larger gate drive power. In order to overcome this drawback, a MOS gate thyristor with a voltage-driven gate was announced. This is a structure in which a wide base bipolar transistor is driven by a MOS gate, and an insulated gate bipolar transistor (IG
BT). However, while an IGBT does not cause the internal parasitic thyristor to latch, a MOS gate thyristor does so, so not only the gate voltage but also the polarity of the 7-node voltage must be reversed at turn-off.

Recently, the magazine rlH1lfl Transactions
of ElectronDevicesJ ED-3
Volume 3 (1986') Page 1609 describes a thyristor using a MOS gate whose turn-on and turn-off are voltage-driven.MOS control thyristor<MQS
Control Thyrlster) C (hereinafter referred to as MCT) was announced. This has a structure in which turn-on and turn-off MOSFETs are incorporated into a pn-pn silicone. That is, as shown in FIG.
A second region 2 of a second conductivity type, that is, a p-type, is laminated thereon as a buffer layer, and a fifth region 3 of a p-type and high resistivity is laminated on this second region. An n-type fourth region 4 is selectively formed on the surface portion, a p-type fifth region 5 is selectively formed on the surface portion of the fourth region 4, and finally a low ratio A resistive p-type sixth region 6 and a low resistivity n-type seventh region 7 are formed. Then, a surface region sandwiched between the third region 3 and the fifth region 5 of the fourth region 4 and a surface region sandwiched between the fourth region 4 and the seventh region 7 of the fifth region 5 are used as a channel region. A gate electrode 9 is formed with a gate insulating film 8 interposed therebetween. Furthermore, the cathode that contacts the sixth region 6 and the seventh region 7 at the opening of the insulating film 12 is connected to the electrode 1.
An anode electrode 11 is provided in contact with the surfaces of the first region 1 and the first region 1 .

This element has a cathode electrode 10 grounded and a gate electrode 9
It operates by applying a voltage to the anode electrode 11. When a negative voltage is applied to gate electrode 9 during turn-on, a p channel is formed in the surface region sandwiched between p region 5 and p-91 region 3. Therefore, when a negative voltage is applied to the anode electrode 8i10, holes flow out from the formed p channel toward the anode, and the n'' region 1 and the p'' region 2
Turn on the junction n4/p- between. This results in
Electron injection occurs from the n0 layer 1 to the p-fil region 3. This electron passes through the p- layer 3 + n tri region 4,
ntl14 and p''6161 region 6 junction n/p' are turned on. As a result, holes are injected from p'' region 6, and n-
From 9 or more where the p-n-p thyristor turns on, the p layer 2
p-layer 3. Conductivity modulation occurs in the n-region 4 and the on-resistance decreases.

An n-channel is formed in the region. This results in n eff
Region 4 and p'' region 6 have the same potential. Therefore, even if electrons injected from n95 region 1 reach the junction n/p+ between n95 region 4 and p'' region 6, they will not be able to penetrate the formed n channel. Since the holes flow through the p'all region 6 and flow out to the cathode, hole injection from the p'all region 6 does not occur, and OFF is completed.

[Problem to be solved by the invention]

When turning off such an MCT with an inductive load (L load), the voltage of the L load back emf bone is applied to the junction between the third region and the fourth region in the form of a reverse bias. Therefore, a large electric field is generated at the junction. In particular, when the first conductivity type is n type and the second conductivity type is p type as shown in FIG.
Since the npn (npn) run risk, which consists of the first, second, third, and fourth regions, attempts to keep a constant current flowing, the main current is an electron current. High electric field (~I x 10'V/
Since the impact ionization rate of electrons when cl(1) is applied is about 100 to 1000 times higher than that of holes, avalanche destruction is likely to occur.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and provide a MOS control thyristor for L load turn-off that is less likely to cause turn-off damage.

[Means to solve the problem]

To achieve the above object, the present invention provides a first region of a first conductivity type with a high impurity concentration, a second region of a second conductivity type laminated in order on the region, and a second region of a second conductivity type with a low impurity concentration. a third region of the mold; a fourth region of the first conductivity type selectively formed on the surface of the third region; and a fifth region of the second conductivity type selectively formed on the surface of the fourth region. a sixth region of the second conductivity type formed on the surface of the fifth region, a seventh region of the first conductivity type, a surface region sandwiched between the third region of the fourth region and the fifth region; A gate electrode is provided through a gate insulating film on the surface region sandwiched between the fourth region and the seventh region of the fifth region, one electrode ii is in the first region and the other electrode is in the fifth and seventh region. In the MOS control thyristors each in contact with the seventh region, the specific resistance of the second region is 0.03n or more and 0.66Ω or less.

[Effect]

If the resistivity of the second region is increased, it becomes a barrier to carrier injection from the first region to the third region when a reverse bias is applied to the junction between the third and fourth regions at turn-off with an L load. becomes low, avalaiche breakdown is likely to occur, and the turn-off breakdown voltage vaxx decreases. On the other hand, the on-voltage of the device decreases because increasing the specific resistance of the second region increases the injection of carriers into the third region (this trade-off relationship is true when the second and third regions are p-type , 1st
As shown in the figure. V, which is practically required for MCT,
BB is 2500 V or more, and to satisfy this, the specific resistance of the second region must be 0.6 Ωcm or less, while the on-voltage V ea is preferably 3.3 V or less at 20 GOA. , in order to satisfy this, the resistivity of the second region must be 0.03V or more.This allows the ratio of electron current to the total current flowing in the device to be increased without a significant increase in the on-voltage. Can be reduced.

However, as a practical on-voltage, it is more desirable that it is 3.0V or less, and for that purpose, the specific resistance of the second region must be 0.05n or more, and the second and third regions must be n When it is a type, vhmx is higher than when it is a p-type, so vhmx is 2500 under the above resistivity condition.
An MCT greater than V is obtained. Therefore, n of the second region
It is also possible to make the specific resistance of the layer 0.6Ω or more.

〔Example〕

Examples and comparative examples of the present invention using an MCT having the structure shown in FIG. 2 will be described below.

Example: MC with withstand voltage 2.5kV and current capacity 200OA (7) rating
T was manufactured using the following steps. Thickness 10 on the surface of the n゛substrate l
Next, a gate oxide film 8 is deposited on the upper surface of the p- layer 3, and a polycrystalline silicon layer is formed on it. Gate electrode 9 was formed by lamination and patterning.

Using this gate electrode 9 as a mask, ion implantation was performed to form an nSlS region, and thermal diffusion was performed. The thickness of the remaining p-layer was 130p. After this, p 8N was obtained by ion implantation and thermal diffusion using the gate electrode as a mask.
Area 5. A p'' region 6 and an n'' region 7 were formed. Finally, an insulating film 12 was formed, and a cathode electrode 10 and an anode electrode 11 were attached to complete the device. The specific resistance of p-layer 3 is 2
What is the ion implantation dose for 50Ωam, nl region 4? , OxlG"/j, the specific resistance of 90 layer 2 is 0.1 Ωcm
Met. The on-voltage is 2.8V at 20GOA, and when turning off this device with L load, the anode voltage is 2.8V.
At 500 V, the device could be turned off without being destroyed, and the turn-off time at that time was 12 μsec, which was within a sufficiently practical range. The turn-off breakdown voltage V□ of this element is 3000 V
Met.

Comparative example 1: Thickness of MCT manufactured in the same manner as in the example: 130
The specific resistance of the n p- layer 3 is 250Ω, and the ion implantation dose for the nff region 4 is 7.0

The specific resistance of layer 2 was set to 0.7 Ωcm. The on-voltage of this element is 20GOA and 2. It was Ov. However, when turned off with an L load, the device was destroyed at an anode voltage of 2500 V. After examining this element in detail, we found that
1g of V& was 2380V.

Comparative Example 2: In an MCT manufactured in the same manner as in the example, the specific resistance of the p-layer 3 and the dose of ion implantation for the n-region 4 were the same as in the example, but the specific resistance of the 90 layer 2 0.
O20 called me. When this element was turned off with an L load, it did not break down even at an anode voltage of 2500 V, and the turn-off time at that time was 9.8 μsec, which was within a sufficiently practical range. VAllll of this element is 3120V. However, the on-voltage of this device is 2000 A
It reached 5.2v.

〔Effect of the invention〕

According to the present invention, the ratio of the second nodular region of the second conductivity type of the buffer layer between the first region of the first conductivity type and the third region of low impurity concentration that are in full contact with one electrode is resistance to 0.03
By setting the on-voltage to a practical value and the resistance to breakdown at turn-off is high, M
I was able to obtain an OS control thyristor.

[Brief explanation of the drawing]

Figure 1 is a diagram showing the dependence of the turn-off breakdown voltage V□8 and on-voltage VY on the resistivity of the p° layer in the second region;
The figure is a cross-sectional view of an MCT in which the present invention is implemented. l: First region (n” layer) 2: Second region (p” layer)
3: Third region (p-layer) 4: Fourth region (n61
area) 5: Fifth area (p area), 6: Sixth area (p''
Region 7: Seventh region (n'' region, 8: Gate insulating film,
9: gate electrode, 10: cathode electrode, 11 near anode electrode. ρ1几8m(Ω-3)! ! Figure 41 Figure 2

Claims (1)

[Claims] (1) A first region of the first conductivity type with a high impurity concentration, a second region of the second conductivity type laminated in order on the region, a third region of the second conductivity type with a low impurity concentration, and the third region a fourth region of the first conductivity type selectively formed on the surface of the fourth region; a fifth region of the second conductivity type selectively formed on the surface of the fourth region; The sixth region of the second conductivity type, the seventh region of the first conductivity type, the surface region sandwiched between the third region and the fifth region of the fourth region, and the fourth region and the seventh region of the fifth region formed respectively. A gate electrode is provided on a surface region sandwiched between the regions via a gate insulating film, one electrode is in contact with the first region, and the other electrode is in contact with the fifth and seventh regions, A MOS control thyristor characterized in that the specific resistance of the second region is 0.03 Ωcm or more and 0.6 Ωcm or less.