JPH03127901U - - Google Patents
Info
- Publication number
- JPH03127901U JPH03127901U JP3643490U JP3643490U JPH03127901U JP H03127901 U JPH03127901 U JP H03127901U JP 3643490 U JP3643490 U JP 3643490U JP 3643490 U JP3643490 U JP 3643490U JP H03127901 U JPH03127901 U JP H03127901U
- Authority
- JP
- Japan
- Prior art keywords
- output
- time
- electronic control
- control device
- latching means
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005259 measurement Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Description
第１図は本考案の一実施例の構成を示す構成図
、第２図は第１図に示した各部の信号波形を示す
タイムチヤート、第３図は従来の電子制御装置の
構成を示す構成図、第４図は第３図に示した各部
の信号波形を示すタイムチヤートである。
１…ＣＰＵ、２…出力ポート、３…制御ポート
、４…デコーダ、５…タイマ回路、６…ＯＲ回路
、１１〜１４…ラツチ、２１〜２４…出力ユニツ
ト。
Figure 1 is a configuration diagram showing the configuration of an embodiment of the present invention, Figure 2 is a time chart showing signal waveforms of each part shown in Figure 1, and Figure 3 is a configuration diagram showing the configuration of a conventional electronic control device. 4 are time charts showing signal waveforms at each part shown in FIG. 3. 1...CPU, 2...Output port, 3...Control port, 4...Decoder, 5...Timer circuit, 6...OR circuit, 11-14...Latch, 21-24...Output unit.
Claims (1)
をラツチするラツチ手段および該ラツチ手段の出
力に従つて被制御用機器に制御信号を出力する出
力手段を複数個具え、前記電子制御装置本体から
一定時間毎に出力されるストローブ信号に基づい
て前記複数個のラツチ手段が前記制御用データを
順次ラツチしていく電子制御装置の出力装置にお
いて、前記ストローブ信号が出力された時点から
計時を始め、前記一定時間経過後あらかじめ定め
られた時間までに次の前記ストローブ信号が出力
されない場合には、前記複数個のラツチ手段に対
してリセツト信号を出力するタイマ手段を設けた
ことを特徴とする電子制御装置の出力装置。 A plurality of latching means for latching control data output from the electronic control device main body and output means for outputting control signals to the controlled equipment according to the output of the latching means are provided, and the control data is outputted from the electronic control device main body for a certain period of time. In an output device of an electronic control device, in which the plurality of latching means sequentially latch the control data based on a strobe signal outputted every time, time measurement starts from the time when the strobe signal is outputted, and An electronic control device characterized in that a timer means is provided for outputting a reset signal to the plurality of latching means when the next strobe signal is not output by a predetermined time after a lapse of time. Output device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3643490U JPH03127901U (en) | 1990-04-04 | 1990-04-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3643490U JPH03127901U (en) | 1990-04-04 | 1990-04-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03127901U true JPH03127901U (en) | 1991-12-24 |
Family
ID=31542658
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3643490U Pending JPH03127901U (en) | 1990-04-04 | 1990-04-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03127901U (en) |
-
1990
- 1990-04-04 JP JP3643490U patent/JPH03127901U/ja active Pending
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