JPH03120066U - - Google Patents
Info
- Publication number
- JPH03120066U JPH03120066U JP3017990U JP3017990U JPH03120066U JP H03120066 U JPH03120066 U JP H03120066U JP 3017990 U JP3017990 U JP 3017990U JP 3017990 U JP3017990 U JP 3017990U JP H03120066 U JPH03120066 U JP H03120066U
- Authority
- JP
- Japan
- Prior art keywords
- conductor layer
- hole
- dielectric substrate
- integrated circuit
- thick film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 9
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
第１図は本考案の第１の混成集積回路用厚膜基
板の縦断面図、第２図は本考案の第２の実施例の
混成集積回路用厚膜基板の縦断面図、第３図は従
来の混成集積回路用厚膜基板の縦断面図である。
１，１１……誘電体基板、２，１２……導体層
、３，１３……導体層、４，１４……スルーホー
ル、５，１５……テーパー部、６……角部、７，
１６……角部、８，１７……導体層。
FIG. 1 is a vertical cross-sectional view of a first thick film substrate for a hybrid integrated circuit according to the present invention, FIG. 2 is a vertical cross-sectional view of a thick film substrate for a hybrid integrated circuit according to a second embodiment of the present invention, and FIG. 1 is a vertical cross-sectional view of a conventional thick film substrate for a hybrid integrated circuit. 1, 11... Dielectric substrate, 2, 12... Conductor layer, 3, 13... Conductor layer, 4, 14... Through hole, 5, 15... Taper part, 6... Corner part, 7,
16... corner portion, 8, 17... conductor layer.
Claims (1)
前記誘電体基板の裏面に第２の導体層が形成され
、前記誘電体基板に少なくとも１つのスルーホー
ルが形成され、前記スルーホールの内側面には第
３の導体層が形成されていて、第１の導体層と第
２の導体層が第３の導体層により電気的に導通し
ている構造をもつ混成集積回路用厚膜基板におい
て、上記スルーホールの一部または全体が円錐台
のテーパー形状であることを特徴とする混成集積
回路用厚膜基板。 A first conductor layer is formed on the surface of the dielectric substrate,
A second conductor layer is formed on the back surface of the dielectric substrate, at least one through hole is formed in the dielectric substrate, a third conductor layer is formed on the inner surface of the through hole, and a third conductor layer is formed on the inner surface of the through hole. In a thick film substrate for a hybrid integrated circuit having a structure in which a first conductor layer and a second conductor layer are electrically connected to each other by a third conductor layer, a part or the whole of the through hole has a tapered shape of a truncated cone. A thick film substrate for a hybrid integrated circuit, characterized in that:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3017990U JPH03120066U (en) | 1990-03-22 | 1990-03-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3017990U JPH03120066U (en) | 1990-03-22 | 1990-03-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03120066U true JPH03120066U (en) | 1991-12-10 |
Family
ID=31532908
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3017990U Pending JPH03120066U (en) | 1990-03-22 | 1990-03-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03120066U (en) |
-
1990
- 1990-03-22 JP JP3017990U patent/JPH03120066U/ja active Pending