JPH03113533U - - Google Patents

Info

Publication number
JPH03113533U
JPH03113533U JP2291290U JP2291290U JPH03113533U JP H03113533 U JPH03113533 U JP H03113533U JP 2291290 U JP2291290 U JP 2291290U JP 2291290 U JP2291290 U JP 2291290U JP H03113533 U JPH03113533 U JP H03113533U
Authority
JP
Japan
Prior art keywords
resistor
input terminal
level
data input
output terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2291290U
Other languages
Japanese (ja)
Other versions
JPH0727698Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP2291290U priority Critical patent/JPH0727698Y2/en
Publication of JPH03113533U publication Critical patent/JPH03113533U/ja
Application granted granted Critical
Publication of JPH0727698Y2 publication Critical patent/JPH0727698Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

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  • Keying Circuit Devices (AREA)
  • Manipulation Of Pulses (AREA)
  • Electronic Switches (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図…本件考案の押ボタン反転回路の1実施
例による回路構成図、第2図…第1図の本件考案
に関係する動作状態図、第3図…従来の押ボタン
反転回路の回路構成図、第4図…従来の押ボタン
反転回路の動作状態図。 1…押ボタン、6…R−Sフリツプフロツプ、
9…ダイオード、10…トランジスタ、R1…抵
抗、R2…抵抗、R3…抵抗、C…コンデンサ。
Fig. 1...Circuit configuration diagram according to one embodiment of the push button reversing circuit of the present invention, Fig. 2...Operation state diagram related to the present invention of Fig. 1, Fig. 3...Circuit configuration of a conventional push button reversing circuit. FIG. 4: An operating state diagram of a conventional push button reversing circuit. 1...Push button, 6...R-S flip-flop,
9...Diode, 10...Transistor, R1...Resistor, R2...Resistor, R3...Resistor, C...Capacitor.

Claims (1)

【実用新案登録請求の範囲】 (1) クロツク入力端子CLに加えられた電圧が
Lレベルの時にデータ入力端子bに加えるれてい
るL又はHレベルの電圧を読み込みクロツク入力
端子CLに加えられた電圧がHレベルになつた時
に出力端子に出力し、反転出力端子Q,には出
力端子がHの時にはLを、Lの時にはHが出力さ
れるようなRSフリツプフロツプのデータ入力端
子Dと、反転出力端子の間を第、の抵抗R3で
接続しデータ入力端子Dとアースの間にコンデン
サCを接続しクロツク入力端子CLとデータ入力
端子Dの間は第2の抵抗R2とダイオード9で接
続し、データ入力端子Dと、出力端子Qの間はク
ロツク入力端子CLがHレベルの時にON動作す
るトランジスタ10のコレクタCとエミツタE及
び第1の抵抗R1で接続してなることを特徴とす
る押ボタン反転回路。 (2) 前記第1の抵抗R1と第2の抵抗R2と第
の抵抗R3の抵抗値は第1の抵抗<<第2の抵抗
<<第3の抵抗であることを特徴とする実用新案
登録請求の範囲第(1)項記載の押ボタン反転回路
[Claims for Utility Model Registration] (1) When the voltage applied to the clock input terminal CL is at the L level, an L or H level voltage applied to the data input terminal b is read and applied to the clock input terminal CL. The data input terminal D of the RS flip-flop outputs an output terminal when the voltage becomes H level, and the inverting output terminal Q outputs an L signal when the output terminal is H level, and an H signal when the output terminal is L level. A second resistor R3 is connected between the output terminals, a capacitor C is connected between the data input terminal D and the ground, and a second resistor R2 and a diode 9 are connected between the clock input terminal CL and the data input terminal D. , the data input terminal D and the output terminal Q are connected by the collector C and emitter E of a transistor 10 that is turned ON when the clock input terminal CL is at H level, and a first resistor R1. Button inversion circuit. (2) Registration of a utility model characterized in that the resistance values of the first resistor R1, the second resistor R2, and the third resistor R3 are such that the first resistor<<second resistor<<third resistor. A pushbutton reversing circuit according to claim (1).
JP2291290U 1990-03-06 1990-03-06 Pushbutton inversion circuit Expired - Lifetime JPH0727698Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2291290U JPH0727698Y2 (en) 1990-03-06 1990-03-06 Pushbutton inversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2291290U JPH0727698Y2 (en) 1990-03-06 1990-03-06 Pushbutton inversion circuit

Publications (2)

Publication Number Publication Date
JPH03113533U true JPH03113533U (en) 1991-11-20
JPH0727698Y2 JPH0727698Y2 (en) 1995-06-21

Family

ID=31525919

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2291290U Expired - Lifetime JPH0727698Y2 (en) 1990-03-06 1990-03-06 Pushbutton inversion circuit

Country Status (1)

Country Link
JP (1) JPH0727698Y2 (en)

Also Published As

Publication number Publication date
JPH0727698Y2 (en) 1995-06-21

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Legal Events

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R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term