JPH0298976A - Photoelectric conversion device - Google Patents
Photoelectric conversion deviceInfo
- Publication number
- JPH0298976A JPH0298976A JP63251365A JP25136588A JPH0298976A JP H0298976 A JPH0298976 A JP H0298976A JP 63251365 A JP63251365 A JP 63251365A JP 25136588 A JP25136588 A JP 25136588A JP H0298976 A JPH0298976 A JP H0298976A
- Authority
- JP
- Japan
- Prior art keywords
- conductive film
- transparent conductive
- laminate
- photoelectric conversion
- conversion device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000006243 chemical reaction Methods 0.000 title claims abstract description 29
- 229910052751 metal Inorganic materials 0.000 claims abstract description 46
- 239000002184 metal Substances 0.000 claims abstract description 46
- 239000004065 semiconductor Substances 0.000 claims description 28
- 239000000758 substrate Substances 0.000 claims description 15
- 238000005286 illumination Methods 0.000 abstract 2
- 238000000034 method Methods 0.000 description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- 230000002093 peripheral effect Effects 0.000 description 6
- 230000006835 compression Effects 0.000 description 5
- 238000007906 compression Methods 0.000 description 5
- 239000004575 stone Substances 0.000 description 5
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 4
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 4
- 229910052980 cadmium sulfide Inorganic materials 0.000 description 4
- 229910052804 chromium Inorganic materials 0.000 description 4
- 239000011651 chromium Substances 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 229910044991 metal oxide Inorganic materials 0.000 description 4
- 150000004706 metal oxides Chemical class 0.000 description 4
- 230000003287 optical effect Effects 0.000 description 4
- 229910000077 silane Inorganic materials 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 229910052719 titanium Inorganic materials 0.000 description 4
- 239000010936 titanium Substances 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- WUPHOULIZUERAE-UHFFFAOYSA-N 3-(oxolan-2-yl)propanoic acid Chemical compound OC(=O)CCC1CCCO1 WUPHOULIZUERAE-UHFFFAOYSA-N 0.000 description 1
- 229910018487 Ni—Cr Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 239000012928 buffer substance Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- VNNRSPGTAMTISX-UHFFFAOYSA-N chromium nickel Chemical compound [Cr].[Ni] VNNRSPGTAMTISX-UHFFFAOYSA-N 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- PZPGRFITIJYNEJ-UHFFFAOYSA-N disilane Chemical compound [SiH3][SiH3] PZPGRFITIJYNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910003437 indium oxide Inorganic materials 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 238000004898 kneading Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 229910001925 ruthenium oxide Inorganic materials 0.000 description 1
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 150000003377 silicon compounds Chemical class 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
Landscapes
- Light Receiving Elements (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業の利用分野〕
本発明はカメラ等に使用される光電変換装置で、特に開
放電圧の変化によって照度を検出する光電変換装置に関
するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a photoelectric conversion device used in cameras and the like, and particularly to a photoelectric conversion device that detects illuminance based on changes in open-circuit voltage.
現在、カメラなど光学機器の測光手段として、CdS
(硫化カドミウム)受光素子やフォトダイオード型シリ
コン受光素子が使用されている。Currently, CdS is used as a photometric method for optical equipment such as cameras.
(Cadmium sulfide) light-receiving elements and photodiode-type silicon light-receiving elements are used.
光学機器の測光手段に使用される受光素子として、照度
に対する出力特性が直線性にすぐれていること、複雑な
周辺回路が不要なことなどが、強く要求されている。Light receiving elements used in photometric means of optical equipment are strongly required to have excellent linearity in output characteristics with respect to illuminance, and to eliminate the need for complex peripheral circuits.
CdS受光素子は光照射により抵抗値が変化するもので
あり、GdSからの出力を所定信号処理する周辺回路が
面素かつ安価なもので済み、さらには受光素子自体安価
なものである。しかし照度の変化に対する出力変化は、
直線性に乏しく、使用可能な照度範囲が10〜100Q
OLux程度であり、結局、CdS受光素子は安価な一
般者向けのカメラなどに使用されていた。The resistance value of the CdS light-receiving element changes with light irradiation, and the peripheral circuitry for processing the output from the GdS into a predetermined signal is simple and inexpensive, and furthermore, the light-receiving element itself is inexpensive. However, the output change due to the change in illuminance is
Poor linearity, usable illuminance range is 10-100Q
After all, CdS light receiving elements were used in inexpensive cameras for the general public.
他方、フォトダイオード型シリコン受光素子(PBS)
は照度の変化に対する短絡電流の変化を出力として用い
るものであり、その出力特性は照度の変化に対して比例
関係で、o、ooi〜100000Luxという広い照
度範囲でほぼ直線性を有している。On the other hand, a photodiode type silicon light receiving element (PBS)
uses a change in short-circuit current with respect to a change in illuminance as an output, and its output characteristic is proportional to a change in illuminance, and has almost linearity over a wide illuminance range of o, ooi to 100,000 Lux.
ところが、PBSは受光材料に単結晶シリコンを使用し
ていること、照度の変化に対して比例関係の出力を対数
圧縮するために対数圧縮回路を使用しなければ処理回路
に対応できないことなどの理由でコスト高となってしま
い、結局、カメラでは高級装置に使用されるに留まって
いる。However, PBS uses single-crystal silicon as the light-receiving material, and it cannot be used with processing circuits unless a logarithmic compression circuit is used to logarithmically compress outputs that are proportional to changes in illuminance. This results in high costs, and in the end, it is only used in high-end camera equipment.
現在使用されているPBSの出力は上述のように短絡電
流の変化を出力としているが、開放電圧の変化を出力と
するPBSについて言及すれば、照度の変化に対する開
放電圧の変化が対数関係の出力が得られ、対数圧縮する
ための対数圧縮回路が不要となり、周辺回路が面素化す
るように思える。しかし、開放電圧の変化が周囲の温度
によって大きく変動する、叩ち、約−2,7mV/”C
とという大きな温度係数を有してしまい、広い温度の動
作領域においては直接使用することが困難であった。The output of currently used PBSs is the change in short-circuit current as described above, but if we talk about PBSs that output changes in open-circuit voltage, changes in open-circuit voltage with respect to changes in illuminance are logarithmically related outputs. is obtained, a logarithmic compression circuit for logarithmic compression becomes unnecessary, and it seems that the peripheral circuit becomes a surface element. However, the change in open circuit voltage varies greatly depending on the ambient temperature, approximately -2.7mV/"C
It has such a large temperature coefficient that it is difficult to use it directly in a wide temperature operating range.
結局、このようなPBSは温度補償するだめのサーミス
タを利用した温度検出回路や温度補正回路などが必要と
なることなどの理由により実用化されるに至っていない
。Ultimately, such a PBS has not been put into practical use because it requires a temperature detection circuit or a temperature correction circuit that uses a thermistor for temperature compensation.
本発明は、上述の背景に基づいて案出されたものであり
、その目的は照度の変化に対して開放電圧の変化する出
力が、広い照度範囲で直線性を有し、且つ温度係数が小
さく、安価な光電変換装置を提供することにある。The present invention has been devised based on the above-mentioned background, and its purpose is to make the output whose open circuit voltage changes with respect to changes in illuminance have linearity over a wide illuminance range and have a small temperature coefficient. The object of the present invention is to provide an inexpensive photoelectric conversion device.
〔目的を達成するための具体的な手段〕本発明によれば
、上述の目的を達成するため、透明導電膜を被着した透
明基板上に、P−r−N接合した非晶質半導体層と金属
電極とを重畳して成る2つの積層体を形成し、該透明導
電膜を介して互いに逆向きに接続した光電変換装置にお
いて、前記一方の積層体に、非晶質半導体層に光の入射
を阻止する遮光体を形成するとともに、2つの積層体外
に前記透明導電膜と導通ずる金属端子を設けた光電変換
装置が提供される。[Specific Means for Achieving the Object] According to the present invention, in order to achieve the above-mentioned object, an amorphous semiconductor layer bonded to P-r-N is formed on a transparent substrate coated with a transparent conductive film. In a photoelectric conversion device in which two laminates are formed by overlapping a metal electrode and a metal electrode and are connected in opposite directions to each other via the transparent conductive film, light is applied to an amorphous semiconductor layer in one of the laminates. A photoelectric conversion device is provided in which a light shielding body is formed to block the light incident thereon, and a metal terminal that is electrically connected to the transparent conductive film is provided outside the two laminates.
また、前記透明導電膜と一方の積層体の金属電極間に、
一定バイアス電圧を印加する電源及びバイパス抵抗成分
(以下、抵抗と記す)を設けた光電変換装置が提供され
る。Further, between the transparent conductive film and the metal electrode of one of the laminates,
A photoelectric conversion device is provided that includes a power source that applies a constant bias voltage and a bypass resistance component (hereinafter referred to as a resistance).
以下、本発明の光電変換装置を図面に基づいて詳細に説
明する。Hereinafter, the photoelectric conversion device of the present invention will be explained in detail based on the drawings.
第1図は本発明に係る光電変換装置の構造を示す断面構
造図であり、第2図は第1図に示した光電変換装置の等
価的な電気回路図である。FIG. 1 is a cross-sectional structural diagram showing the structure of a photoelectric conversion device according to the present invention, and FIG. 2 is an equivalent electric circuit diagram of the photoelectric conversion device shown in FIG.
本発明の光電変換装置は、透明基板1上に、透明導電膜
2、P−1−N接合した非晶質半導体層3及び金属電極
4a、4bからなる積層体a、 bが形成される。そ
して、前記2つの積層体a、 bが透明導電F42を
介して互いに逆方向に接続されて形成されるとともに、
一方の積層体aには、周囲の光の入射を遮断する遮光体
5が形成される。In the photoelectric conversion device of the present invention, laminates a and b each consisting of a transparent conductive film 2, a P-1-N bonded amorphous semiconductor layer 3, and metal electrodes 4a and 4b are formed on a transparent substrate 1. The two laminates a and b are connected in opposite directions to each other via the transparent conductive F42, and
A light shielding body 5 that blocks the incidence of ambient light is formed on one of the laminates a.
さらに、第2図に示すように前記透明導電膜2と遮光体
5を有する積層体aの金属電極4aとの間に抵抗成分7
を介在してバイアス電圧が印加されるよう前記透明導電
膜2と連通ずる金属端子6が形成されている。Furthermore, as shown in FIG.
A metal terminal 6 is formed to communicate with the transparent conductive film 2 so that a bias voltage is applied therebetween.
透明基板1はガラス、透光性セラミックなどから成り、
該透明基板1の一生面には透明導電膜2が被着されてい
る。The transparent substrate 1 is made of glass, translucent ceramic, etc.
A transparent conductive film 2 is adhered to the entire surface of the transparent substrate 1.
透明導電膜2は酸化錫、酸化インジウム、酸化インジウ
ム錫などの金属酸化物膜で形成され、透明基板1の一生
面の少なくとも積層体a、bに共通の膜となるように形
成されている。具体的には透明基板1の一生面上にマス
クを装着した後、上述の金属酸化物膜を装着したり、透
明基板1の一生面上に金属酸化物膜を被着した後フォト
・エツチング処理したりして形成される。The transparent conductive film 2 is formed of a metal oxide film such as tin oxide, indium oxide, or indium tin oxide, and is formed to be a film common to at least the laminates a and b on the entire surface of the transparent substrate 1. Specifically, after a mask is attached to the whole surface of the transparent substrate 1, the above-mentioned metal oxide film is attached, or after a metal oxide film is deposited on the whole surface of the transparent substrate 1, a photo-etching process is performed. It is formed by
非晶質半導体層3は、少なくとも金属電極4a、4bが
形成され積層体a、bとなる部分に、第1の導電型、第
2の導電型、第3の導電型を接合、即ちP−I−N接合
が形成されている。具体的には、非晶質半導体層3はシ
ラン、ジシランなどのシリコン化合物ガスをグロー放電
で分解するプラズマCVD法や光CVD法等で被着され
る非晶質シリコンなどから成り、PI3はシランガスに
ジボランなどのP型ドーピングガスを混入した反応ガス
で形成され、1層はシランガスを反応ガスとして形成さ
れ、NI’5はシランガスにフォスフインなどのN型ド
ーピングガスを混入した反応ガスで形成される。The amorphous semiconductor layer 3 has a first conductivity type, a second conductivity type, and a third conductivity type bonded, that is, P- An I-N junction is formed. Specifically, the amorphous semiconductor layer 3 is made of amorphous silicon deposited by a plasma CVD method or a photo CVD method in which a silicon compound gas such as silane or disilane is decomposed by glow discharge, and the PI3 is made of silane gas. NI'5 is formed with a reactive gas mixed with P-type doping gas such as diborane, the first layer is formed with silane gas as the reactive gas, and NI'5 is formed with a reactive gas mixed with silane gas and N-type doping gas such as phosphine. .
金属電極4a、4bは、非晶質半導体層3上に所定間隔
、例えば非晶質半導体層3を通して金属電極4aい4b
間でリーク電流が発生しない程度の充分な距離を置いて
形成されている。具体的には、金M電極4a、4bは非
晶質半導体層3上にマスクを装着し、ニッケル、アルミ
ニウム、チタン、クロム等の金属を被着したり、非晶質
半導体層3上にニッケル、アルミニウム、チタン、クロ
ム等の金属膜を被着した後レジスト・エツチング処理し
たりして所定パターンに形成される。この工程により、
透明導電膜2を共通な股とした積石体a、bが形成され
ることになる。The metal electrodes 4a and 4b are placed on the amorphous semiconductor layer 3 at a predetermined interval, for example, through the amorphous semiconductor layer 3.
They are formed with a sufficient distance between them to prevent leakage current. Specifically, for the gold M electrodes 4a and 4b, a mask is attached on the amorphous semiconductor layer 3, and a metal such as nickel, aluminum, titanium, or chromium is deposited on the amorphous semiconductor layer 3. After depositing a metal film of aluminum, titanium, chromium, etc., a resist etching process is performed to form a predetermined pattern. Through this process,
Stone stacks a and b having the transparent conductive film 2 as a common crotch are formed.
尚、この金属電極4a、4bのレジスト・エツチング処
理時に、金属電極4.a、4.b及び非晶質半導体層3
をエツチングする溶液に浸漬したり、またレジスト・エ
ツチング処理に続いて金属電極4a、4bを侵さず、非
晶質半導体層3のみをエツチングする溶液に浸漬するこ
とにより、金属電極4a、4bが形成されない部分の非
晶質半導体N3の一部(図では、NFt)または全部を
除去してもよい。Note that during the resist etching process for the metal electrodes 4a and 4b, the metal electrodes 4. a, 4. b and amorphous semiconductor layer 3
The metal electrodes 4a, 4b are formed by immersing the amorphous semiconductor layer 3 in a solution that etches the amorphous semiconductor layer 3, or by immersing it in a solution that etches only the amorphous semiconductor layer 3 without attacking the metal electrodes 4a, 4b following resist etching treatment. A part (NFt in the figure) of the amorphous semiconductor N3 that is not removed may be partially or completely removed.
遮光体5は、前記積石体a、bのいづれか一方の積層体
、例えば積石体aに、周囲からの光が積層体aの非晶質
半導体層3に照射されないように形成される。遮光体5
は、単に透明基板1の外面に遮光フィルムを形成するこ
とが考えられるが、透明基板1の端面からの入射される
漏れ光線や透明基板1の厚み内に乱反射しながら到達す
る光があるため、好ましくは、積層体aに対応する透明
導電膜2と非晶質半導体層3の間に介在させる。The light shielding body 5 is formed on one of the stone stacks a and b, for example, the stone stack a, so that the amorphous semiconductor layer 3 of the stack a is not irradiated with light from the surroundings. Light shielding body 5
It is conceivable to simply form a light-shielding film on the outer surface of the transparent substrate 1, but since there are leakage light incident from the end surface of the transparent substrate 1 and light that reaches the thickness of the transparent substrate 1 while being diffusely reflected, Preferably, it is interposed between the transparent conductive film 2 and the amorphous semiconductor layer 3 corresponding to the laminate a.
具体的には、上述の透明導電膜2を形成した後に、積層
体aとなる部分に遮光体5を形成する。Specifically, after forming the above-described transparent conductive film 2, the light shielding body 5 is formed in the portion that will become the laminate a.
遮光体5の形成方法として、不透光性樹脂、無機材料を
スクリーン印刷法で形成したり、ニッケル、クロム、チ
タン、ニッケルークロムなどの金属を厚み500Å以上
にスパッタリングなどの物理的蒸着法で形成する。これ
により、周囲の光を完全に遮断することができる。特に
後者の金属を被着した場合には、透明導電膜2を緩衝物
質として作用させることができるので、遮光体5の金属
層の基板剥離が防止できる。また、遮光体5に金属を被
着すると、非晶質半導体層3の材料であるシリコンとシ
リサイドやシリコンの共晶層を形成して、非晶質半導体
層3の特性に悪影響を及ぼす場合がある。このとき、上
述の遮光体5を形成した後に、酸化シリコンや窒化シリ
コンを金属層上に形成し、遮光体5の金属層と非晶質半
導体層3が直接接触しないようにしてもよい。The light shielding member 5 can be formed using a screen printing method using an opaque resin or an inorganic material, or using a physical vapor deposition method such as sputtering to form a metal such as nickel, chromium, titanium, or nickel-chromium to a thickness of 500 Å or more. Form. This makes it possible to completely block out ambient light. In particular, when the latter metal is deposited, the transparent conductive film 2 can act as a buffer substance, so that peeling of the metal layer of the light shield 5 from the substrate can be prevented. Furthermore, if metal is deposited on the light shielding body 5, a eutectic layer of silicide or silicon may be formed with silicon, which is the material of the amorphous semiconductor layer 3, and this may adversely affect the characteristics of the amorphous semiconductor layer 3. be. At this time, after forming the above-mentioned light shield 5, silicon oxide or silicon nitride may be formed on the metal layer so that the metal layer of the light shield 5 and the amorphous semiconductor layer 3 do not come into direct contact.
金属端子6は、2つのviN体a、 bのない部分で
透明導電膜2と電気的に接続されて形成されている。図
のように非晶質半導体層3が透明導電膜2を完全に覆う
場合は、この非晶質半導体層3に開口部61を形成し、
該開口部61を連通して透明導電膜2と電気的に接続す
るように形成すればよい。The metal terminal 6 is formed to be electrically connected to the transparent conductive film 2 at a portion where the two viN bodies a and b are not present. When the amorphous semiconductor layer 3 completely covers the transparent conductive film 2 as shown in the figure, an opening 61 is formed in the amorphous semiconductor layer 3,
The opening 61 may be formed so as to be electrically connected to the transparent conductive film 2 by communicating with it.
具体的には、金属端子6は、金属電極4a、4bの形成
時に同一材料のニッケル、アルミニウム、チタン、クロ
ム等の金属で形成される。Specifically, the metal terminal 6 is formed from the same metal, such as nickel, aluminum, titanium, or chromium, when forming the metal electrodes 4a and 4b.
以上のように構成された光電変換装置に基づいて、バイ
アス電圧の印加について説明する。Application of a bias voltage will be explained based on the photoelectric conversion device configured as described above.
金属端子6と積石体aの金属電極4aとの間に抵抗成分
7が接続される。さらに、抵抗成分7と積層体aの金属
電極4aとの間には、直流のバイアス電圧8がf2F9
2層に対して順方向に印加されている。A resistance component 7 is connected between the metal terminal 6 and the metal electrode 4a of the stone stack a. Furthermore, a DC bias voltage 8 is applied between the resistance component 7 and the metal electrode 4a of the laminate a.
It is applied in the forward direction to the two layers.
今、積層体aの金属電極4aに−、透明導電膜2間に抵
抗成分7を介して十で積層体aに対して順方向にバイア
ス電圧をかけておくと、出力(点A、B間)Vabには
積層体すの開放電圧と積石体aから出てくる電圧が加算
されて現れる。Now, if a forward bias voltage is applied to the metal electrode 4a of the laminate a and the transparent conductive film 2 through the resistance component 7, then an output (between points A and B) is applied. ) Vab appears as the sum of the open circuit voltage of the laminated body and the voltage coming out of the laminated stone body a.
明状態で、周囲温度が上昇していくと、遮光された積層
体aから出力される電圧(第2図中では番号4a一番号
6間の電圧)は温度上昇に伴い増加する。また積層体す
の開放電圧は温度上昇に伴い減少する。従って、温度変
化に対する開放電圧の変化分が互いに相殺され、照度の
変化に対する本装置の出力変化分は、積層体すの開放電
圧の変化分のみとなり、これが出力Vabとして現れる
ことになる。In the bright state, as the ambient temperature rises, the voltage output from the light-shielded laminate a (the voltage between numbers 4a and 6 in FIG. 2) increases as the temperature rises. Furthermore, the open circuit voltage of the laminate decreases as the temperature rises. Therefore, the changes in open circuit voltage due to temperature changes cancel each other out, and the output change of this device due to changes in illuminance is only the change in open circuit voltage of the laminated body, which appears as the output Vab.
以上の様に、光電変換装置に照射された光量によって発
生する積層体すの開放電圧の変化が、入射される光量の
変化に対して対数関係となり、出力接点A、B間より導
出される。As described above, the change in the open circuit voltage of the laminated body caused by the amount of light irradiated to the photoelectric conversion device has a logarithmic relationship with respect to the change in the amount of incident light, and is derived from between the output contacts A and B.
今、抵抗成分7に1.5MΩの抵抗素子、バイアス電圧
8に1vの電圧及び積層体asbの受光面積を夫々1.
1cm2に夫々設定して出力Vabの温度係数を測定し
たところ、+ 0.1mV/ ”C〜+ 0.17mV
/℃であった。Now, a resistance element of 1.5MΩ is set as the resistance component 7, a voltage of 1V is set as the bias voltage 8, and a light receiving area of the stacked body ASB is set to 1.
When the temperature coefficient of the output Vab was measured with each set at 1cm2, it was +0.1mV/"C ~ +0.17mV
/℃.
この結果は、従来の開放電圧の変化を出力としているP
BSの光センサー即ち、単一の積層体の透明導電膜と金
属電極との間で出力を検出する光センサーの温度係数で
ある−2.7mV/”Cに比較して、1/10以上に抑
えることができ、温度変化の大きい環境であっても正確
な光量の検出が可能となる。This result shows that the conventional P
It is more than 1/10 of the temperature coefficient of -2.7 mV/''C of the BS optical sensor, that is, the optical sensor that detects the output between a single laminate transparent conductive film and a metal electrode. This makes it possible to accurately detect the amount of light even in environments with large temperature changes.
また、照度に対する出力Vab変化についても、受光面
精が1.1cm2、抵抗成分7が109Ωでは、0.5
Lux〜50000Luxの範囲では、照度の対数に比
例する直線性が得られた。尚、0゜5Lux以下及び5
0000Lux以上と実用上無視できる領域で若干出力
が下降する程度であった。Also, regarding the output Vab change with respect to illuminance, when the receiving surface precision is 1.1 cm2 and the resistance component 7 is 109Ω, it is 0.5
In the range of Lux to 50,000 Lux, linearity proportional to the logarithm of illuminance was obtained. In addition, 0°5 Lux or less and 5
0000 Lux or more, which is a practically negligible range, and the output was only slightly reduced.
上述のように、本発明の光電変換装置によれば、照度の
対数変化に対応して開放電圧の変化である出力Vabが
直線性が得られることにより、従来のように周辺回路に
対数圧縮回路が不要となり、また温度係数が極めて小さ
いことより、周囲の温度変化に対応して出力を補正する
ための周辺回路も不要となる。As described above, according to the photoelectric conversion device of the present invention, the linearity of the output Vab, which is a change in open-circuit voltage in response to a logarithmic change in illuminance, is achieved, so that a logarithmic compression circuit is not required in the peripheral circuit as in the conventional case. Since the temperature coefficient is extremely small, there is no need for peripheral circuitry to correct the output in response to changes in ambient temperature.
さらに、本発明の光電変換装置の光導電材料に非晶質半
導体層を使用しているため、量産性及び低コスト化が容
易に達成される。Furthermore, since an amorphous semiconductor layer is used as the photoconductive material of the photoelectric conversion device of the present invention, mass production and cost reduction can be easily achieved.
ここで、温度係数+0.17mV/ ”Cについて考察
すると、カメラで使用される照度に関する単位はE■で
ある。EV値が1増加すると照度が2倍となる。Now, considering the temperature coefficient +0.17 mV/''C, the unit for illuminance used in cameras is E. When the EV value increases by 1, the illuminance doubles.
即ち、IEVの変化で開放電圧の変化は、30.1mV
となる。通常の光電変換装置の温度係数が−2゜7mV
/’Cであるため、光量変化がIEVに対応する温度変
化は11.2℃である。これにより、例えば温度差の激
しい屋外と屋内とでは、1.EV相当以上の照度補正が
必要となる。In other words, the change in open circuit voltage due to a change in IEV is 30.1 mV.
becomes. The temperature coefficient of a normal photoelectric conversion device is -2°7mV
/'C, the temperature change corresponding to the change in light amount IEV is 11.2°C. As a result, for example, there is a large temperature difference between outdoors and indoors. Illuminance correction more than equivalent to EV is required.
ところが、温度係数+0.17mV/ ’CをIEVに
対応する温度変化に換算すると、約177℃となる。However, when the temperature coefficient +0.17 mV/'C is converted into a temperature change corresponding to IEV, it is approximately 177°C.
これは、通常の光電変換装置が使用される温度範囲では
、IEV相当の補正をする必要が全くないことになる。This means that in the temperature range in which a normal photoelectric conversion device is used, there is no need to make any correction equivalent to IEV.
第3図(a)、(b)は、本発明の他の実施例を示す非
受光面側の平面図及び断面図である。FIGS. 3(a) and 3(b) are a plan view and a sectional view of the non-light receiving surface side showing another embodiment of the present invention.
本実施例では、金属端子6上に所定抵抗値となるように
所定量の酸化ルテニウムなどの金属酸化物を混練したペ
ーストをスクリーン印刷法等で抵抗層71を形成したも
のである。In this embodiment, the resistive layer 71 is formed on the metal terminal 6 by screen printing or the like with a paste prepared by kneading a predetermined amount of a metal oxide such as ruthenium oxide so as to have a predetermined resistance value.
そして、積層体a、 bの金属電極4a、4b及び抵
抗層71の一部を露出して絶縁膜9を形成したものであ
る。Then, the insulating film 9 is formed by exposing parts of the metal electrodes 4a, 4b and the resistive layer 71 of the laminates a, b.
本実施例によれば、金属電極4a、4b及び金属端子6
状の抵抗層71が光電変換装置の非受光面側に現れるた
めチップ状の素子が容易に達成でき、例えば、半田浴等
に浸漬することにより、簡単にリードオフ部品が達成さ
れることになる。According to this embodiment, the metal electrodes 4a, 4b and the metal terminal 6
Since the shaped resistance layer 71 appears on the non-light-receiving surface side of the photoelectric conversion device, a chip-shaped element can be easily achieved, and for example, a lead-off component can be easily achieved by immersing it in a solder bath or the like. .
さらに、金属端子6を形成時に、金属端子用の導電性ペ
ーストに所定抵抗材料を混練し、金属端子6そのものを
抵抗成分7として兼用しても構わない。Furthermore, when forming the metal terminal 6, a predetermined resistance material may be kneaded into the conductive paste for the metal terminal, and the metal terminal 6 itself may also be used as the resistance component 7.
以上のように、本発明は、透明導電膜を被着した透明基
板上に、P−I−N接合した非晶質半導体層と金属電極
とから成る2つの積層体を形成し、該透明導電膜を介し
て互いに逆向きに接続し、方の積層体に非晶質半導体層
への光入射を阻止する遮光体を形成するとともに、前記
透明導電膜と一方の積層体の全圧電極間に抵抗成分を介
在させ、該抵抗成分と一方のvi層体の全圧電極間に順
方向バイアス電圧を印加させるという節単な構造と容易
な接続により、他方の積層体から出力される開放電圧と
加算された出力の変化が照度の対数に比例した直線性な
出力が得られ、且つ周囲の温度変化に対する出力変化が
ほんとんど無視できる温度補償に優れた光電変換装置が
達成される。As described above, the present invention forms two laminates consisting of a P-I-N bonded amorphous semiconductor layer and a metal electrode on a transparent substrate covered with a transparent conductive film, and They are connected in opposite directions to each other through the film, and a light shielding body is formed on one of the stacked bodies to block light from entering the amorphous semiconductor layer, and a light shield is formed between the transparent conductive film and the full-voltage electrode of one stacked body. Due to the simple structure and easy connection of interposing a resistance component and applying a forward bias voltage between the resistance component and the full voltage electrode of one VI layer, the open circuit voltage output from the other layer A photoelectric conversion device with excellent temperature compensation is achieved in which a linear output in which the change in the added output is proportional to the logarithm of the illuminance and in which the change in output with respect to changes in ambient temperature is almost negligible.
また、対数圧縮回路や、温度補償回路など周辺回路や専
用のICなどが筒素化または不要となり、さらには、非
晶質シリコンという安価かつ量産性に冨んだ光電変換装
置が達成される。Further, peripheral circuits such as a logarithmic compression circuit, a temperature compensation circuit, and a dedicated IC become unnecessary, and furthermore, a photoelectric conversion device made of amorphous silicon that is inexpensive and easy to mass-produce can be achieved.
第1図は本発明に係る光電変換装置の構造を示す断面図
である。第2図は、光電変換装置の等測的な電気回路面
であり、第3図(a)は本発明に係る光電変換装置の他
の実施例の構造を示す非受光面側の平面図であり、第3
図(b)は第3図(a)に示した光電変換装置の断面図
である。
1 ・ ・ ・ ・ ・
2 ・ ・ ・ ・ ・
3 ・ ・ ・ ・ ・
4a、 4b ・
5 ・ ・ ・ ・ ・
6 ・ ・ ・ ・ ・
7 ・ ・ ・ ・ ・
透明基板
透明導電膜
非晶質半導体層
・・・金属電極
・遮光層
・全屈端子
・抵抗成分FIG. 1 is a sectional view showing the structure of a photoelectric conversion device according to the present invention. FIG. 2 is an isometric electric circuit surface of the photoelectric conversion device, and FIG. 3(a) is a plan view of the non-light-receiving surface side showing the structure of another embodiment of the photoelectric conversion device according to the present invention. Yes, 3rd
FIG. 3(b) is a sectional view of the photoelectric conversion device shown in FIG. 3(a). 1 ・ ・ ・ ・ 2 ・ ・ ・ ・ 3 ・ ・ ・ ・ 4a, 4b ・ 5 ・ ・ ・ ・ 6 ・ ・ ・ ・ 7 ・ ・ ・ ・ ・ Transparent substrate Transparent conductive film Amorphous semiconductor layer・・・Metal electrode, light shielding layer, fully bent terminal, resistance component
Claims (2)
接合した非晶質半導体層と金属電極とを重畳して成る2
つの積層体を形成し、該透明導電膜を介して互いに逆向
きに接続した光電変換装置において、 前記一方の積層体に、該積層体の非晶質半導体層に光入
射を阻止する遮光体を形成するとともに、2つの積層体
外に前記透明導電膜と導通する金属端子を設けたことを
特徴とする光電変換装置。(1) P-I-N on a transparent substrate coated with a transparent conductive film
2 formed by superimposing a bonded amorphous semiconductor layer and a metal electrode
In a photoelectric conversion device in which two laminates are formed and connected in opposite directions to each other via the transparent conductive film, one of the laminates is provided with a light shielding member that blocks light from entering the amorphous semiconductor layer of the laminate. A photoelectric conversion device characterized in that a metal terminal is provided outside the two laminates to be electrically connected to the transparent conductive film.
接合した非晶質半導体層と金属電極とを重畳して成少る
2つの積層体を形成し、該透明導電膜を介して互いに逆
向きに接続し、一方の積層体に遮光体を形成するととも
に、前記透明導電膜と一方の積層体の金属電極間に、一
定バイアス電圧を印加する電源及びバイアス電圧調整用
の抵抗成分を設けたことを特徴とする光電変換装置。(2) P-I-N on a transparent substrate coated with a transparent conductive film
Two laminates are formed by overlapping the bonded amorphous semiconductor layer and the metal electrode, and are connected in opposite directions to each other via the transparent conductive film to form a light shielding body in one of the laminates. A photoelectric conversion device further comprising a power source for applying a constant bias voltage and a resistance component for adjusting the bias voltage between the transparent conductive film and the metal electrode of one of the laminates.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63251365A JP2706953B2 (en) | 1988-10-05 | 1988-10-05 | Photoelectric conversion device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63251365A JP2706953B2 (en) | 1988-10-05 | 1988-10-05 | Photoelectric conversion device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0298976A true JPH0298976A (en) | 1990-04-11 |
JP2706953B2 JP2706953B2 (en) | 1998-01-28 |
Family
ID=17221745
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JP63251365A Expired - Fee Related JP2706953B2 (en) | 1988-10-05 | 1988-10-05 | Photoelectric conversion device |
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Country | Link |
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JP (1) | JP2706953B2 (en) |
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1988
- 1988-10-05 JP JP63251365A patent/JP2706953B2/en not_active Expired - Fee Related
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