JPH01302856A - Optoelectric transducer device - Google Patents
Optoelectric transducer deviceInfo
- Publication number
- JPH01302856A JPH01302856A JP63133787A JP13378788A JPH01302856A JP H01302856 A JPH01302856 A JP H01302856A JP 63133787 A JP63133787 A JP 63133787A JP 13378788 A JP13378788 A JP 13378788A JP H01302856 A JPH01302856 A JP H01302856A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- film
- optical sensor
- layer
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 23
- 238000006243 chemical reaction Methods 0.000 claims description 13
- 229910052751 metal Inorganic materials 0.000 abstract description 32
- 239000002184 metal Substances 0.000 abstract description 32
- 230000003287 optical effect Effects 0.000 abstract description 24
- 238000000034 method Methods 0.000 abstract description 16
- 230000001681 protective effect Effects 0.000 abstract description 8
- 229910021417 amorphous silicon Inorganic materials 0.000 abstract description 3
- 238000001514 detection method Methods 0.000 abstract description 2
- 239000010408 film Substances 0.000 description 54
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 8
- 239000011347 resin Substances 0.000 description 6
- 229920005989 resin Polymers 0.000 description 6
- 239000010409 thin film Substances 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 238000000151 deposition Methods 0.000 description 5
- 239000004925 Acrylic resin Substances 0.000 description 4
- 229920000178 Acrylic resin Polymers 0.000 description 4
- 239000003822 epoxy resin Substances 0.000 description 4
- 239000007789 gas Substances 0.000 description 4
- 229910003437 indium oxide Inorganic materials 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- 238000007650 screen-printing Methods 0.000 description 4
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 4
- 229910001887 tin oxide Inorganic materials 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 3
- 229910044991 metal oxide Inorganic materials 0.000 description 3
- 150000004706 metal oxides Chemical class 0.000 description 3
- 239000005011 phenolic resin Substances 0.000 description 3
- 229920001568 phenolic resin Polymers 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 2
- 239000011651 chromium Substances 0.000 description 2
- 239000005007 epoxy-phenolic resin Substances 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 229910052718 tin Inorganic materials 0.000 description 2
- 239000011135 tin Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical compound C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 150000003377 silicon compounds Chemical class 0.000 description 1
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Light Receiving Elements (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業の利用分野〕
本発明は光照射を受けると導電率の変化や光電流を発生
する光センサー部と、該光センサー部の出力を制御する
回路とを同一基板上に併設した光電変換装置に関するも
のである。[Detailed Description of the Invention] [Field of Industrial Application] The present invention provides an optical sensor section that changes conductivity and generates a photocurrent when irradiated with light, and a circuit that controls the output of the optical sensor section on the same substrate. This relates to a photoelectric conversion device attached to the top.
従来より、光照射により、その照度に対応する出力を導
出する光センサーが一般に使用されている。例えば、非
晶質半導体層を有する光導電型光センサーの場合、外部
からバイアス電圧を印加しておき、光照度の変化による
非晶質半導体層の光導電率の変化をバイアス電流として
出力端子から導出し、そのバイアス電流を外部回路で制
御処理していた。2. Description of the Related Art Conventionally, optical sensors have been commonly used which derive an output corresponding to the illuminance of light irradiation. For example, in the case of a photoconductive optical sensor that has an amorphous semiconductor layer, a bias voltage is applied externally, and changes in the photoconductivity of the amorphous semiconductor layer due to changes in light illuminance are derived from the output terminal as a bias current. However, the bias current was controlled by an external circuit.
しかしながら、上述の外部回路は光動作する実装機器と
光センサーの特性に応じて使用者が設計しなくてはなら
ず、利用範囲を狭め、使用が極めて困難であった。However, the above-mentioned external circuit must be designed by the user according to the characteristics of the optically operated mounted device and the optical sensor, which narrows the scope of use and makes it extremely difficult to use.
また、受光素子と回路素子とを同一基板上に形成した受
光装置が既に提案されている（特開昭５８−５４６８７
号公報、特開昭５９−７６４８３号公報）が、いずれも
同一基板上に平面的に広がって受光素子と回路素子とが
形成されているだけであり、集精度が低く、基板が増大
化してしまうものであった。Furthermore, a light receiving device in which a light receiving element and a circuit element are formed on the same substrate has already been proposed (Japanese Patent Laid-Open No. 58-54687
(Japanese Patent Laid-Open No. 59-76483), the light-receiving element and the circuit element are only formed on the same substrate, and the collection accuracy is low and the substrate is increased. It was something to put away.
本発明は、上述の背景に鑑み案出されたものであり、そ
の目的は、薄膜技法と厚膜技法とを駆使して光センサー
部上に検出回路部を形成し、機能の向上及び実装機器の
省スペース化が可能な光電変換装置を提供することにあ
る。The present invention has been devised in view of the above-mentioned background, and its purpose is to form a detection circuit section on an optical sensor section by making full use of thin film techniques and thick film techniques, thereby improving the functionality and improving the functionality of mounted devices. An object of the present invention is to provide a photoelectric conversion device that can save space.
〔問題点を解決するための具体的な手段〕本発明によれ
ば、上述の問題点を解決するために、透明基板上に、第
１の電極及び第２の電極で非晶質半導体層を挟持した光
センサー部と、該光センサー部の第１の電極及び又は第
２の電極の一部を露出するように開口部を有する絶縁膜
を形成し、該絶縁股上に第１の電極又は第２の電極と接
続する導電パターン及び抵抗パターン等からなる回路部
とを形成した光電変換装置が提供される。[Specific Means for Solving the Problems] According to the present invention, in order to solve the above-mentioned problems, an amorphous semiconductor layer is formed on a transparent substrate using a first electrode and a second electrode. An insulating film having an opening is formed to expose the sandwiched optical sensor part and a part of the first electrode and/or the second electrode of the optical sensor part, and the first electrode or the second electrode is formed on the insulating crotch. A photoelectric conversion device is provided in which a circuit portion including a conductive pattern and a resistive pattern connected to the second electrode is formed.
以下、本発明の光電変換装置を図面に基づいて詳細に説
明する。Hereinafter, the photoelectric conversion device of the present invention will be explained in detail based on the drawings.
実施例では、第３図に示すように未知の抵抗値の測定に
利用されるホイートストンブリフジを回路部に用いた例
で説明する。即ち、ホイートストンブリフジ回路は、電
流計■に流れる電流がＯの時、Ｒａ−Ｒｂ −Ｒｃ／Ｒ
ｄとなり、ブリッジ回路として一般的にもちいられてい
る。In the embodiment, an example will be explained in which a Wheatstone bridge used for measuring an unknown resistance value is used in the circuit section as shown in FIG. 3. That is, in the Wheatstone bridge circuit, when the current flowing through the ammeter ① is O, Ra-Rb-Rc/R
d, and is generally used as a bridge circuit.
第１図は本発明の光電変換装置の構造を示す断面図であ
る。尚、同時に第２図（ａ）〜（ｇ）を用いて主要製造
工程及び平面的な構造をで説明する。FIG. 1 is a sectional view showing the structure of a photoelectric conversion device of the present invention. At the same time, the main manufacturing steps and planar structure will be explained using FIGS. 2(a) to 2(g).
本発明の光電変換装置は、透明絶縁基板ｌ、第１の導電
膜である透明導電膜２、非晶質シリコンから成る非晶質
半導体層３、第２の導電膜である金属電極４ｘ、４ｙ、
絶縁膜５とからなる光センサー部と、導電パターンであ
る導電層６、抵抗パターンである抵抗層７及び絶縁保護
膜８からなる回路部とで構成される。The photoelectric conversion device of the present invention includes a transparent insulating substrate l, a transparent conductive film 2 which is a first conductive film, an amorphous semiconductor layer 3 made of amorphous silicon, and metal electrodes 4x and 4y which are second conductive films. ,
It is composed of a photosensor section made up of an insulating film 5, and a circuit section made up of a conductive layer 6 as a conductive pattern, a resistive layer 7 as a resistive pattern, and an insulating protective film 8.
先ず、光センサー部の構成について、透明基板上にＰ−
１−Ｎ接合した非晶質半導体層を有する積層体のダイオ
ードが逆方向に抱き合わされた構造となっている。First, regarding the configuration of the optical sensor section, P-
It has a structure in which stacked diodes having 1-N junction amorphous semiconductor layers are tied together in opposite directions.
第２図（ａ）は透明絶縁基板１上に、透明電極２を形成
した状態の平面図である。FIG. 2(a) is a plan view of a transparent electrode 2 formed on a transparent insulating substrate 1.
透明絶縁基板１はガラス、透光性セラミックなどから成
り、該透明絶縁基板１の一主面の一部には、透明導電膜
２が装着されている。該透明導電膜２は酸化錫、酸化イ
ンジウム、酸化インジウム・錫などの金属酸化物膜で形
成され、透明絶縁基板」の−主面に少なくとも積層体ｘ
、ｙに共通の膜となるように形成される。具体的には、
この透明導電膜２は透明絶縁基板１の一主面上にマスク
を装着し、酸化錫、酸化インジウム、酸化インジウム錫
などの金属酸化物膜を被着したり、透明絶縁基板１の一
主面上に酸化錫、酸化インジウム、酸化インジウム錫な
どの金属酸化物膜を被着した後、レジスト・エツチング
処理したりして所定パターンに形成される。The transparent insulating substrate 1 is made of glass, translucent ceramic, or the like, and a transparent conductive film 2 is attached to a part of one main surface of the transparent insulating substrate 1. The transparent conductive film 2 is formed of a metal oxide film such as tin oxide, indium oxide, indium/tin oxide, etc., and has at least a laminate x on the main surface of the transparent insulating substrate.
, y to form a common film. in particular,
This transparent conductive film 2 can be formed by attaching a mask to one main surface of the transparent insulating substrate 1 and depositing a metal oxide film such as tin oxide, indium oxide, indium tin oxide, etc. After a metal oxide film such as tin oxide, indium oxide, indium tin oxide, etc. is deposited thereon, a resist etching process is performed to form a predetermined pattern.
第２図（ｂ）は透明絶縁基板１上の透明導電膜２上に非
晶質シリコンから成る非晶質半導体層３を形成した状態
の平面図である。非晶質半導体層３は光照射により正孔
、電子を発生するためにＰ−Ｉ−Ｎ接合されて、透明導
電膜２上からＰ層、１層、ＮＪ’５と順次被着されてい
る。具体的には、非晶質半導体層３はシリコン化合物ガ
ス、水素、不活性ガスなどのキャリアガスの混合ガスを
グロー放電分解することにより被着される。そして、Ｐ
層被着時にはボロンなどを含むＰ型ドーピングガスを混
合し、Ｎ層被着時にはリンなどを含むＮ型ドーピングガ
スを混合しされる。FIG. 2(b) is a plan view of a state in which an amorphous semiconductor layer 3 made of amorphous silicon is formed on a transparent conductive film 2 on a transparent insulating substrate 1. The amorphous semiconductor layer 3 is P-I-N bonded to generate holes and electrons by light irradiation, and the P layer, 1 layer, and NJ'5 are sequentially deposited on the transparent conductive film 2. . Specifically, the amorphous semiconductor layer 3 is deposited by glow discharge decomposition of a mixed gas of a carrier gas such as a silicon compound gas, hydrogen, and an inert gas. And P
When depositing a layer, a P-type doping gas containing boron or the like is mixed, and when depositing an N-layer, an N-type doping gas containing phosphorus or the like is mixed.
第２図（ｃ）は透明絶縁基板１の非晶質半導体層３上に
、金属電極４ｘ、４ｙを形成した状態の平面図である。FIG. 2(c) is a plan view of a state in which metal electrodes 4x and 4y are formed on the amorphous semiconductor layer 3 of the transparent insulating substrate 1.
金属電極４Ｘ、４ｙは、非晶質半導体層３上に所定間隔
を置いて形成され、所定電圧値のバイアス電圧が印加さ
れる。金属電極４Ｘ、４ｙは非晶質半導体層３とオーミ
ックコンタクト可能な金属、例えばニッケル、アルミニ
ウム、クロム、チタン等で形成される。具体的には、金
属電極４ｘ、４ｙは非晶質半導体層３上にマスクを装着
し、上述の金属を抵抗加熱法等の薄膜技法により被着し
たり、非晶質半導体層３上にアルミニウム、ニッケル、
チタン、クロム等の金属膜を薄膜技法により被着した後
、レジスト・エツチング処理したりして所定パターンに
形成される。この金属電極４の膜厚は０．１〜１．０μ
ｍである。。The metal electrodes 4X, 4y are formed on the amorphous semiconductor layer 3 at a predetermined interval, and a bias voltage of a predetermined voltage value is applied thereto. The metal electrodes 4X, 4y are made of a metal capable of making ohmic contact with the amorphous semiconductor layer 3, such as nickel, aluminum, chromium, titanium, or the like. Specifically, the metal electrodes 4x and 4y are formed by attaching a mask to the amorphous semiconductor layer 3 and depositing the above-mentioned metal by a thin film technique such as a resistance heating method, or by depositing aluminum on the amorphous semiconductor layer 3. ,nickel,
After a metal film such as titanium or chromium is deposited using a thin film technique, it is formed into a predetermined pattern by resist etching. The film thickness of this metal electrode 4 is 0.1 to 1.0μ
It is m. .
第２図（ｄ）は透明絶縁基板１及び金属電極４Ｘ、４ｙ
上に、絶縁膜５を形成した状態の平面図である。FIG. 2(d) shows the transparent insulating substrate 1 and metal electrodes 4X, 4y.
FIG. 3 is a plan view of a state in which an insulating film 5 is formed thereon.
絶縁膜５は、少なくとも金属電極４Ｘ、４ｙの一部を露
出して前記バイアス電圧が印加される開口部５１ｘ、５
１ｙが形成されるように、非晶質半導体層３及び金属電
極４Ｘ、４ｙ上に形成される。具体的には、エポキシ樹
脂、フェノール樹脂、アクリル樹脂等の絶縁樹脂がスク
リーン印刷法等の厚膜技法によって、膜厚１０〜１００
μｍで形成されたり、酸化シリコン、窒化シリコン等の
絶縁膜が薄膜技法によって形成される。The insulating film 5 has openings 51x, 5 to which the bias voltage is applied by exposing at least a part of the metal electrodes 4X, 4y.
1y is formed on the amorphous semiconductor layer 3 and the metal electrodes 4X and 4y. Specifically, insulating resins such as epoxy resins, phenolic resins, and acrylic resins are coated with a film thickness of 10 to 100 mm using thick film techniques such as screen printing.
Insulating films such as silicon oxide, silicon nitride, etc. may be formed using thin film techniques.
絶縁膜５は、少なくとも非晶質半導体層３に対応する部
分にのみ覆われているが、好ましくは、導電膜６や抵抗
膜７が基板１全体に形成される場合には、非晶質半導体
層３が被着されていない部分も形成する。これにより、
導電層６や抵抗層７が基板１に強固に接着されるからで
ある。さらに絶縁膜５の形状においても金属電極４Ｘ、
４ｙを強固に接着するために、金属電極４ｘ、４ｙの全
周囲の縁部を覆って形成することが望ましい。The insulating film 5 covers at least only a portion corresponding to the amorphous semiconductor layer 3, but preferably, when the conductive film 6 and the resistive film 7 are formed over the entire substrate 1, the amorphous semiconductor layer 3 is covered with the insulating film 5. The parts to which layer 3 is not applied are also formed. This results in
This is because the conductive layer 6 and the resistance layer 7 are firmly adhered to the substrate 1. Furthermore, regarding the shape of the insulating film 5, the metal electrode 4X,
In order to firmly adhere the metal electrodes 4y, it is desirable to form the metal electrodes 4x and 4y so as to cover their entire circumferential edges.
上述の構成の光センサー部は、Ｐ−Ｉ−Ｎ接合されたｖ
ｉＰｊ体ｘ、 ｙであるダイオードが抱き合わされた
構造になっており、導電層６や抵抗層７は第二電極であ
る金属電極４Ｘ、４ｙにのみ接続している構造である。The optical sensor section with the above configuration has a P-I-N junction.
It has a structure in which diodes, which are iPj bodies x and y, are tied together, and the conductive layer 6 and the resistance layer 7 are connected only to the metal electrodes 4X and 4y, which are the second electrodes.
そして、その動作は次の通りである。The operation is as follows.
前記開口部５１ｘ、５１ｙを通じ、積層体Ｘの金属電極
４ｘに＋、積層体ｙの金属電極４ｙに−のバイアス電圧
をかけておくと、積層体Ｘの非晶質半導体Ｂ３ｘには逆
バイアスが、１ａＦｊｊ体ｙの非晶質半導体層３ｙには
順バイアスがかかることになり、バイアス電圧の印加方
向に対して逆方向のフォトダイオード（積層体Ｘ）と順
方向のフォトダイオード（積層体ｙ）とが互いに抱き合
わされた構造となっている。 暗状態において、２つの
金属電極４Ｘ、４ｙ間は積層体Ｘの逆方向抵抗ＲＸと積
層体ｙの順方向抵抗ＲＹとの合成抵抗に対応する。When a positive bias voltage is applied to the metal electrode 4x of the stacked body X and a negative bias voltage is applied to the metal electrode 4y of the stacked body y through the openings 51x and 51y, a reverse bias is applied to the amorphous semiconductor B3x of the stacked body X. , a forward bias is applied to the amorphous semiconductor layer 3y of the 1aFjj body y, and the photodiode (laminate X) in the opposite direction and the photodiode (laminate y) in the forward direction with respect to the direction of application of the bias voltage. It has a structure in which the two are held together. In the dark state, the resistance between the two metal electrodes 4X and 4y corresponds to a combined resistance of the reverse resistance RX of the stacked body X and the forward resistance RY of the stacked body y.
上述の光センサー部に、基板１側から光照射される明状
態において、積層体Ｘ及び積層体ｙにも光起電力が生じ
るが互いに逆電位となり、相殺されるため、実際には、
光起電流は流れないものの、金属電極４Ｘに＋、金属電
極４ｙに−のバイアス電圧が印加されているので、積層
体Ｘには、逆方向光電流が発生する。なお、積層体ｙは
ダイオードの順方向抵抗から成る抵抗体となる。In the bright state where the above-mentioned photosensor section is irradiated with light from the substrate 1 side, photovoltaic forces are also generated in the laminates X and y, but they have opposite potentials and cancel each other out, so in reality,
Although no photovoltaic current flows, a reverse photocurrent is generated in the stacked body X because + bias voltage is applied to the metal electrode 4X and - bias voltage is applied to the metal electrode 4y. Note that the laminated body y becomes a resistor consisting of a forward resistance of a diode.
そして２つの金属電極４ｘ、４ｙ間の電流は、積層体Ｘ
の金属電極４Ｘ−非晶質半導体層３ＸのＮ層−■層−Ｐ
層−透明導電膜２−積屡体ｙの非晶質半導体層３ｙのＰ
層−■層−Ｎ層−金属電極４ｙにながれる。Then, the current between the two metal electrodes 4x and 4y flows through the laminate X
Metal electrode 4X-N layer of amorphous semiconductor layer 3X-■ layer-P
Layer - Transparent conductive film 2 - P of amorphous semiconductor layer 3y of laminate y
Layer - Layer - N layer - Metal electrode 4y.
ここで積層体ｙのダイオードの順方向抵抗から成る抵抗
体と等価になるためには、明状態でＰ−Ｉ−Ｎ接合した
非晶質半導体層から発生する開放電圧以上のバイアス電
圧を金属電極４Ｘ、４ｙ間に印加することが重要である
。Here, in order to become equivalent to the resistor consisting of the forward resistance of the diode in the stacked body y, it is necessary to apply a bias voltage higher than the open circuit voltage generated from the amorphous semiconductor layer connected to the P-I-N junction in the bright state to the metal electrode. It is important to apply it between 4X and 4y.
このため、光センサー部全体において、見かけ上光照射
により抵抗Ｒが下がったことになり、光導電型センサー
のようにはたらく。これにより照度−抵抗値特性がリニ
アとなり、γ値が約１となる。Therefore, in the entire optical sensor section, the resistance R appears to be lowered due to the light irradiation, and it functions like a photoconductive type sensor. As a result, the illuminance-resistance value characteristic becomes linear, and the γ value becomes approximately 1.
次に、回路部の構成について説明する。Next, the configuration of the circuit section will be explained.
回路部は、前記開口部５１ｘ、５１ｙに接続する導電層
６と抵抗層７とから構成されている。 第２図（ｅ）は
絶縁膜５より露出する開口部５１ｘ、５１ｙ部分、電圧
印加端子７１ｘ、７１ｙとなる部分及び比較器接続端子
７２ｘ、７２ｙとなる部分に対応する絶縁膜５上に分離
して導電Ｍ６を形成した状態の平面図である。The circuit section is composed of a conductive layer 6 and a resistance layer 7 connected to the openings 51x and 51y. FIG. 2(e) shows the parts separated on the insulating film 5 corresponding to the openings 51x and 51y exposed from the insulating film 5, the parts that become the voltage application terminals 71x and 71y, and the parts that become the comparator connection terminals 72x and 72y. FIG. 4 is a plan view of a state in which a conductive layer M6 is formed.
導電層６は絶縁膜５より露出する開口部５１ｘ、５１ｙ
と接続し、また上記各端子７１ｘ、７１ｙ、７２ｘ、７
２ｙとなるように絶縁膜５上に所定パターン形状に形成
される。具体的には、導電層６は製造の容易さからスク
リーン印刷法等の厚膜技法によって形勢され、導電層６
はエポキシ樹脂、フェノール樹脂、アクリル樹脂等の樹
脂溶液に、金属電極４Ｘ、４ｙと低抵抗で接合が可能な
金属、例えば銅、銀、ニッケル、錫等が多量に分散され
ている導電ペーストを用いる。特に前記絶縁膜５に樹脂
を用いた場合、この導電膜６と絶縁保護膜５との接着力
が向上するため好ましい。また製造上、絶縁保護膜５の
硬化工程と導電層６の硬化工程とを同時に行え得るから
である。The conductive layer 6 has openings 51x and 51y exposed from the insulating film 5.
and each of the above terminals 71x, 71y, 72x, 7
2y in a predetermined pattern shape on the insulating film 5. Specifically, the conductive layer 6 is formed by a thick film technique such as screen printing for ease of manufacturing.
uses a conductive paste in which a large amount of a metal such as copper, silver, nickel, tin, etc., which can be bonded to the metal electrodes 4X and 4y with low resistance, is dispersed in a resin solution such as epoxy resin, phenol resin, or acrylic resin. . In particular, it is preferable to use resin for the insulating film 5 because the adhesive strength between the conductive film 6 and the insulating protective film 5 is improved. Further, in manufacturing, the curing process of the insulating protective film 5 and the curing process of the conductive layer 6 can be performed simultaneously.
第２図（ｆ）は分離した導電層６と接続し、第３図に示
すホイートストンブリフジ回路の抵抗Ｒｂ、Ｒｃ、Ｒｄ
に対応する抵抗層７ｂ、 ７ｃ、 ７ｄを形成した
状態の平面図である。FIG. 2(f) shows the resistors Rb, Rc, and Rd of the Wheatstone Bridge circuit shown in FIG.
FIG. 3 is a plan view of a state in which resistance layers 7b, 7c, and 7d corresponding to the above are formed.
抵抗層７は導電層６と接続し、所定の回路部（本実施例
では第３図に示すホイートストンブリッジ回路）を形成
するように、絶縁膜５及び導電層６上に所定パターン形
状に形成される。第３図に示すホイートストンブリフジ
回路の抵抗Ｒｂ。The resistive layer 7 is connected to the conductive layer 6 and formed in a predetermined pattern shape on the insulating film 5 and the conductive layer 6 so as to form a predetermined circuit section (in this example, a Wheatstone bridge circuit shown in FIG. 3). Ru. Resistor Rb of the Wheatstone bridge circuit shown in FIG.
Ｒｃ、Ｒｄに対応して分離した導電層６間に夫々７ｂ、
７ｃ、７ｄが形成される。具体的には、抵抗層７は導電
層６同様に製造の容易さからスクリーン印刷法等の厚膜
技法によって形成され、抵抗層７はエポキシ樹脂、フェ
ノール樹脂、アクリル樹脂等の樹脂溶液に、例えば銅、
銀、ニッケル、錫等が所定量に分散されている抵抗ペー
ストを用いる。特にペーストの組成は導電ペーストと変
わらないが、分散されている金属量が異なる。例えば第
４図はフェノール樹脂中に銅を分散したとき、銅の含有
量と抵抗値との関係を示した特性図である。導電ペース
トと抵抗ペーストとを調合するときには、この特性関係
に考慮して分散される金属量を決定すればよい。7b, respectively between the conductive layers 6 separated corresponding to Rc and Rd,
7c and 7d are formed. Specifically, like the conductive layer 6, the resistive layer 7 is formed by a thick film technique such as screen printing for ease of manufacture, and the resistive layer 7 is formed by applying a resin solution such as epoxy resin, phenolic resin, or acrylic resin, for example. copper,
A resistive paste containing silver, nickel, tin, etc. dispersed in a predetermined amount is used. In particular, the composition of the paste is the same as that of the conductive paste, but the amount of dispersed metal is different. For example, FIG. 4 is a characteristic diagram showing the relationship between copper content and resistance value when copper is dispersed in phenolic resin. When preparing a conductive paste and a resistive paste, the amount of metal to be dispersed may be determined by taking this characteristic relationship into consideration.
第２図（ｇ）は絶縁膜５上に電圧印加端子７１Ｘ、７１
ｙ及び比較器接続端子７２ｘ、７２ｙを形成するように
絶縁保護膜８を形成した状態の平面図である。FIG. 2(g) shows voltage application terminals 71X and 71 on the insulating film 5.
FIG. 4 is a plan view of a state in which an insulating protective film 8 is formed to form comparator connection terminals 72x and 72y.
絶縁保護膜８は導電層６の一部を露出して電圧印加端子
７１ｘ、７１ｙ、比較器接続端子７２ｘ、７２ｙが形成
されるように、絶縁膜５、導電層６及び抵抗層７上に形
成される。具体的には、エポキシ樹脂、フェノール樹脂
、アクリル樹脂等の絶縁樹脂がスクリーン印刷法等の厚
膜技法によって、で形成されたり、酸化シリコン、窒化
シリコン等の絶縁膜が薄膜技法によって形成される。The insulating protective film 8 is formed on the insulating film 5, the conductive layer 6, and the resistive layer 7 so that a part of the conductive layer 6 is exposed and voltage application terminals 71x, 71y and comparator connection terminals 72x, 72y are formed. be done. Specifically, an insulating resin such as epoxy resin, phenol resin, or acrylic resin is formed using a thick film technique such as screen printing, or an insulating film such as silicon oxide or silicon nitride is formed using a thin film technique.
本発明の光電変換装置は、上述の構成により、光センサ
ー部の明抵抗値Ｒと抵抗層７ ｂ 、７ ｃ ＋７ｄと
がブリッジ回路となる。今、第３図に示すホイートスト
ンブリッジ回路と対応させると、光センサー部の抗値Ｒ
はＲａに、抵抗層７ｂはＲｂに、抵抗層７ｃはＲｃに、
抵抗層７ｄはＲｄに夫々対応することになる。In the photoelectric conversion device of the present invention, with the above-described configuration, the bright resistance value R of the photosensor portion and the resistance layers 7b, 7c+7d form a bridge circuit. Now, if we make it correspond to the Wheatstone bridge circuit shown in Fig. 3, the resistance value R of the optical sensor section will be
is Ra, the resistance layer 7b is Rb, the resistance layer 7c is Rc,
The resistance layers 7d correspond to Rd, respectively.
この光電変換装置の電圧印加端子７１ｘ、７１ｙに一定
電圧を印加し、比較器接続端子７２ｘ、７２ｙにオペア
ンプ等の比較器を接続する。これにより、光センサー部
の明抵抗値Ｒの変化により、光入射量がオペアンプ等の
比較器に定量的に検出できることになる。A constant voltage is applied to voltage application terminals 71x and 71y of this photoelectric conversion device, and a comparator such as an operational amplifier is connected to comparator connection terminals 72x and 72y. As a result, the amount of incident light can be quantitatively detected by a comparator such as an operational amplifier based on a change in the bright resistance value R of the optical sensor section.
本発明の光電変換装置の応用例として、例えばカメラ用
の絞り機構においては、カメラの絞りと連動する光セン
サー部の光入射量制御手段をオペアンプ等の比較器の出
力で制御するように構成する。As an application example of the photoelectric conversion device of the present invention, for example, in an aperture mechanism for a camera, the light incident amount control means of a photosensor section linked to the aperture of the camera is configured to be controlled by the output of a comparator such as an operational amplifier. .
電圧印加端子７１ｘ、７１ｙに一定電圧を印加し、比較
器接続端子７２ｘ、７２ｙに流れる電流をオペアンプ等
の比較器で検出して、これがＯになるように光センサー
部への光入射量を制御する。光入射量制御手段の動作に
より、連動するカメラの絞りを適正量に制御できること
になる。A constant voltage is applied to the voltage application terminals 71x and 71y, the current flowing through the comparator connection terminals 72x and 72y is detected by a comparator such as an operational amplifier, and the amount of light incident on the optical sensor section is controlled so that this becomes O. do. By the operation of the light incident amount control means, the aperture of the interlocked camera can be controlled to an appropriate amount.
尚、上述の実施例では回路部としてホイートストンブリ
ッジ回路を形成したが、このホイートストンブリッジ回
路に限らず、外部の接続機器の規格に合致するように、
電圧降下回路や電流制限回路を形成してもよい。また光
センサー部においてもダイオードが逆方向に抱き合わせ
た構造の他に第一電極のである透明導電膜と第二電極の
である金属電極とに夫々導電層や抵抗層を接続するフォ
トダイオード型の光センサーを用いても構わないし、基
板の平面方向で非晶質半導体層を金属電極の第一電極、
第二電極で挟持したプレーナー型の光センサーを用いて
も構わない。In the above embodiment, a Wheatstone bridge circuit was formed as the circuit section, but it is not limited to this Wheatstone bridge circuit.In order to meet the standards of external connected equipment,
A voltage drop circuit or a current limit circuit may also be formed. In addition, in the optical sensor part, in addition to the structure in which diodes are tied together in opposite directions, there is also a photodiode type optical sensor in which a conductive layer and a resistive layer are connected to a transparent conductive film as a first electrode and a metal electrode as a second electrode, respectively. Alternatively, the first electrode of the metal electrode, the amorphous semiconductor layer in the plane direction of the substrate,
A planar optical sensor sandwiched between second electrodes may also be used.
さらに、絶縁保護膜から露出している電圧印加端子、比
較器接続端子に外部リード線を半田付は容易にするため
や、電子部品として直接回路基板に実装できるチップ部
品として使用するために光電変換装置全体を溶解した半
田浴に浸漬して、該端子に半田層を形成することが極め
て有益である。Furthermore, it is possible to easily solder external lead wires to the voltage application terminals and comparator connection terminals exposed from the insulating protective film, or to use photoelectric conversion as chip components that can be directly mounted on circuit boards as electronic components. It is highly advantageous to immerse the entire device in a molten solder bath to form a solder layer on the terminals.
以上のように、本発明によれば、透明基板上に、第１の
電極及び第２の電極で非晶質半導体層を挟持した光セン
サー部と、該光センサー部の第１の電極又は第２の電極
の一部を露出するように開口部を有する絶縁膜を形成し
、該絶縁膜上に第１の電極又は第２の電極と接続する導
電パターン及び抵抗パターン等からなる回路部とを形成
したため、外部制御のための回路や制御機器が極めて筒
略化でき、機能の向上及び実装機器の省スペース化が可
能となる。As described above, according to the present invention, there is provided a photosensor section in which an amorphous semiconductor layer is sandwiched between a first electrode and a second electrode on a transparent substrate, and a first electrode or a first electrode of the photosensor section. An insulating film having an opening is formed to expose a part of the second electrode, and a circuit section consisting of a conductive pattern, a resistive pattern, etc. connected to the first electrode or the second electrode is formed on the insulating film. Because of this structure, the circuits and control equipment for external control can be extremely simplified, and the functionality can be improved and the mounting equipment can save space.
また、薄膜技法と厚膜技法とを駆使して光センサー部の
一部又は全部上に回路部を形成できるので、基板に対す
る実装効率が向上し、光センサー部にマツチする回路部
を確実に形成できる。In addition, since the circuit section can be formed on part or all of the optical sensor section by making full use of thin-film and thick-film techniques, the mounting efficiency on the board is improved, and the circuit section that matches the optical sensor section can be reliably formed. can.
第１図は本発明の光電変換装置の構造を示す断面図であ
る。第２図（ａ）〜（ｇ）は本発明の光電変換装置の構
造をより明確化する各工程の平面図である
第３図はホイートストンブリフジ回路を示す回路図であ
る。
第４図はペーストの組成において樹脂中に分散し銅の含
有量と抵抗値との関係を示した特性図である。
■・・・・・・・・・・透明絶縁基板
２・・・・・・・・・・透明導電膜
３・・・・・・・・・・非晶質半導体層４ｘ、４ｙ・・
・・・・金属電極
５・・・・・・・・・・絶縁膜
６・・・・・・・・・・導電層
７．７ｂ、７ｃ、７ｄ・・−抵抗層
８・・・・・・・・・ 絶縁保護膜FIG. 1 is a sectional view showing the structure of a photoelectric conversion device of the present invention. FIGS. 2(a) to 2(g) are plan views of each step to further clarify the structure of the photoelectric conversion device of the present invention. FIG. 3 is a circuit diagram showing a Wheatstone bridge circuit. FIG. 4 is a characteristic diagram showing the relationship between the content of copper dispersed in the resin and the resistance value in the composition of the paste. ■...Transparent insulating substrate 2...Transparent conductive film 3...Amorphous semiconductor layers 4x, 4y...
...Metal electrode 5...Insulating film 6...Conductive layer 7.7b, 7c, 7d...-Resistance layer 8...・・・ Insulating protective film
Claims (1)
導体層を挟持した光センサー部と、該光センサー部の第
１の電極及び又は第２の電極の一部を露出するように開
口部を有する絶縁膜を形成し、該絶縁膜上に第１の電極
及び又は第２の電極と接続する導電パターン及び抵抗パ
ターン等から成る回路部とを形成したことを特徴とする
光電変換装置。A photosensor section in which an amorphous semiconductor layer is sandwiched between a first electrode and a second electrode is provided on a transparent substrate, and a part of the first electrode and/or second electrode of the photosensor section is exposed. A photoelectric conversion characterized in that an insulating film having an opening is formed on the insulating film, and a circuit section consisting of a conductive pattern, a resistive pattern, etc. connected to the first electrode and/or the second electrode is formed on the insulating film. Device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63133787A JP2761730B2 (en) | 1988-05-31 | 1988-05-31 | Photoelectric conversion device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63133787A JP2761730B2 (en) | 1988-05-31 | 1988-05-31 | Photoelectric conversion device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01302856A true JPH01302856A (en) | 1989-12-06 |
| JP2761730B2 JP2761730B2 (en) | 1998-06-04 |
Family
ID=15112997
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63133787A Expired - Fee Related JP2761730B2 (en) | 1988-05-31 | 1988-05-31 | Photoelectric conversion device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2761730B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04271515A (en) * | 1991-02-26 | 1992-09-28 | Nec Corp | Solid-state relay |
| US6732345B2 (en) * | 1999-12-21 | 2004-05-04 | Nec Electronics Corporation | Layout method using created via cell data in automated layout |
| US10957810B2 (en) | 2017-03-10 | 2021-03-23 | Mitsubishi Electric Corporation | Electromagnetic wave detector, electromagnetic wave detector array, and electromagnetic wave detection method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57117282A (en) * | 1981-01-13 | 1982-07-21 | Ricoh Co Ltd | Equally multiplying image sensor |
| JPS61198670A (en) * | 1985-02-27 | 1986-09-03 | Fujitsu Ltd | Manufacture of amorphous image sensor |
| JPS63306655A (en) * | 1987-06-08 | 1988-12-14 | Matsushita Electric Ind Co Ltd | Photosensor and method of driving same |
-
1988
- 1988-05-31 JP JP63133787A patent/JP2761730B2/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57117282A (en) * | 1981-01-13 | 1982-07-21 | Ricoh Co Ltd | Equally multiplying image sensor |
| JPS61198670A (en) * | 1985-02-27 | 1986-09-03 | Fujitsu Ltd | Manufacture of amorphous image sensor |
| JPS63306655A (en) * | 1987-06-08 | 1988-12-14 | Matsushita Electric Ind Co Ltd | Photosensor and method of driving same |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04271515A (en) * | 1991-02-26 | 1992-09-28 | Nec Corp | Solid-state relay |
| US6732345B2 (en) * | 1999-12-21 | 2004-05-04 | Nec Electronics Corporation | Layout method using created via cell data in automated layout |
| US7032205B2 (en) | 1999-12-21 | 2006-04-18 | Nec Electronics Corporation | Layout and wiring system and recording medium recording the wiring method |
| US10957810B2 (en) | 2017-03-10 | 2021-03-23 | Mitsubishi Electric Corporation | Electromagnetic wave detector, electromagnetic wave detector array, and electromagnetic wave detection method |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2761730B2 (en) | 1998-06-04 |
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