JP2764297B2 - Photoelectric conversion device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to temperature compensation of open-circuit voltage in a photodiode type photoelectric conversion device.

[Background of the Invention]

The applicant has previously shown in FIG. 5 an inexpensive photoelectric conversion device in which the output in which the open-circuit voltage changes with respect to the change in the amount of incident light has linearity over a wide illuminance range, has a small temperature coefficient, and is inexpensive. A photoelectric conversion device was proposed (Japanese Patent Application No. 63-251365).

51 is a transparent substrate, 52 is a transparent conductive film, 53a and 53b are PI-
N-junction amorphous semiconductor layers, 54a and 54b are metal electrodes, 55 is a light shield, 56 is a bypass resistance component (hereinafter referred to as resistance),
57 is a bias voltage power supply.

On a transparent substrate 51, laminated bodies a and b composed of a transparent conductive film 52, PIN-bonded amorphous semiconductor layers 53a and 53b, and metal electrodes 54a and 54b are formed. And the two laminates a and b
Are formed in such a manner that the bonding directions are connected to each other via the transparent conductive film 52, and a light-shielding body 55 that blocks the incidence of ambient light is formed on one of the laminates a. And
A bias voltage source 57 is connected so that a bias voltage is applied between the transparent conductive film 52 and the metal electrode 54a of the laminate a having the light shielding body 55 with a resistance component 56 interposed therebetween.

 FIG. 6 is an equivalent electric circuit diagram.

In the electric circuit diagram, given the closed circuit of the applied voltage V _b of the laminate a and the resistance component 56 and a bias voltage source 57 having a light-shielding member 55 (the left side in the figure), when the current flowing through the closed circuit is i, _{V b = i · R + (} nKT / q) · {1n (i / I s +1)} - become.

Here, n: intrinsic coefficient (diode value) determined by the amorphous semiconductor layer of the laminated body R: resistance value of the resistance component 6 K: Boltzmann constant T: absolute temperature q: electron charge I _s : saturation current of the laminated body It is.

When the voltage at the point x and V _x, a V _x = i · R, from the _{formula, V x = i · R =} V b - (nKT / q) · {1n (i / I s +1)} −
Becomes

V _out is the sum of V _x and the open circuit voltage Voc of the stacked body b.

The open-circuit voltage Voc of the laminate b is Voc = (nKT / q) ·
{1n (I _p / I _s +1)} − Here, I _p is a photocurrent of the stacked body b.

That is, the output voltage V _out from the formula and _{formula, V out = V b -nKT /} q · 1n (i / I s + 1) + nKT / q · 1n (I p / I s +1) - become.

In the formula, I _s is to change exponentially with respect to changes in temperature, the open-circuit voltage Voc is inversely proportional to temperature, the temperature coefficient exhibits a value of about -2.7mW / ℃. Here, in the equation, the second and third terms have components of i / I _s and I _p / I _s , respectively. Although I _s changes exponentially with temperature change, Since the signs of the third term are opposite,
Compared to the open voltage Voc alone will be variation in I _s is somewhat offset, temperature coefficient of the output voltage V _out decreases.

However, even if the diode value n determined by the amorphous semiconductor layer of the stacked body is formed in the same process, actually, the diode value n _a of the amorphous semiconductor layer 53a of the stacked body _a and the stacked body b
Slight difference in the diode value n _b amorphous semiconductor layer 53b results in. For this reason, various characteristics vary between the laminate a and the laminate b. The cause of the variation in the diode values n _a and n _b is that the components of the light shielding body 55 provided in the stacked body a, mainly the metal, diffuse into the amorphous semiconductor layer 53a. As an example, although the diode value n _b of a laminate b of the light receiving portion is 1.5, the diode value n _a of the laminate A having a light shield 55, 1.
It varies between 0 and 1.5.

In the equation, the current i in the second term is determined by the voltage applied to the laminated body a having the fixed resistor R and the light shielding body 55, and is constant with respect to the change in the amount of incident light. The current i _p of the third term is the photocurrent of the laminate b generated by light incident varies gamma = 1 in accordance with a change in incident light amount.
Here, γ is the photocurrent I _x at XLux and the photocurrent I _y at Ylux.
When a is expressed by _{log (I x / I y)} / log (X / Y).

Actually, it ratio of i / I _s and I _p / I _s varies slightly as a whole the temperature coefficient of the photoelectric conversion device for changing the amount of incident light. For example, the resistance value R of the resistance component 56
= 1.5 MΩ, bias voltage V _b = 1.0 V, effective area of laminated bodies a and b (area of amorphous semiconductor layer sandwiched between transparent conductive film and metal electrode) = 1 cm ² , temperature at 0.1 Lux Coefficient is -0.64
at mV / ° C., the temperature coefficient at 10 ⁵ Lux was + 1.14mV / ℃.
During this time, the temperature coefficient monotonically increases. That is, although the above-mentioned photoelectric conversion device can minimize the fluctuation of the output due to the change of the temperature, the temperature coefficient largely depends on the illuminance, and needs improvement in practical use.

(Object of the present invention)

The present invention has been made in view of the above background,
It is an object of the present invention to provide a photoelectric conversion device with improved accuracy by suppressing a change in a temperature coefficient due to a change in the amount of incident light.

[Technical means to achieve the purpose]

According to the present invention, there is provided, according to the present invention, a two-layer structure in which an amorphous semiconductor layer having a PIN junction and a metal electrode are superimposed on a transparent substrate having a transparent conductive film applied thereon. A body is formed, and the joining directions are connected to each other in the opposite direction via the transparent conductive film, and a light-shielding body is formed on one laminate, and between the transparent conductive film and the metal electrode of the one laminate, In a photoelectric conversion device provided with a power supply for applying a constant bias voltage and a bypass resistance component, a photoelectric conversion device in which the bypass resistance component is formed by an amorphous semiconductor layer sandwiched between one stacked body and the other stacked body is provided. Provided.

〔Example〕

Hereinafter, a photoelectric conversion device of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a sectional structural view showing a structure of a photoelectric conversion device according to the present invention, and FIG. 2 is an equivalent electric circuit diagram of the photoelectric conversion device shown in FIG.

In the photoelectric conversion device of the present invention, on a transparent substrate 1, a laminate a, b composed of a transparent conductive film 2, an amorphous semiconductor layer 3 joined by a PIN junction, and metal electrodes 4a, 4b is formed. The two laminates a and b are formed so that the joining methods are connected in opposite directions via the transparent conductive film 2 and one of the laminates a is a light-shielding member that blocks the incidence of ambient light. The body 5 is formed. Further, an I-type amorphous silicon semiconductor layer 7 is interposed between at least the P-N-joined amorphous semiconductor layer 3 and the light-shielding body 5 of the laminate a, and as shown in FIG. Metal electrode of laminate a having conductive film 2 and light shield 5
It is configured such that a bias voltage is applied with a resistance component 6 interposed between the bias voltage and the bias voltage 4a.

The transparent substrate 1 is made of glass, translucent ceramic, or the like, and a transparent conductive film 2 is attached to one main surface of the transparent substrate 1.

The transparent conductive film 2 is formed of a metal oxide film such as tin oxide, indium oxide, or indium tin oxide, and is formed so as to be a film common to at least the stacked bodies a and b on one main surface of the transparent substrate 1. . Specifically, after mounting a mask on one main surface of the transparent substrate 1, the above-described metal oxide film is deposited,
It is formed by applying a metal oxide film on one main surface of the transparent substrate 1 and then performing a photo-etching process.

The amorphous semiconductor layer 3 has a first conductivity type, a second conductivity type, and a third conductivity type joined to at least portions where the metal electrodes 4a and 4b are formed to become the laminates a and b, that is, P-type. An IN junction is formed. Specifically, the amorphous semiconductor layer 3 is made of amorphous silicon or the like deposited by a plasma CVD method or a photo CVD method in which a silicon compound gas such as silane or disilane is decomposed by glow discharge. The silane gas is formed with a reaction gas in which a P-type doping gas such as diborane is mixed, the I layer is formed with silane gas as a reaction gas, and the N layer is formed with a reaction gas in which silane gas is mixed with an N-type doping gas such as phosphine. .

The metal electrodes 4a and 4b are provided on the amorphous semiconductor layer 3 at predetermined intervals,
For example, it is formed at a sufficient distance through the amorphous semiconductor layer 3 between the metal electrodes 4a and 4b so that no leak current occurs. Specifically, the metal electrodes 4a and 4b are
After a mask is mounted thereon and a metal such as nickel, aluminum, titanium and chromium is deposited, or a metal film such as nickel, aluminum, titanium and chromium is deposited on the amorphous semiconductor layer 3 and then resist etching is performed. It is formed into a predetermined pattern by processing. By this step, the transparent conductive film 2
Are formed as a common film.

During the resist etching of the metal electrodes 4a, 4b, the metal electrodes 4a, 4b and the metal electrodes 4a, 4b are immersed in a solution for etching the amorphous semiconductor layer 3, or the metal electrodes 4a, 4b are successively etched after the resist etching. Non-invasive, amorphous semiconductor layer 3
By immersing the amorphous semiconductor layer 3 in a solution in which only the metal electrodes 4a and 4b are not formed, a part (the N layer in the drawing) or all of the amorphous semiconductor layer 3 where the metal electrodes 4a and 4b are not formed may be removed.

The light-shielding body 5 corresponds to one of the laminates a and b, for example, the laminate a so that light from the surroundings is not irradiated to the amorphous semiconductor layer 3 of the laminate a. Formed between the transparent conductive film 2 and the amorphous semiconductor layer 3.
Specifically, after the above-described transparent conductive film 2 is formed, the light shielding body 5 is formed in a portion to be the stacked body a. As a method for forming the light-shielding member 5, a light-opaque resin or an inorganic material is formed by a screen printing method, or a metal such as nickel, chromium, titanium, or nickel-chromium is formed to a thickness of 500 mm or more by a physical vapor deposition method such as sputtering. Form. Thus, ambient light can be completely blocked. In particular, when the latter metal is applied, the transparent conductive film 2 can act as a buffer substance, so that the metal layer of the light shield 5 can be prevented from peeling off the substrate.

The I-type amorphous silicon semiconductor layer 7 is formed at least between the P-N-joined amorphous semiconductor layer 3 of the stacked body a and the light shielding body 5. In the figure, PI is applied regardless of the laminates a and b.
It is formed below the -N-junction amorphous semiconductor layer 3. Specifically, in the manufacturing process of the amorphous semiconductor layer 3, prior to the amorphous semiconductor layer 3, the silicon compound gas such as silane or disilane is covered by a plasma CVD method or a photo CVD method that decomposes by a glow discharge. Be worn. The amorphous silicon semiconductor layer 7 blocks a metal component that diffuses from the metal layer of the light-shielding body 5 to the P-I-N junctioned amorphous semiconductor layer 3 side. An adverse effect of the layer 3 (variation in n value due to deterioration of the film) is prevented. In order to cut off the metal components, a film thickness of at least 50 ° is required.

The resistance component 6 is interposed between the external bias voltage and the transparent conductive film 2 when the external bias voltage applies a bias voltage between the metal electrode 4a of the multilayer body a and the transparent conductive film 2 as shown in FIG. Is formed in the amorphous semiconductor layer 3 between the stacked bodies a and b. That is, the resistance component 6 is the I-type amorphous silicon semiconductor layer 7 and the amorphous semiconductor layer 3 composed of an IN junction sandwiched between the transparent conductive film 2 and the metal terminal 8, and light enters from the substrate side. As a result, the resistance component changes.
The resistance component 6 sandwiched between the transparent conductive film 2 and the metal electrode 8
An I-N junction is used, and only the P layer of the amorphous semiconductor layer 3 or both the I-type amorphous silicon semiconductor layer 7 and the P layer of the amorphous semiconductor layer 3 are formed in a predetermined pattern. Specifically, the P layer of the amorphous semiconductor layer 3 is formed by mounting a mask on the I-type amorphous silicon
After applying the P-type amorphous semiconductor layer 3 on the I-type amorphous silicon semiconductor layer 7 by applying a resist etching process or the like, It is formed in a predetermined pattern together with the amorphous silicon semiconductor layer 7. By this step, the P layer or the P layer and the I layer 7 are formed only in the portion other than the resistance component 6 sandwiched between the transparent conductive film 2 and the metal electrode 8.
Is formed, and then an I-layer and an N-layer amorphous semiconductor layer 3 are sequentially deposited by a method such as the plasma CVD method or the optical CVD method described above.

The contact between the transparent conductive film or general metal and the I-type amorphous silicon semiconductor layer 7 usually forms a Schottky barrier and exhibits rectification characteristics. Before the deposition, a plasma treatment or the like is performed using hydrogen or a mixture of phosphine having a very low concentration and hydrogen. The metal terminals 8 are formed of the same material such as nickel, aluminum, titanium, and chromium when the metal electrodes 4a and 4b of the two laminates a and b are formed.

The application of the bias voltage will be described based on the photoelectric conversion device configured as described above.

The P-I-N junction diode of the stacked body a is connected to the DC bias voltage 9 applied in the forward direction and the resistance component 6.

Now, if a bias voltage is applied to the laminate a in the forward direction with − to the metal electrode 4a of the laminate a and + to the transparent conductive film 2 via the resistance component 6 between the transparent conductive film 2, the output (point A ) V _out
The sum of the V _x as described above and the open-circuit voltage Voc of the laminate b, the output voltage V _out, from the above _{equation, V out = V b - (} nKT / q) · {1n (i / I S +1 ) a} + (nKT / q) · {1n (I p / I s +1)}.

The terms relating to the temperature T in the above equation are the second term and the third term. Since the signs are opposite to each other, even if the ambient temperature increases in the bright state, the change in the open-circuit voltage of the laminate b with respect to the temperature T temperature coefficient of frequency is higher than the variation of the voltage V _x corresponding to the variation with respect to the temperature T of the voltage generated at both ends of the stack a, it is somewhat offset, temperature coefficient open-circuit voltage of the laminate b eventually output V _out Smaller than.

According to the present invention, in the amorphous semiconductor layer 3 of the photoelectric conversion device, the resistance component 6 whose resistivity changes due to a change in light incidence is provided.
Is formed.

That is, V _out = V _b − (nKT / q) · ｛1n (i / I _s +
In 1)} + (nKT / q ) · {1n (I p / I s +1)}, the current i in the second term is determined by the resistance value R and the bias voltage V _b to a change in the resistance component 6. That is, the resistance value R of the current i decreases due to an increase in the amount of incident light, and the current i increases under predetermined characteristics.

Also, the current _Ip in the third term is a photocurrent generated by light incidence, and changes at γ = 1 according to a change in the amount of incident light.

That is, since the resistance component 6 is formed in the amorphous semiconductor layer 3 such that the resistance value decreases with respect to the change in the incident light amount, the current i in the second term is smaller than that of the conventional photoelectric conversion device in which the current i is fixed. may difference ratio between i / I _s and I _p / I _s with respect to the increase in the light incidence is small, it is possible to follow correct temperature coefficient with respect to the amount of incident light.

Further, the ratio of i / I _s and I _p / I _s in light intensity that by the γ value of the resistance value R in the optimum value can be adjusted as needed.

In order to increase i in proportion to the amount of incident light, the amount of incident light and the resistance value R of the resistance component 6 need only be inversely proportional. Since I _p is γ = 1, the resistance value R needs to be γ <1. When γ = 1, i / _Is and _Ip / _Is
Is always constant, and an output change corresponding to a change in light amount cannot be obtained.

The present inventors set the resistance component 6 to a fixed resistance value R = 1.5 MΩ.
(Γ = 0), the resistance components (γ = 0.4 and γ = 0.8) formed in the amorphous semiconductor layer 3 are set to 0.1 Lux and 10 ⁵ Lux, respectively.
The output voltage V _out (V) and the temperature coefficient (mV / ° C.) at that time were examined. The results are shown in the table below.

The resistance component 6 is set so that the resistance value becomes R = 1.5 MΩ at 0.1 Lux, the bias voltage V _b = 1.0 V, and the laminated bodies a and b
Was performed at an effective area of 1 cm ² and a temperature of 25 ° C.

As described above, when the resistance component 6 is set to change with respect to the incident light amount as in the present embodiment, the output voltage change with respect to the change in the incident light amount becomes small, but the dependency of the temperature coefficient on the incident light amount is minimized. it can. In other words, the temperature coefficient can be reduced even in a wide range of the incident light amount of 0.1 to 10 ⁵ Lux, so that a photoelectric conversion device capable of performing more accurate temperature compensation over a wide range can be achieved.

Further, when the amorphous silicon semiconductor layer 7 is interposed as in the structure of the photoelectric conversion device of the present invention, particularly, the laminates a and b
And there is no large difference in the n values of.

3 (a) and 3 (b) show dark-time voltage-current characteristics of the laminates a and b constituting the photoelectric conversion device of the present invention, and FIG. 3 (c) shows the amorphous silicon semiconductor layer 7 7 shows dark-time voltage-current characteristics of the stacked body a having the light shielding body 55 in the case where no light is interposed. Note that the line f in the figure indicates forward characteristics, and the line r indicates reverse characteristics.

FIG. 3A shows that the amorphous silicon semiconductor layer 7 has a thickness of 300 °.
Is the characteristic of the laminated body a set to
^-10 A / cm ² , there is no significant difference from FIG. 3 (b). At this time, the n value of the laminate a was about 1.484, and the n value of the laminate b was about 1.524.

That is, there is no large difference in the n values of the second and third terms of the equation, error caused from the difference between the second and third terms of i / I _s and I _p / I _s can be minimized. In addition, characteristic variations between solids are reduced.

On the other hand, when comparing the characteristics (FIGS. 3A and 3C) depending on the presence / absence of the amorphous silicon semiconductor layer 7 in the laminated body a having no incident light, the amorphous silicon semiconductor layer 7 The dark current of the laminated body a using is as small as one digit. The n value of the laminate a at this time is about 1.484 (FIG. 3A) as described above. Incidentally, the n value of the conventional laminated body in which the light shielding body 55 and the amorphous semiconductor 53 are in direct contact is about 1.088 (FIG. 3 (c)).
And about 50% smaller, and the variation among a plurality of laminates increases.

FIG. 4 is a sectional view showing another embodiment of the photoelectric conversion device of the present invention. The same parts as those in FIG. 1 are denoted by the same reference numerals, and a detailed description thereof will be omitted.

In the present embodiment, as in FIG.
This is a photoelectric conversion device which is formed of the amorphous semiconductor layer 3 capable of entering light from the transparent substrate 1 between the transparent substrate 1 and the stacked body b, and in which a second metal terminal 82 is formed close to the metal terminal 81. Thus, the resistance component 6 is not in the thickness direction of the amorphous semiconductor layer 3 but in the surface direction of the amorphous semiconductor layer 3 sandwiched between the metal terminals 81 and 82.

〔The invention's effect〕

As described above, according to the present invention, two stacked bodies formed by superimposing a PIN-bonded amorphous semiconductor layer and a metal electrode are formed on a transparent substrate on which a transparent conductive film is applied. A power source connected in the opposite direction through the transparent conductive film to form a light-shielding body in one of the laminates and to apply a constant bias voltage between the transparent conductive film and the metal electrode of the one laminate; In the photoelectric conversion device provided with the bypass resistance component and the resistance component, the resistance component is formed by the amorphous semiconductor layer sandwiched between both the laminates and formed so as to be able to receive light. Because the value follows, even if the incident light amount range increases, the temperature coefficient can be minimized,
A photoelectric conversion device with improved accuracy of temperature compensation is achieved.

In addition, since an I-type amorphous silicon semiconductor layer is interposed between the transparent conductive film and the amorphous semiconductor layer having a PIN junction, impurities such as metal atoms diffused from the substrate side can be reduced. -Diffusion into the amorphous silicon semiconductor layer with the IN junction can be prevented, and therefore, the variation in the n value of the stacked body on the light receiving unit side and the light shielding unit side is minimized, and the output error between individuals due to a change in ambient temperature is eliminated. As a result, a photoelectric conversion device with improved temperature compensation accuracy is achieved.

[Brief description of the drawings]

FIG. 1 is a sectional view showing the structure of the photoelectric conversion device according to the present invention. FIG. 2 is an equivalent electric circuit diagram of the photoelectric conversion device shown in FIG. 3 (a) and 3 (b) are dark-time voltage-current characteristics diagrams of the laminates a and b constituting the photoelectric conversion device of the present invention, and FIG. 3 (c) is an amorphous silicon semiconductor layer. FIG. 4 is a dark-time voltage-current characteristic diagram of a laminated body having a light-shielding body when no light is interposed. FIG. 4 is a sectional view showing another embodiment of the photoelectric conversion device of the present invention. FIG. 5 is a sectional view showing the structure of a conventional photoelectric conversion device, and FIG. 6 is an equivalent electric circuit diagram of the photoelectric conversion device shown in FIG. DESCRIPTION OF SYMBOLS 1 ... Transparent substrate 2 ... Transparent conductive film 3 ... Amorphous semiconductor layer 4a, 4b ... Metal electrode 5 ... Light shielding layer 6 ... Resistance component 7 ... I-type amorphous silicon semiconductor layer

────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Seiya Tanaka 6 16-1 Haseno, Jabizo-cho, Yokaichi City, Shiga Prefecture Examiner in Shiga Yokaichi Plant, Kyocera Corporation Seiji Hamada (56) JP-A-59-76461 (JP, A) JP-A-59-39077 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H01L 31/10-31/119

Claims (1)

(57) [Claims] 1. A method according to claim 1, wherein a transparent conductive film is provided on a transparent substrate.
Two stacked bodies are formed by superposing an IN-bonded amorphous semiconductor layer and a metal electrode. The two stacked bodies are connected to each other through the transparent conductive film in a direction opposite to each other. A light-shielding body is formed in the photoelectric conversion device, and a power supply for applying a constant bias voltage and a bypass resistance component are provided between the transparent conductive film and the metal electrode of one of the laminates. A photoelectric conversion device formed using an amorphous semiconductor layer sandwiched between a stacked body and another stacked body.