JPH0221664B2 - - Google Patents

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Publication number
JPH0221664B2
JPH0221664B2 JP58193635A JP19363583A JPH0221664B2 JP H0221664 B2 JPH0221664 B2 JP H0221664B2 JP 58193635 A JP58193635 A JP 58193635A JP 19363583 A JP19363583 A JP 19363583A JP H0221664 B2 JPH0221664 B2 JP H0221664B2
Authority
JP
Japan
Prior art keywords
electrode
photoelectric conversion
thin film
film
conversion element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58193635A
Other languages
Japanese (ja)
Other versions
JPS6085578A (en
Inventor
Mario Fuse
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujifilm Business Innovation Corp
Original Assignee
Fuji Xerox Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Xerox Co Ltd filed Critical Fuji Xerox Co Ltd
Priority to JP58193635A priority Critical patent/JPS6085578A/en
Publication of JPS6085578A publication Critical patent/JPS6085578A/en
Publication of JPH0221664B2 publication Critical patent/JPH0221664B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/208Particular post-treatment of the devices, e.g. annealing, short-circuit elimination
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Sustainable Development (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Energy (AREA)
  • Manufacturing & Machinery (AREA)
  • Light Receiving Elements (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Photovoltaic Devices (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、薄膜光電変換素子の製造方法に係
り、特に、サンドイツチ型の薄膜光電変換素子の
製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a thin film photoelectric conversion element, and particularly to a method for manufacturing a Sanderch-type thin film photoelectric conversion element.

〔従来技術〕[Prior art]

最近、太陽電池やイメージセンサ等の大面積
化、長尺化に伴い、大面積にわたつて堆積可能な
アモルフアスシリコン等の光電変換薄膜を用いた
薄膜光電変換素子の開発が進められている。
BACKGROUND ART Recently, as solar cells, image sensors, etc. have become larger in area and longer in length, development of thin film photoelectric conversion elements using photoelectric conversion thin films such as amorphous silicon that can be deposited over large areas has been progressing.

特に、イメージセンサの場合、原稿と同一幅を
もつセンサ部を形成することにより、1対1結像
が可能となり、原稿とセンサ部とを密着させるこ
とができると共に、縮小光学系が不要となること
により、原稿読み取り部の小型化が容易に可能と
なる。
In particular, in the case of an image sensor, by forming a sensor section with the same width as the document, one-to-one imaging becomes possible, the document and the sensor section can be brought into close contact, and a reduction optical system is not required. This makes it possible to easily downsize the document reading section.

薄膜光電変換素子は、構造的に見て、第1電極
と第2電極とによつて光導電体層をはさんだサン
ドイツチ構造と、光導電体層上に対向電極を形成
したプレーナ構造とに大別されるが、センサ部の
高密度化の観点からみて、通常はサンドイツチ構
造のものを使用することが多い。
In terms of structure, thin film photoelectric conversion elements have two major structures: a sandwich structure in which a photoconductor layer is sandwiched between a first electrode and a second electrode, and a planar structure in which a counter electrode is formed on the photoconductor layer. However, from the viewpoint of increasing the density of the sensor section, a sandwich structure is usually used.

ところで、サンドイツチ構造の光電変換素子
は、例えばセラミツク基板上に着膜形成された複
数個のクロム電極(第1電極)と透光性の酸化イ
ンジウム錫(ITO)電極(第2電極)とによつて
光導電体層としてのアモルフアスシリコン層を挾
んだ構造をとつている。このアモルフアスシリコ
ン層は、モノシランガス(SiH4)のグロー放電
分解法等によつてクロム電極上に堆積せしめられ
るわけであるが、堆積されるべき面積が大きくな
ればなるほど、全面にわたつて均一なアモルフア
スシリコン層を形成するのは難しく、ピンホール
の発生をまぬがれ得ないことがある。これは、製
造装置内のダストが基板表面に付着すること等の
外因の他に、薄膜成長のメカンズムと関係する内
因をもつことが多いためである。
By the way, a photoelectric conversion element with a sandwich structure is composed of, for example, a plurality of chromium electrodes (first electrode) and a transparent indium tin oxide (ITO) electrode (second electrode) formed on a ceramic substrate. It has a structure in which an amorphous silicon layer as a photoconductor layer is sandwiched between the layers. This amorphous silicon layer is deposited on the chromium electrode by glow discharge decomposition of monosilane gas (SiH 4 ), etc., but the larger the area to be deposited, the more uniform it is over the entire surface. Forming an amorphous silicon layer is difficult and may be prone to pinholes. This is because, in addition to external causes such as dust in the manufacturing equipment adhering to the substrate surface, there are often internal causes related to the mechanism of thin film growth.

ここで、サンドイツチ構造の光電変換素子にお
いて、光導電体層にピンホールが存在することに
よつて生じる素子としての機能の変化を考えてみ
る。
Here, let us consider the change in the function of the element that occurs due to the presence of pinholes in the photoconductor layer in a photoelectric conversion element having a Sand-German trench structure.

まず、サンドイツチ構造の光電変換素子の最も
簡単な等価回路を考えると、第1図に示す如くな
る。直列抵抗Rsは、電極の接触抵抗と外部回路
の抵抗との和であり、並列抵抗Rshは光導電体層
自体の抵抗である。ここで、光導電体層にピンホ
ールが無く、第1電極と第2電極との間でシヨー
トが発生しなければ並列抵抗Rshは無限大(∞)
と考えて良い。第1図中、ILは入射光の強度に比
例した光電流、Ijはダイオードに流れる電流、Ish
はシヨート等によるもれ電流である。
First, if we consider the simplest equivalent circuit of a photoelectric conversion element with a Sanderch structure, it will be as shown in FIG. The series resistance R s is the sum of the contact resistance of the electrodes and the resistance of the external circuit, and the parallel resistance R sh is the resistance of the photoconductor layer itself. Here, if there are no pinholes in the photoconductor layer and no shorts occur between the first and second electrodes, the parallel resistance R sh is infinite (∞).
You can think about it. In Figure 1, I L is a photocurrent proportional to the intensity of incident light, I j is the current flowing through the diode, and I sh
is the leakage current due to shot etc.

ここで外部回路を流れる電流をIとすると、 I=−IL+Ij+Ish ……(1) が成立する。 Here, if the current flowing through the external circuit is I, then I= -IL +I j +I sh (1) holds true.

光導電体層にピンホールの無い理想的な光電変
換素子即ち、並列抵抗Rsh=∞、Rs=0の場合の
電流−電圧特性曲線(I−V曲線)を第2図に示
す。ここで、I1は光入射時の特性曲線、I2は暗時
の特性曲線である。Rsh=∞であるからIsh0で
あり、光入射時には光電流−ILが支配的となり、
暗時においては、ダイオードを流れる電流Ijが支
配的となる。
FIG. 2 shows a current-voltage characteristic curve (IV curve) for an ideal photoelectric conversion element without pinholes in the photoconductor layer, ie, when parallel resistance R sh =∞ and R s =0. Here, I 1 is a characteristic curve when light is incident, and I 2 is a characteristic curve when it is dark. Since R sh = ∞, I sh is 0, and when light is incident, the photocurrent −I L is dominant,
In the dark, the current I j flowing through the diode is dominant.

ここで、光導電体層において、第1電極と第2
電極とが重なり合う部分にピンホールが発生する
と、第1電極と第2電極との間が一部短絡し、並
列抵抗Rshが大幅に減少する。この場合の電流−
電圧特性曲線を第3図に示す。ここではRs=0
としておく。I3は光入射時の特性曲線、I4は暗時
の特性曲線である。
Here, in the photoconductor layer, the first electrode and the second electrode
When a pinhole occurs in a portion where the electrodes overlap, a portion of the first electrode and the second electrode are shorted, and the parallel resistance R sh is significantly reduced. Current in this case −
The voltage characteristic curve is shown in FIG. Here R s =0
I'll leave it as that. I 3 is the characteristic curve when light is incident, and I 4 is the characteristic curve when dark.

この場合、たとえばダイオード電流Ij0のバ
アス領域では関係式(1)は、 I−IL+Ish =−IL+RV sh ……(2) となり、光照射時においても暗時においても、電
流Iの電圧V依存性が大きいことからもわかるよ
うに、第2図に示された理想的な光電変換素子の
もつ特性に比べて、大幅に特性が低下している。
In this case, for example, in the bias region of the diode current I j 0, the relational expression (1) becomes I - I L + I sh = - I L + R V sh (2), and both in light irradiation and in darkness, As can be seen from the large dependence of the current I on the voltage V, the characteristics are significantly degraded compared to the characteristics of the ideal photoelectric conversion element shown in FIG.

すなわち、太陽電池においては、順バイアス領
域すなわちV>0の領域が利用されるが、理想的
な光電変換素子の場合に比べ、ピンホールを有す
る場合は変換効率が悪い。
That is, in a solar cell, a forward bias region, that is, a region where V>0 is used, but the conversion efficiency is lower in the case of a pinhole than in the case of an ideal photoelectric conversion element.

一方、イメージセンサでは逆バイアス領域すな
わちV<0の領域を利用するが、理想的な光電変
換素子に比べ、明暗比が大幅に低下している。
On the other hand, image sensors utilize a reverse bias region, that is, a region where V<0, but the contrast ratio is significantly lower than that of an ideal photoelectric conversion element.

このように、光電変換素子の光導電体層におけ
るピンホールの発明は、太陽電池においては、変
換効率の低下および開放端電圧の低下をもたら
し、イメージセンサにおいては光学像の読み取り
能力の低下を招く等、致命的な欠陥であり、素子
としての製造歩留りの低下が大きな問題となつて
いる。
In this way, the invention of pinholes in the photoconductor layer of a photoelectric conversion element causes a decrease in conversion efficiency and a decrease in open-circuit voltage in solar cells, and a decrease in the ability to read optical images in image sensors. These are fatal defects, and a reduction in the manufacturing yield of devices has become a major problem.

〔発明の目的〕[Purpose of the invention]

本発明は、前記実情に鑑みてなされたもので、
万一、光導電体層にピンホールが発生した場合に
も、素子特性に大きな影響を及ぼすことのないよ
うにし、光電変換素子の製造歩留りの低下を防ぐ
ことを目的とする。
The present invention was made in view of the above circumstances, and
Even if a pinhole occurs in a photoconductor layer, the device characteristics are not significantly affected, and the purpose is to prevent a decrease in the manufacturing yield of photoelectric conversion devices.

〔発明の構成〕[Structure of the invention]

上記目的を達成するため、本発明の薄膜光電変
換素子の製造方法は、基板上に第1電極として、
高濃度にドープされたシリコン層を形成する工程
と、次いでこの上に光導電体層すなわち光電変換
薄膜を形成した後に該光電変換薄膜中のピンホー
ルに起因する第1電極の露呈部に対して暗中で陽
極酸化を行なう工程とを含むことを特徴とするも
のでこれにより光電変換膜中にピンホールが発生
した場合でも、ピンホールによつて膜中に露呈す
る下地の第1の電極は絶縁化され、光電変換膜上
に形成される第2電極と第1電極との短絡を防ぐ
ことができる。
In order to achieve the above object, the method for manufacturing a thin film photoelectric conversion element of the present invention includes a first electrode on a substrate,
forming a highly doped silicon layer, and then forming a photoconductor layer, i.e., a photoelectric conversion thin film, on the exposed portion of the first electrode due to a pinhole in the photoelectric conversion thin film; Even if a pinhole occurs in the photoelectric conversion film, the underlying first electrode exposed in the film by the pinhole is insulated. This can prevent a short circuit between the second electrode and the first electrode formed on the photoelectric conversion film.

〔実施例〕〔Example〕

以下、本発明実施例のイメージセンサ用薄膜光
電変換素子の製造方法を図面を参照しつつ説明す
る。
Hereinafter, a method for manufacturing a thin film photoelectric conversion element for an image sensor according to an embodiment of the present invention will be described with reference to the drawings.

まず、絶縁性の石英基板1上に化学蒸着法
(CVD法)により、1020atoms/cm3程度のリン
(P)をドープしたシリコン(Si)膜を、1000Å
の厚さに着膜する。この後、フオトリソグラフイ
ー法により所望の形状のレジストパターンを形成
し、これをマスクとしてドライエツチングを行な
い、第4図に示す如く、リンドープされたシリコ
ンからなる第1電極2を形成する。
First, a silicon (Si) film doped with about 10 20 atoms/cm 3 of phosphorus (P) is deposited on an insulating quartz substrate 1 by chemical vapor deposition (CVD) to a thickness of 1000 Å.
The film is deposited to a thickness of . Thereafter, a resist pattern of a desired shape is formed by photolithography, and dry etching is performed using this as a mask to form the first electrode 2 made of phosphorus-doped silicon, as shown in FIG.

次いで、モノシランガス(SiH4)のグロー放
電分解法により、第5図に示す如く、光電変換膜
としてのアモルフアス水素化シリコン膜3を厚約
1μmとなるように堆積する。
Next, by glow discharge decomposition of monosilane gas (SiH 4 ), the amorphous hydrogenated silicon film 3 as a photoelectric conversion film is reduced in thickness, as shown in FIG.
Deposit to a thickness of 1 μm.

この後、前記第1電極2を陽極に接続し、第8
図に示す陽極酸化装置を使用して、暗中で陽極酸
化を行なう。
After this, the first electrode 2 is connected to the anode, and the eighth electrode is connected to the anode.
Anodization is performed in the dark using the anodization apparatus shown in the figure.

この陽極酸化装置は、電解液層31内に浸漬さ
れたプラチナ(Pt)板よりなる陰極32と陽極
33とにより構成されており、電解液としては、
0.04規定の硫酸カリウムを含むNメチルアセトア
ミドを使用している。第8図に示す如く、この陽
極酸化装置の電解液槽31内に、前記アモルフア
ス水素化シリコン膜形成後の石英基板1を浸漬
し、第1の電極2を陽極33に接続し、酸化かつ
該第1の電極の厚さ全体に及ぶまで電圧を印加す
る。このとき、アモルフアス水素化シリコン膜か
ら露出するように設計されている部分の第1電極
2は、液面上になるように留意する。
This anodizing device is composed of a cathode 32 and an anode 33 made of a platinum (Pt) plate immersed in an electrolyte layer 31.
N-methylacetamide containing 0.04N potassium sulfate is used. As shown in FIG. 8, the quartz substrate 1 on which the amorphous silicon hydride film has been formed is immersed in the electrolyte tank 31 of this anodizing apparatus, the first electrode 2 is connected to the anode 33, and the quartz substrate 1 is oxidized and A voltage is applied until it spans the entire thickness of the first electrode. At this time, care is taken so that the portion of the first electrode 2 designed to be exposed from the amorphous hydrogenated silicon film is above the liquid level.

このようにして、アモルフアス水素化シリコン
層中に、ピンホール4が発生していたとしても、
このピンホール4に起因する第1電極の露呈部お
よびその周辺は、陽極酸化され、第6図に示す如
く、電気絶縁性の酸化シリコン膜(SiO2)5が
形成される。
In this way, even if pinholes 4 are generated in the amorphous hydrogenated silicon layer,
The exposed portion of the first electrode caused by the pinhole 4 and its surroundings are anodized, and an electrically insulating silicon oxide film (SiO 2 ) 5 is formed as shown in FIG.

更に、充分洗浄を行なつた後、アルゴン(Ar)
ガスと酸素(O2)の混合ガスを用いた反応性ス
パツタリング法により、第7図に示す如く、膜厚
700Åの酸化インジウム錫(ITO)膜からなる第
2の電極7を形成する。
Furthermore, after thorough cleaning, argon (Ar)
By reactive sputtering using a mixed gas of gas and oxygen (O 2 ), the film thickness can be increased as shown in Figure 7.
A second electrode 7 made of a 700 Å indium tin oxide (ITO) film is formed.

このようにして、光電変換膜内のピンホール発
生部位およびその周辺の第1電極は、絶縁膜と化
すため、第2電極がピンホール内に入り込み第1
電極に達しても第1電極と第2電極との間でシヨ
ートが発生することはなく、信頼性の高いイメー
ジセンサを形成することができる。
In this way, the pinhole generation site in the photoelectric conversion film and the first electrode around it become an insulating film, so that the second electrode enters into the pinhole and the first electrode
Even when the electrodes are reached, shoots do not occur between the first electrode and the second electrode, making it possible to form a highly reliable image sensor.

なお、陽極酸化工程においては光電変換膜から
露呈している第1電極すなわち第1電極のリード
部には、電解液が接触しないようにすることが必
要であり、実施例の如く、液面上に出す方法の
他、この部分をレジスト放覆した後に陽極酸化を
行なう等の方法をとることが大切である。
In addition, in the anodic oxidation process, it is necessary to prevent the electrolyte from coming into contact with the first electrode, that is, the lead part of the first electrode exposed from the photoelectric conversion film. It is important to use a method such as removing the resist from this area and then performing anodic oxidation.

また、陽極酸化に使用する電解液としては、実
施例で使用した硝酸カリウムを含むNメチルアセ
トアミドの他、テトラヒドロフルフリールアルコ
ールとエチレングリコールの硝酸塩をエチレング
リコールのハロゲン化物との混合溶液等のように
生成被膜を溶解しないものであればよい。
In addition to the N-methylacetamide containing potassium nitrate used in the examples, electrolytes used for anodization include a mixed solution of tetrahydrofurfuryl alcohol, ethylene glycol nitrate, and ethylene glycol halide, etc. Any material may be used as long as it does not dissolve the formed film.

更に、実施例においては、第1電極の膜厚全体
にわたつて陽極酸化を行なつたが、必ずしもすべ
て酸化シリコン膜とする必要はなく、表面近傍の
みを酸化シリコン膜としてもよい。いずれにして
も、ピンホールに起因して、光電変換膜中に露呈
する第1電極が酸化シリコン膜と化し、絶縁体と
なることにより、その上に第2電極が堆積されて
も短絡を起さない程度であればよい。
Further, in the embodiment, although the entire thickness of the first electrode is anodized, it is not necessarily necessary to form the entire film into a silicon oxide film, and only the vicinity of the surface may be formed into a silicon oxide film. In any case, due to the pinhole, the first electrode exposed in the photoelectric conversion film turns into a silicon oxide film and becomes an insulator, causing a short circuit even if the second electrode is deposited on top of it. It is fine as long as it does not.

また、実施例においては、この光電変換素子の
多数キヤリアが電子であるため、第1電極として
リンドープされたn+型シリコン膜を使用したが、
正孔である場合には、第1電極はボロンBを高濃
度にドープしたp+型シリコン膜を使用する。
In addition, in the example, since the majority carriers of this photoelectric conversion element are electrons, a phosphorous-doped n + type silicon film was used as the first electrode.
In the case of holes, a p + type silicon film doped with boron B at a high concentration is used as the first electrode.

加えて、基板としては、石英基板に限定される
ことなく、ホウケイ酸ガラス、セラミツク等の耐
熱性の基板であれば良い。また、絶縁性光電変換
膜としては、実施例で用いたアモルフアス水素化
シリコンに限定されることなく、アモルフアスシ
リコンカーバイド(a−SiC)、アモルフアスシ
リコンゲルマニウム合金(a−SiGe)、セレン
(Se)−テルル(Te)などのカルコゲナイトガラ
ス、硫化カドミウム(CdS)−テルル化カドミウ
ム(CdTe)等の光導電性半導体膜等でも良いこ
とは言うまでもない。ちなみにこれらの膜は光照
射時には導電性を呈するため、陽極酸化工程はい
ずれの場合でも暗中で実施することが重要であ
る。
In addition, the substrate is not limited to a quartz substrate, but may be any heat-resistant substrate such as borosilicate glass or ceramic. In addition, the insulating photoelectric conversion film is not limited to the amorphous silicon hydride used in the examples, but also amorphous silicon carbide (a-SiC), amorphous silicon germanium alloy (a-SiGe), selenium (Se )--tellurium (Te), or a photoconductive semiconductor film such as cadmium sulfide (CdS)-cadmium telluride (CdTe). Incidentally, since these films exhibit conductivity when irradiated with light, it is important to carry out the anodic oxidation step in the dark in any case.

〔発明の効果〕〔Effect of the invention〕

以上、説明してきたように、本発明の薄膜光電
変換素子の製造方法によれば、基板上に、第1電
極として、高濃度にドープされたシリコン層を形
成し、この上に絶縁性の光電変換薄膜を堆積した
後に、暗中で第1電極に陽極酸化を施し、光電変
換薄膜のピンホールに起因する第1電極の露呈部
を、絶縁性の酸化シリコン膜と化すことにより、
この後、光電変換膜上に着膜される第2電極がピ
ンホール内に入り込み第1電極面に達した場合に
も、第1電極と第2電極との間で短絡が起ること
はなく、信頼性の高い薄膜光電変換素子を形成す
ることが可能となる。また、第1電極として高濃
度にドープされたシリコン層を用いているため、
陽極酸化の際、酸化速度が速く、容易に絶縁化す
ることが可能となる。
As described above, according to the method of manufacturing a thin film photoelectric conversion element of the present invention, a highly doped silicon layer is formed on a substrate as a first electrode, and an insulating photoelectric conversion element is formed on this layer. After depositing the conversion thin film, the first electrode is anodized in the dark, and the exposed portion of the first electrode caused by the pinhole in the photoelectric conversion thin film is turned into an insulating silicon oxide film.
After this, even if the second electrode deposited on the photoelectric conversion film enters the pinhole and reaches the first electrode surface, no short circuit will occur between the first electrode and the second electrode. , it becomes possible to form a highly reliable thin film photoelectric conversion element. In addition, since a highly doped silicon layer is used as the first electrode,
During anodic oxidation, the oxidation rate is fast and insulation can be easily achieved.

さらに、光電変換薄膜中の第1電極の露呈部の
みを選択的に酸化することができるため、センサ
領域の減少を最少限に抑えることが可能となる。
Furthermore, since only the exposed portion of the first electrode in the photoelectric conversion thin film can be selectively oxidized, it is possible to minimize the reduction in the sensor area.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は通常のサンドイツチ型光電変換素子の
等価回路を示す図、第2図は、理想的な光電変換
素子の電流−電圧特性曲線を示す図、第3図は、
光電変換層において、第1電極と第2電極とが重
なり合う部分にピンホールが発生した場合の光電
変換素子の電流−電圧特性曲線を示す図、第4図
乃至第7図は、本発明実施例の光電変換素子の製
造工程を示す図、第8図は、本発明実施例の光電
変換素子の製造工程で用いられる陽極酸化処理装
置を示す図である。 1……石英基板、2……第1電極、3……アモ
ルフアス水素化シリコン層、4……ピンホール、
5……酸化シリコン被膜、6……第2電極、31
……電解液槽、32……陰極、33……陽極、
I1,I3……光照射時のI−V特性曲線、I2,I4
…暗時のI−V特性曲線。
FIG. 1 is a diagram showing the equivalent circuit of a normal Sand-Deutsch photoelectric conversion element, FIG. 2 is a diagram showing the current-voltage characteristic curve of an ideal photoelectric conversion element, and FIG. 3 is a diagram showing the current-voltage characteristic curve of an ideal photoelectric conversion element.
FIGS. 4 to 7 are diagrams showing current-voltage characteristic curves of a photoelectric conversion element when a pinhole is generated in a portion where a first electrode and a second electrode overlap in a photoelectric conversion layer. FIG. 8 is a diagram showing an anodizing treatment apparatus used in the manufacturing process of a photoelectric conversion element according to an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Quartz substrate, 2... First electrode, 3... Amorphous hydrogenated silicon layer, 4... Pinhole,
5... Silicon oxide film, 6... Second electrode, 31
... Electrolyte tank, 32 ... Cathode, 33 ... Anode,
I 1 , I 3 ... IV characteristic curve during light irradiation, I 2 , I 4 ...
...I-V characteristic curve in the dark.

Claims (1)

【特許請求の範囲】 1 光導電性の光電変換薄膜を第1および第2の
電極によつて挟持したサンドイツチ構造の薄膜光
電変換素子の製造方法において、 基板上に高濃度にドープされたシリコン膜から
なる第1の電極を形成する第1の電極形成工程
と、 前記第1の電極の上層に光電変換薄膜を堆積す
る工程と、 該第1の電極を暗中で陽極酸化することによ
り、前記光電変換薄膜中のピンホールに起因する
第1の電極の露呈部を絶縁化する陽極酸化工程
と、 前記光電変換薄膜の上層に第2の電極を形成す
る第2の電極形成工程とを含むことを特徴とする
薄膜光電変換素子の製造方法。
[Claims] 1. A method for manufacturing a thin film photoelectric conversion element with a sandwich structure in which a photoconductive photoelectric conversion thin film is sandwiched between first and second electrodes, comprising: a silicon film doped at a high concentration on a substrate; a first electrode forming step of forming a first electrode consisting of a first electrode; a step of depositing a photoelectric conversion thin film on the upper layer of the first electrode; and anodizing the first electrode in the dark. The method includes an anodizing step of insulating an exposed portion of the first electrode caused by a pinhole in the conversion thin film, and a second electrode forming step of forming a second electrode on the upper layer of the photoelectric conversion thin film. A method for manufacturing a featured thin film photoelectric conversion element.
JP58193635A 1983-10-17 1983-10-17 Manufacture of thin film photoelectric conversion element Granted JPS6085578A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58193635A JPS6085578A (en) 1983-10-17 1983-10-17 Manufacture of thin film photoelectric conversion element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58193635A JPS6085578A (en) 1983-10-17 1983-10-17 Manufacture of thin film photoelectric conversion element

Publications (2)

Publication Number Publication Date
JPS6085578A JPS6085578A (en) 1985-05-15
JPH0221664B2 true JPH0221664B2 (en) 1990-05-15

Family

ID=16311220

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58193635A Granted JPS6085578A (en) 1983-10-17 1983-10-17 Manufacture of thin film photoelectric conversion element

Country Status (1)

Country Link
JP (1) JPS6085578A (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61279179A (en) * 1985-06-04 1986-12-09 Semiconductor Energy Lab Co Ltd Manufacture of photoelectric conversion device
JPS61279178A (en) * 1985-06-04 1986-12-09 Semiconductor Energy Lab Co Ltd Manufacture of photoelectric conversion device
JPS61279180A (en) * 1985-06-04 1986-12-09 Semiconductor Energy Lab Co Ltd Manufacture of photoelectric conversion device
JPS6258685A (en) * 1985-09-09 1987-03-14 Fuji Electric Co Ltd Manufacture of amorphous semiconductor solar cell
KR900006772B1 (en) * 1985-11-06 1990-09-21 세미콘닥터 에너지 라보라토리 컴파니 리미티드 Method for making semiconductor device free from electrical short circuits through a semiconductor layer
US4729970A (en) * 1986-09-15 1988-03-08 Energy Conversion Devices, Inc. Conversion process for passivating short circuit current paths in semiconductor devices
JPH04266068A (en) * 1991-02-20 1992-09-22 Canon Inc Photoelectric conversion element and its manufacture
JP4926150B2 (en) * 2008-10-21 2012-05-09 三菱電機株式会社 Thin film solar cell manufacturing method and thin film solar cell manufacturing apparatus

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS538088A (en) * 1976-07-12 1978-01-25 Hitachi Ltd Production of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS538088A (en) * 1976-07-12 1978-01-25 Hitachi Ltd Production of semiconductor device

Also Published As

Publication number Publication date
JPS6085578A (en) 1985-05-15

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