JPH021865Y2 - - Google Patents

Info

Publication number
JPH021865Y2
JPH021865Y2 JP1983126893U JP12689383U JPH021865Y2 JP H021865 Y2 JPH021865 Y2 JP H021865Y2 JP 1983126893 U JP1983126893 U JP 1983126893U JP 12689383 U JP12689383 U JP 12689383U JP H021865 Y2 JPH021865 Y2 JP H021865Y2
Authority
JP
Japan
Prior art keywords
film
amorphous silicon
light
electrode
electrode film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1983126893U
Other languages
Japanese (ja)
Other versions
JPS6035550U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12689383U priority Critical patent/JPS6035550U/en
Publication of JPS6035550U publication Critical patent/JPS6035550U/en
Application granted granted Critical
Publication of JPH021865Y2 publication Critical patent/JPH021865Y2/ja
Granted legal-status Critical Current

Links

Description

【考案の詳細な説明】 (技術分野) 本考案は、アモルフアスシリコンを用いたライ
ンセンサに関するものである。
[Detailed Description of the Invention] (Technical Field) The present invention relates to a line sensor using amorphous silicon.

(従来技術) 従来、アモルフアスシリコンを用いたラインセ
ンサは、第1図に示したように構成されている。
第1図において、1は絶縁基板、2はアモルフア
スシリコン膜、3は、アモルフアスシリコン膜2
の上部(あるいは下部)に形成された電極膜で、
ギヤツプ4を介して対向する電極対が複数組設け
られる。このように構成されたラインセンサは、
ギヤツプ4部に光が照射されることによりその電
極対に流れる光電流を検出するもので、一般に光
伝導型ラインセンサと呼ばれている。しかしなが
ら、この種のラインセンサは、応答速度が遅く、
外部に付属させる増幅回路が複雑になり、また、
光電流出力が非線形であるため中間濃度を持つ画
素の読取りには不向きであり、さらに、温度変化
に対する電気特性の変化が大きい等の欠点があつ
た。
(Prior Art) Conventionally, a line sensor using amorphous silicon is constructed as shown in FIG.
In FIG. 1, 1 is an insulating substrate, 2 is an amorphous silicon film, and 3 is an amorphous silicon film 2.
An electrode film formed on the top (or bottom) of the
A plurality of pairs of electrodes are provided facing each other with gaps 4 interposed therebetween. The line sensor configured in this way is
It detects the photocurrent flowing through the pair of electrodes when the gap 4 is irradiated with light, and is generally called a photoconductive line sensor. However, this type of line sensor has a slow response speed,
The external amplifier circuit becomes complicated, and
Since the photocurrent output is nonlinear, it is not suitable for reading pixels with intermediate density, and furthermore, it has drawbacks such as large changes in electrical characteristics with respect to temperature changes.

これに対し、これを捕うものとして、太陽電池
などで使用されているp−i−n構成や逆p−i
−n構成の素子が知られているが、しかしこれら
の構成は、アモルフアスシリコン膜を形成中に発
生するピンホール等の欠陥のために、多数個の素
子を配設するラインセンサには不向きである。
On the other hand, to capture this problem, there is a p-i-n configuration used in solar cells, etc.
-n configuration elements are known, but these configurations are unsuitable for line sensors with a large number of elements due to defects such as pinholes that occur during the formation of the amorphous silicon film. It is.

(考案の目的) 本考案は、上記従来例の欠点を改善したもので
あり、下部電極膜と上部電極膜との間にn−i形
アモルフアスシリコン膜と、ピンホールの発生を
補う絶縁膜とを挾んだMIS(Metal−Insulator−
Semiconductor)構造で、応答速度が速く、かつ
入射光量に対してリニアな特性が得られる光起電
力型アモルフアスシリコンラインセンサを提供す
るものである。
(Purpose of the invention) The present invention improves the drawbacks of the conventional example described above, and includes an ni-type amorphous silicon film between the lower electrode film and the upper electrode film, and an insulating film that compensates for the occurrence of pinholes. MIS (Metal-Insulator-)
The present invention provides a photovoltaic amorphous silicon line sensor with a fast response speed and linear characteristics with respect to the amount of incident light.

さらに、このMIS構造で発生し易い光電流の干
渉を防止するために、隣接電極間をくし形ガード
電極で分離し、分解能を向上する。
Furthermore, in order to prevent photocurrent interference that is likely to occur in this MIS structure, adjacent electrodes are separated by a comb-shaped guard electrode to improve resolution.

以下、図面により実施例を詳細に説明する。 Hereinafter, embodiments will be described in detail with reference to the drawings.

(実施例) 第2図は、本考案の一実施例を示したもので、
11はガラス、セラミツク等の絶縁基板、12及
び13は、第3図に示したように、くし形ガード
電極膜12と、各くし歯の間に個別電極膜13が
それぞれ配置されている。14はリンをドープし
たn形アモルフアスシリコン膜、15は不純物ド
ープのないi形アモルフアスシリコン膜、16は
SiO2,SiN,SiCなどの絶縁膜で、50〜100Å程
度の膜厚を有する。17はITO,SnO2等の透明
導電膜あるいは光透過性の金属膜からなる共通電
極膜である。18は入射光の入射範囲を規制する
遮光膜である。
(Example) Figure 2 shows an example of the present invention.
Reference numeral 11 denotes an insulating substrate made of glass, ceramic, etc., and 12 and 13, as shown in FIG. 3, a comb-shaped guard electrode film 12 and individual electrode films 13 are arranged between each comb tooth. 14 is an n-type amorphous silicon film doped with phosphorus, 15 is an i-type amorphous silicon film not doped with impurities, and 16 is an n-type amorphous silicon film doped with phosphorus.
It is an insulating film made of SiO 2 , SiN, SiC, etc., and has a film thickness of about 50 to 100 Å. 17 is a common electrode film made of a transparent conductive film such as ITO or SnO 2 or a light-transmissive metal film. 18 is a light shielding film that regulates the range of incidence of incident light.

上記構成において、遮光膜18の開口部から光
が入射すると、各個別電極膜13と共通電極膜1
7との間で光電流が発生し、これを検出出力とす
る。
In the above configuration, when light enters from the opening of the light shielding film 18, each individual electrode film 13 and the common electrode film 1
7, a photocurrent is generated and this is used as a detection output.

ここで、絶縁膜16は、アモルフアスシリコン
膜14,15の形成時に生じるピンホールを塞ぐ
役目を果し、起電力素子としての特性を確保する
ものである。また、このMIS構造では、隣接する
素子間で光電流が互いに干渉し合い、そのため分
解能が低下するので、個別電極膜13をくし形ガ
ード電極膜12で分離し、その干渉を防止するよ
うにしており、これによつて分解能が著しく向上
する。
Here, the insulating film 16 serves to close pinholes that occur during the formation of the amorphous silicon films 14 and 15, and ensures characteristics as an electromotive force element. Furthermore, in this MIS structure, photocurrents interfere with each other between adjacent elements, resulting in a decrease in resolution. Therefore, the individual electrode films 13 are separated by a comb-shaped guard electrode film 12 to prevent such interference. This significantly improves resolution.

第4図は、本考案の他の実施例を示したもの
で、個別電極膜と共通電極膜の位置を上下入れ替
えたものである。即ち、21は、共通電極膜とし
ての導電膜あるいは金属薄膜を形成した絶縁基
板、又は金属基板である。14,15,16は、
第2図の場合と同様に、リンをドープしたn形ア
モルフアスシリコン膜、不純物ドープのないi形
アモルフアスシリコン膜、SiO2,SiN,SiCなど
の絶縁膜である。12及び13はそれぞれ、第3
図に示したように配設されたくし形ガード電極膜
及び光透過性個別電極膜である。22はSiO2
SiN,SiCあるいは有機材料からなる絶縁膜、1
8は入射光の入射範囲を規制する遮光膜である。
FIG. 4 shows another embodiment of the present invention, in which the positions of the individual electrode films and the common electrode film are reversed vertically. That is, 21 is an insulating substrate or a metal substrate on which a conductive film or metal thin film is formed as a common electrode film. 14, 15, 16 are
As in the case of FIG. 2, these are an n-type amorphous silicon film doped with phosphorus, an i-type amorphous silicon film not doped with impurities, and an insulating film of SiO 2 , SiN, SiC, or the like. 12 and 13 are the third
A comb-shaped guard electrode film and a light-transmitting individual electrode film are arranged as shown in the figure. 22 is SiO 2 ,
Insulating film made of SiN, SiC or organic material, 1
8 is a light-shielding film that regulates the range of incidence of incident light.

以上のように構成された本実施例も、光の入射
により下部電極としての基板21と上部電極とし
ての個別電極膜13との間で光電流が発生し、こ
れを検出出力とする。絶縁膜16及びくし形ガー
ド電極膜12は、第2図の実施例の場合と同様の
作用・効果を有する。
Also in this embodiment configured as described above, a photocurrent is generated between the substrate 21 as the lower electrode and the individual electrode film 13 as the upper electrode due to the incidence of light, and this is used as a detection output. The insulating film 16 and the comb-shaped guard electrode film 12 have the same functions and effects as in the embodiment shown in FIG.

(考案の効果) 以上説明したように、本考案によれば、応答速
度が速く、かつ入射光量に対してリニアな特性を
有し、しかも分解能の高い、高性能ラインセンサ
を提供することができる。
(Effects of the invention) As explained above, according to the invention, it is possible to provide a high-performance line sensor that has a fast response speed, linear characteristics with respect to the amount of incident light, and high resolution. .

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、従来例の斜視図、第2図は、本考案
の一実施例の斜視図、第3図は、第2図、第4図
の個別電極膜及びくし形ガード電極膜の配置を示
す図、第4図は、本考案の他の実施例の斜視図で
ある。 11……絶縁基板、12……くし形ガード電極
膜、13……個別電極膜、14……n形アモルフ
アスシリコン膜、15……i形アモルフアスシリ
コン膜、16……絶縁膜、17……共通電極膜、
18……遮光膜、21……下部共通電極を有する
基板、22……絶縁膜。
FIG. 1 is a perspective view of a conventional example, FIG. 2 is a perspective view of an embodiment of the present invention, and FIG. 3 is an arrangement of individual electrode films and comb-shaped guard electrode films in FIGS. 2 and 4. FIG. 4 is a perspective view of another embodiment of the present invention. DESCRIPTION OF SYMBOLS 11... Insulating substrate, 12... Comb-shaped guard electrode film, 13... Individual electrode film, 14... N-type amorphous silicon film, 15... I-type amorphous silicon film, 16... Insulating film, 17... ...common electrode membrane,
18... Light shielding film, 21... Substrate having a lower common electrode, 22... Insulating film.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基板上に、下部電極膜、n−i形アモルフアス
シリコン膜、絶縁膜、光透過性上部電極膜を順次
積層し、前記下部電極膜及び上部電極膜のいずれ
か一方を共通電極とし、他方を、素子分離のため
のくし形ガード電極の各くし歯の間にそれぞれ個
別電極を配置し、かつ、前記上部電極膜の上に光
の入射範囲を規制する遮光膜を設けたことを特徴
とするアモルフアスシリコンラインセンサ。
A lower electrode film, an ni-type amorphous silicon film, an insulating film, and a light-transmissive upper electrode film are sequentially laminated on the substrate, one of the lower electrode film and the upper electrode film is used as a common electrode, and the other is used as a common electrode. , an individual electrode is arranged between each comb tooth of a comb-shaped guard electrode for element isolation, and a light-shielding film is provided on the upper electrode film to regulate the incident range of light. Amorphous silicon line sensor.
JP12689383U 1983-08-18 1983-08-18 Amorphous silicon line sensor Granted JPS6035550U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12689383U JPS6035550U (en) 1983-08-18 1983-08-18 Amorphous silicon line sensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12689383U JPS6035550U (en) 1983-08-18 1983-08-18 Amorphous silicon line sensor

Publications (2)

Publication Number Publication Date
JPS6035550U JPS6035550U (en) 1985-03-11
JPH021865Y2 true JPH021865Y2 (en) 1990-01-17

Family

ID=30288382

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12689383U Granted JPS6035550U (en) 1983-08-18 1983-08-18 Amorphous silicon line sensor

Country Status (1)

Country Link
JP (1) JPS6035550U (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5339095A (en) * 1976-09-22 1978-04-10 Hitachi Ltd Photo detector
JPS5349981A (en) * 1976-10-18 1978-05-06 Nippon Telegr & Teleph Corp <Ntt> Photoelectric conversion element
JPS56103477A (en) * 1980-01-21 1981-08-18 Hitachi Ltd Photoelectric conversion element
JPS5897862A (en) * 1981-12-08 1983-06-10 Nec Corp Close adhesion type image sensor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5339095A (en) * 1976-09-22 1978-04-10 Hitachi Ltd Photo detector
JPS5349981A (en) * 1976-10-18 1978-05-06 Nippon Telegr & Teleph Corp <Ntt> Photoelectric conversion element
JPS56103477A (en) * 1980-01-21 1981-08-18 Hitachi Ltd Photoelectric conversion element
JPS5897862A (en) * 1981-12-08 1983-06-10 Nec Corp Close adhesion type image sensor

Also Published As

Publication number Publication date
JPS6035550U (en) 1985-03-11

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