JPH0285826A - Display panel - Google Patents

Abstract

PURPOSE:To lower a gate wiring resistance and to prevent a short circuit by using Al or a metal comprising primarily Al for a gate electrode and a gate wiring, and using an anodic oxidation film of Al or a metal comprising primarily Al for at least one of insulating films in a gate part and a wiring intersecting part. CONSTITUTION:The display panel is constituted by placing a thin film transistor TFT in an intersection of plural pieces of gate wirings 13, 14 and plural pieces of signal wirings 15, 15' which intersect with said wirings on an insulating substrate 1. Al or a metal comprising primarily Al is used for these gate wirings 13, 14 and a gate electrode 2 of the TFT, and at least one of insulating films in a TFT part A area and a wiring intersecting part area B is an anodic chemical conversion film of Al2O3, etc. In such a way, by providing locally the anodic chemical conversion film, a gate wiring resistance can be suppressed low, an inter-electrode short circuit in the TFT part and the wiring intersecting part is not generated, and the display panel of a high yield and a high performance can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a display panel that can be used in liquid crystal display devices and the like, and particularly to a structure and a manufacturing method that enable improvement in the characteristics and yield of the display panel.

[Conventional technology]

A conventional display panel (for example, a liquid crystal panel) uses a structure as shown in FIG. In the figure, 21 is a substrate, 22 is Cr, 23 is Al, 24 is SiN, 25 is a-Si, 26 is a source electrode, 29 is a signal wiring that also serves as a drain electrode, and 27 is a pixel electrode consisting of a transparent electrode. show.

As shown in the figure, conventionally, Or is used for the gate electrode and SiN is used for the gate insulator6, while two layers of metal, Cr and Al1, are used for the gate wiring.

The reason why the gate electrode and the gate wiring are made of different materials will be explained below. First, the gate metal 22 must have good adhesion to the substrate, have no irregularities on its surface, and must not change in quality during the process of forming SiN, which is the gate insulating film. Cr is suitable for this condition. On the other hand, SCR, which requires low resistance for gate wiring, has an individual resistivity higher than that of Al by an order of magnitude, and is therefore not suitable for gate wiring.

On the other hand, AΩ tends to cause hillocks and needle-like convex defects on one surface. Furthermore, the gate insulating film is SiN (normally, the substrate temperature is 200~200℃ by plasma CVD method).
There is a problem that this hillock grows during the formation process (deposited at 350°C), and it cannot be used as a gate electrode.Therefore, conventionally Cr was used for the gate electrode and Cr for the gate wiring.
A metal with a two-layer structure of r and Al was used. Another problem with the conventional structure is that, as is clear from FIG. 4, there is a gate insulating film of 5iN ( 24) and a-Si (25) are interposed, which electrically isolate the gate electrode (22), drain electrode (29), and source electrode 26. However, since both SiN and a-Si are usually thin films (SiN~0
．． 3 μm.

a-8i = 0.2 μm), and because it is formed by plasma CVD, pinholes are likely to occur in the film due to dust, and there may be problems between gate electrodes/wirings and other electrodes/wirings. This is a major hindrance in the production of display panels because of short circuits between the two. As explained above, in the past, (2) different materials were used for the gate electrode and the gate wiring. This resulted in an increase in the number of steps.

■ Short circuits easily occurred between gate electrodes/wirings and other electrodes/wirings. This causes a decrease in yield.

On the other hand, one well-known technique is the anodic formation technique of Ta or Al (see, for example, Electrochemistry Handbook (Maru+l), published December 1960, pages 874 to 892).

This is a technology that electrochemically oxidizes the surface of metal.
Conventionally, it has been used for capacitors and surface coatings.

Oxidation using this technology 11! The advantage of i (insulating film) is that defects due to dust are less likely to occur. For this reason, there is a conventional technology that utilizes this technology for TFTs (Japanese Patent Laid-Open No. 58-147
(See No. 069).

Prior art related to the present invention includes Japanese Patent Application Laid-Open No. 63-164 regarding anodic oxidation, and Japanese Patent Application Laid-Open No. 58-907 regarding storage capacitor electrodes or dielectrics.
No. 70 and Japanese Unexamined Patent Publication No. 58-93092.

[Problem to be solved by the invention]

The above conventional technology does not take into consideration issues such as simplification of processes, short circuits between gate electrodes/wirings and other electrodes, or gate wiring resistance, and has problems in terms of 1 display panel characteristics, 2 yield, and cost. Ta.

The present invention aims to provide a technique to solve these problems. In other words, through a simple process, the gate wiring resistance can be lowered and the short circuit described above can be prevented.

Furthermore, the present invention provides a technology that can improve the characteristics of thin film transistors and display panels.

[Means to solve the problem]

In order to achieve the above objective, Al or AI is used for the gate electrode, gate wiring, and additional capacitor electrode! In addition, an anodic oxide film free of defects of the metal is used as at least one of the gate insulating film, the dielectric film of the additional capacitance, and the interlayer insulating film at the wiring intersection. More preferably, the anodic oxide film is used for all of the gate insulating film, the dielectric film of the additional capacitance, and the glabellar insulating film at the intersection of the ridge lines.

[Effect]

A metal film mainly composed of Al or Afl is used as a gate electrode.
By using it for wiring and additional capacitance parts and anodizing it, the surface thereof is coated with AlzOs. This results in the following technical features.

1. By using a suitable anode chemical solution, it is possible to cover the gate electrode, wiring, and additional capacitance portion with a flat and defect-free oxide film (insulating film).

Therefore, the gate wiring resistance can be lowered, and short circuits between the gate electrode/wiring and other electrodes and wiring in the additional capacitance section can be prevented.

2. In particular, if Al-8i-A11-Pd is used, flat gate electrodes/wirings and additional capacitance electrodes without hillocks can be obtained, and panels with higher yields can be manufactured.

3. Furthermore, by depositing SiN or 5iOz on these insulating films by plasma CVD to form a two-layer structure, it is possible to prevent short circuits and at the same time stabilize the threshold value of the TFT.

4. By oxidizing all the metal film on the gate electrode/wiring (terminal part) and the part extending outside the additional capacitor electrode,
It is possible to reduce the height difference between gate electrodes and wiring, and to form a substrate protective film, thereby obtaining a more reliable display panel.

5. Wiring resistance can be further reduced by locally performing anodic oxidation.

〔Example〕

Figure 5 shows partial circuit diagrams corresponding to two pixels on the TFT substrate. ) shows the case where an additional capacitance is formed between the gate wiring of the own stage, and (d) shows another example of the case where the additional capacitance is formed between the adjacent gate wiring. 31 is a gate wiring, 31 is an adjacent gate wiring, 32 is a thin film transistor, 33 is a liquid crystal display section, and G, S, and D are the gate, source, and drain of the thin film transistor, respectively. 34 is a counter electrode, 35 is a wiring intersection, 36 is an additional capacitor, 37.3
8 is a signal wiring. As an example, FIG. 6 shows an example of the layout of the gate electrode, gate wiring, and additional capacitance electrode corresponding to the circuit of FIG. 5(b). Here, adjacent pixels are arranged at the same pitch. Although this example is shown, the present technology can be used in exactly the same way even with a layout shifted by half a pitch.

Further, although an example is shown here in which the gate portion (A) and the wiring intersection portion (B) are separated, they may not be separated. A metal mainly composed of Al or AΩ is formed on an insulating substrate and patterned, for example, as shown in FIG. 6 by a photoetching process.

Through this photo-etching process, the gate wiring 30,
A gate electrode (area A) and an additional capacitor electrode (area C) can be formed. Subsequently, anodic oxidation is performed to grow aluminum oxide (AΩZOS) on the surface of the patterned metal. The part of the TFT substrate that particularly requires the A Q z Os film is the thin film transistor part (A) as shown in Figure 6.
There are three locations: a wiring intersection (B) and an additional capacitor (C).

Another feature of the present technology is that Altos is formed in these necessary portions by one-time anodic oxidation. This is because in these parts, the metal 30 and the signal wiring or pixel electrode overlap, and an interlayer insulating film or dielectric film is required.

Therefore, the AlzOa film required here is required to be free of defects and have small leakage.

Since anodic oxidation is a wet process, it is not affected by the adhesion of foreign matter such as dust, and it is easy to obtain a defect-free oxide film. greatly influenced by. For this reason, the selection of chemical liquid is important.

When Al is anodized, there are two types of AlzOa.
A membrane is obtained. One is porous and the other is non-porous. It is well known that the former can be obtained as a chemical solution using a strong acid such as phosphoric acid or oxalic acid, and the latter can be obtained using a weak acid such as boric acid or tartaric acid (see the above-mentioned Electrochemistry Handbook, etc.)6. The latter non-porous material is suitable for this purpose. However, it has been found that the non-porous Au1Oa obtained when a weak acidic solution is used also has a different surface roughness. For example, as a chemical liquid,
A4zOs mainly using a tartaric acid aqueous solution with a concentration of several percent.
This is undesirable because it significantly impairs the withstand voltage and leakage characteristics of the device. This tartaric acid is diluted with, for example, ethylene glycol or propylene glycol to a pH of 7.0±0.
It was found that using the chemical conversion liquid No. 5 had extremely good pressure resistance and leakage characteristics. Comparing ethylene glycol and propylene glycol, the former is more desirable from the viewpoints of general use in normal semiconductor processes, easy availability, and good liquid stability.
Although the 2z○δ film can be used alone as a gate insulating film, it is necessary to use a silicon nitride film (SiN film) or a silicon oxide film (S
It is effective to form a composite film with an iOx film). Si
This is because the N film and the 5ins film can be formed continuously with the a-Si active layer, making it easy to obtain a clean interface. On the other hand, forming a SiN film or a 5iOz film usually requires a temperature of 200° C. or higher, but in the case of an Al electrode, hillocks occur at this temperature and the surface becomes rough. However, when the Al surface is coated with an AfizOs film, the occurrence of hillocks is suppressed.

Furthermore, to improve the insulation properties of AlzOa, AlzOa
It is effective to perform heat treatment after formation. Figure 8 shows AlzO
The relationship between the leakage current of s and the heat treatment temperature is preferably 200°C to 400°C. If the temperature is higher than this, the Al film will peel off.

What is important here is the thickness of the AlzOa film. In terms of the mutual conductance gm of a thin film transistor, the thinner the gate insulating film is, the better; on the other hand, the thinner the gate insulating film, the lower the dielectric strength. FIG. 9 shows the relationship between AlzOa film thickness and breakdown voltage (■). In a normal LCD panel, the gate and drain (signal wiring)
A voltage of about 25V at maximum is applied between them. Therefore, the Alto3 film needs to have a thickness of 500 Å or more. This is the same even when the gate insulating film has a two-layer structure of AlzOa and SiN or 5iOz. SiN film or 5i
When a pinhole occurs in the ns film, the voltage is A Q z
This is because it is applied only to Oa.

The above has explained the case of using pure Al for gate electrodes and wiring, but pure AΩ is an extremely active metal, and it is difficult to obtain reproducibility when forming it by vacuum evaporation. Even at temperatures of 100-odd degrees, it has drawbacks such as hillocks and protruding surfaces.

These drawbacks can be overcome by using Al mixed with a trace amount of Si or Pd of several percent or less.

This Al-Si or Al-Pd material can be anodized in exactly the same way by the method described above, and has the same characteristics.
It was found that an Os film could be obtained. Therefore, Al-
8i material or S i -P d can also be applied to the panel just as pure Al.

Furthermore, Figure 6 shows an example of a case where a two-layer structure of metal is used as the gate electrode/wiring.This example is a case where the same type of metal is used for the two layers of metal, and here Al is shown. . A first Al layer is patterned as a gate electrode/wiring 41, and a second Al layer 42 is deposited on the entire surface of the pattern to convert it into A Q z Os. Thereafter, all of this second Al is converted into A11zOs43 by anodic oxidation. The A Q zo a film is a transparent material with a transmittance of 80% or more, and can be used as a layer for blocking impurities from the substrate side, and can also be used as a protective film for the substrate. Therefore, by this method, AlzOs for the gate insulating film, A Q z Oa for wiring coating, an impurity blocking layer, and a substrate protection layer can be obtained at the same time by a single anodic oxidation. Furthermore, the steps of the gate electrode and wiring are made of AlzOs.
It also has the advantage of being able to be made smaller by the film thickness.

Of course, this method can also be used for Al-8i and Al-Pd.

In the above explanation, we have described the case in which the entire surface of the gate electrode, wiring, and additional capacitance section is anodized; however, only the intersection of the gate electrode, additional capacitance section, and gate wiring section with the signal line may be locally anodized. Of course, this is also a good thing. In this case, as shown in FIG. 5, the gate wiring 30 is formed by patterning Al or a metal mainly composed of Al, and then photoresist is applied to the entire surface, and then five areas (A) and (B) are formed.
) Perform anodization with the resist in part (C) removed. In this case, due to the withstand voltage characteristics of the resist (if a voltage higher than the withstand voltage is applied, Al will disappear due to discharge), the anodizing voltage will be increased. It is not appropriate to do so, and it is desirable that the voltage be 150V or less (at this time, the Aα20s film thickness is approximately 2100V). More preferably 120V (at this time, the AlxOδ film thickness is approximately 160V)
0 people) or less is better.

By locally anodizing in this way, it becomes possible to further lower the wiring resistance.

<Example 1> This will be explained using FIG. 1. FIG. 1(a) shows a cross section of the thin film transistor array substrate according to this example, and FIG.
b) shows a plane, in the same figure.

1 is an insulating substrate, 2 is Al, and 3 is anodized Al film (A
lzOs), 4 is silicon nitride (1), 5 is a hydrogenated amorphous silicon film, 6 is a silicon nitride film (2), and 7 is a phosphorus-doped hydrogenated amorphous silicon film.

8 is a Cr film, 9 is an Al film, 10 is a transparent electrode, 11 is a protective film, 12 is a gate wiring pass line, 13.14 is a gate wiring, 15, 15' is a signal line (also serves as the drain electrode of the thin film transistor) , A is the anodized region of the TFT section,
B shows an anodized region at a wiring intersection.

Al is formed on an insulating substrate 1 by 1000-layer resistance heating vapor deposition or sputter vapor deposition, and is patterned to form a gate wiring pass line, a gate electrode, and a gate wiring 2. At this time, each gate wiring 13, 14 is connected to the gate wiring pass line 12. The gate wiring pass line is formed of the same Al, and is used as a voltage supply line during anodization. After that, photoresist 3.0
Fig. 1 (
In b), the resist in areas A and B surrounded by broken lines is removed. Area A is a TFT portion, and area B is a wiring intersection.

The cross-sectional view of FIG. 1(a) is a-a' and b- of FIG.
Corresponds to part b'.

In this state, the substrate is immersed in a chemical solution and a voltage of +72V is applied to the gate wiring pass line. Areas A and B after about 30 minutes
An AlxOs film 3 of about 1000 layers is obtained on the surface of Al. At this time, 700 of the 1700 A Q people will be oxidized. As the chemical solution, a solution prepared by diluting a three-layer tartaric acid solution with ethylene glycol or proplene gelicol and adjusting the pH to 7.0±0.5 by adding aqueous ammonia is used. By locally anodizing in this way,
Since most of the Al in the gate wirings 13 and 14 does not need to be anodized, the wiring resistance can be kept low. Furthermore, the selective etching technique for Al and AlzOs becomes unnecessary. After removing the resist, perform 2 steps in air or vacuum.
Heat at 00-400°C for 60 minutes. This heating causes A
The leakage current of Q z Oo is reduced by more than one order of magnitude. On top of this, a first silicon nitride 4 is deposited by 1,000 to 3,000 layers of hydrogenated amorphous silicon (A-8
i) 200 to 1,000 deposits of silicon nitride 5 and 1,000 to 2,000 deposits of second silicon nitride 6; At this time, the substrate temperature is 1
A temperature of 50 to 320°C is often used. Thereafter, the second silicon nitride 6 is patterned, leaving only the wiring intersections above the channel of the TFT (FIG. 1(a)).

Amorphous resin doped with 0.6-2.5% phosphorus Deposit 200-500 people of Recon (10 layers) 7.

It is patterned and left only in the source-drain portion of the TFT, and at this time a-S i 5 is also removed at the same time.

500-1000 people for Cr 8, 3000-8 people for Al9
Deposited by resistance heating evaporation or sputter evaporation.

It is patterned to form signal lines 15, TFT drain/source electrodes, etc. During processing of this Al (9), the previously formed gate wiring pass line is removed, and a transparent electrode 1 made of zero-order indium oxide is formed to separate each gate wiring.
About 1,000 layers of 0 are deposited by sputter deposition and patterned to form pixel electrodes, terminals, and the like.

Finally, about 1 layer of silicon nitride 11 is added using plasma CVD method.
The silicon nitride on the terminal portion is removed by a photoetching process to complete a thin film transistor play substrate (FIG. 1).

One display panel is completed by combining this substrate and a counter substrate and sealing a liquid crystal between them.

The display panel obtained in this way has low gate wiring resistance,
There is no short circuit between electrodes at the TFT section or wiring intersection, and the dielectric constant of AlzOs is 8.7, which is 6.
．． 9, the gm of the TFT was improved by this amount, and the area of the additional capacitance portion was reduced, resulting in improved transmittance. In this way, a display panel with high yield and high performance was obtained.

Here, an example was shown in which Al was used as the gate electrode wiring, but AQ containing 1 to 3% Si instead of Al
-S i Furthermore, S i -P d containing a trace amount of Pd
But they can be used in exactly the same way. Also, AQ/
Cr was used, but instead of Al, the previous Al-8i, Al
-Pd can be used. Furthermore, Cr is not necessarily necessary.

In this embodiment, the anodization was performed locally, but it goes without saying that the entire surface may be anodized except for the terminal portions. Further, in this embodiment, the TFT region A and the wiring crossing region B are shown separately, but the region A and the region B may be continuous regions.

Embodiment 2 In this embodiment, an anodized film is used for at least a portion of the gate insulating film of a thin film transistor, the insulating film at the wiring intersection, and the additional capacitance.

This will be explained using FIGS. 2 and 3. FIG. 2(a) shows a cross section of the TFT substrate according to this example, FIG. 2(b) shows a plane view, and FIG. 3 shows a cross-sectional view at each step. Symbols of each part are the same as in Example 1. It is.

This embodiment differs from the first embodiment only in the presence of a region C indicated by a broken line in FIG. 2(b). Region C is a portion where a capacitance is formed between the pixel electrode 10 and the adjacent gate wiring, as explained in FIG.

The manufacturing method is exactly the same as in Example 1. Figure 3(a)
(b) is the cross section after anodization, and (b) is the cross section of the second silicon nitride 6.
(C) is the cross section when patterning n10 layers, (d) is the cross section when patterning Cr 8 and Al 9, and (e) is the cross section when pixel electrode 10 is patterned. Each cross section is shown when patterned.

As shown in Figure 2(a), the dielectric of the additional capacitance is A.
Although it has a two-layer structure of lzOs and silicon nitride film,
Since A Q z Oa and the silicon nitride film can be selectively etched easily, it goes without saying that only 8Ω2oδ can be used as the dielectric.

<Example 3> In Example 1.2, a case was described in which a silicon nitride film was formed on A 11 z Os, but in Example 1.2, 5iOz can be used instead of silicon nitride.

5iOz is formed by the following method. 5iHi and NzO
The substrate temperature for forming a 5-ins film with a thickness of 1,000 to 3,000 cm by plasma CVD using a mixed gas containing as main components is 200 to 300°C. The structure when this 5iOz film is used is completely the same as Example 1.2 except that the silicon nitride film 4 in FIGS. 1 and 2 is replaced with a 5iOz film.

<Example 4> In Example 1.2, first silicon nitride, amorphous silicon, and second silicon nitride were deposited in this order on the AlzOa film by the plasma CVD method.

In this embodiment, the second silicon nitride is not used.

This will be explained using FIG. 11. FIG. 11 shows the thin film transistor section (area A) and the wiring intersection section (area B) shown in FIG. 6.
, sectional views of portions corresponding to the additional capacitance portion (area C) are shown in (a), (b), and (c), respectively.The symbols in FIG. 0 are the same as in FIG. 2.

The planar layout is the same as that in FIG.

Ail or Aα (S i 3%) on the insulating substrate 1
.

Form 2300 Al (0.3% Pd). Pattern and create gate electrodes and wiring (including additional capacitance electrodes)
form 2. In anodizing, the voltage for forming Aαz Oa 3 is set at 144 V. At this time, the thickness of AlzOs3 is approximately 2000 mm, and the thickness of Al2 that is not chemically formed is approximately 1000 mm. On top of this, silicon nitride or silicon oxide is applied at a concentration of 1000 to 30
Form 00 people. Next, amorphous silicon was heated to 200~2
Form 000 people. Furthermore, amorphous silicon containing 0.5 to 2.5% phosphorus is deposited. Thereafter, a photo-etching process is performed to remove the amorphous silicon film in areas other than the thin film transistor area and the wiring intersection area. After that, 40 Cr
Forming 0-1000 people, Al 3000-5000 people,
Patterning is performed to form signal wiring and source/drain electrodes 8 and 9 of the m-film transistor. Next, using this as a mask, phosphorus-doped amorphous silicon 7 is processed. After that, indium oxide transparent electrode (iTo electrode) was applied at 500 to 2000
The pixel electrode 10 is formed by manual sputtering. This iTO electrode may be left over the entire area above Ail, thus completing a TFT substrate having the cross-sectional structure shown in FIG. I keep it on top of this! A film (silicon nitride approximately 1 μm thick) is formed, and the panel is then completed in the same manner as in Example 1.

The wiring intersection portion and the additional capacitance portion can have not only this structure but also structures such as those shown in FIGS. 11(b') and 11(c'), for example. (b') shows an example in which the WIfI51 insulating film at the wiring intersection is made of only AΩson, and (c') shows an example in which the dielectric in the additional capacitance part is made only of AlzOa. In this way, AlzOa, SiN or 5iOz, a
Of course, which of -8L to sandwich can be selected by changing the mask.

This embodiment is characterized in that amorphous silicon and a phosphorus-doped amorphous silicon film can be formed continuously, and the characteristics of the thin film transistor can be stabilized.

Although a two-layer film of Cr and Al was used for the signal wiring here, only Al may be used.

<Example 5> A further example is shown in FIG. 1500 layers of first Al 161 are deposited on the insulating substrate 60 and patterned. On top of that, a second Af162 is deposited over the entire surface of 700 people. This state is the same as in Example 1.2.

Anodic oxidation is performed at a formation voltage of 72V. Now all of the second All becomes AjlzOa63 and becomes transparent AlzOs. Thereafter, a panel is manufactured in exactly the same manner as in Example 1.2.

The advantages of the present invention are that the gate step can be made small, and that Al
The entire surface of the substrate is protected by the zOa film.

In the above embodiments, the example shown in FIG. 4(b) has been described, but it goes without saying that panels can be manufactured using exactly the same technique in other cases as well.

〔Effect of the invention〕

As explained above, the present invention uses Al in the gate electrode/wiring.
Alternatively, in order to use Al containing Si or Pd alone or as a composite film, the wiring resistance is lowered and then coated with Al20δ obtained by anodizing, and at the same time used as a dielectric for the gate insulating film and capacitor part. As a result, a high-performance panel with no defects due to short circuits was obtained through a simple process.The zero yield was more than double that of using only conventional SiN, the GM was improved by 25% to 100%, and the light utilization rate was also improved. Improved by more than 20%. Furthermore, by locally anodizing Al, it was possible to further reduce the wiring resistance. In addition, by depositing thin Al over the entire surface of the substrate and making it all A Q z Oa, it was possible to simultaneously form a substrate protection film, reduce gate steps, and eliminate disconnections at steps.

Although we have described an example of amorphous silicon as the active layer of TFT, this material is not limited to this, and TFT
Of course, it may be made of a material such as E or poly-Si.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a first embodiment of the present invention, FIG. 2 is a diagram showing a second embodiment of the present invention, and FIG. 3 is a diagram showing the steps of the second embodiment of the present invention. Figure 4 shows the prior art, Figure 5
Figure 6 is a partial circuit diagram of the TFT substrate, Figure 6 is an explanatory diagram of the present invention, Figure 7 is a diagram showing the relationship between the chemical liquid and leakage characteristics, and Figure 8
Figure 9 shows the effect of heat treatment, Figure 9 shows the relationship between AlzOδ film thickness and breakdown voltage, and Figure 10 is an explanatory diagram when a two-layer metal of first Al and second Ao is used. , FIG. 11 is a diagram showing a fourth embodiment of the present invention, and FIG. 12 is a diagram showing a fifth embodiment of the present invention.
It is a figure showing an example of. 1... Board, 2-AQ (AQ-8i),
3-AlzOa, 4... silicon nitride (1), 5...
・a-8i, 6...Silicon nitride (2), 7...
Impurity a-3i, 8...Cr, 9...Al, 10.
...Transparent electrode, 12...Gate wiring pass line, A.
...TFT section, 13.14... Gate wiring, 15...
・Signal line, B...Wiring intersection, C...Additional capacitance part. Rod concave (^) Fig. 2 (a-) (Bn 18 branches ■ No. 14 Mouth (0+) To A-' cod value (b) No. 1 No. 0 No. 0 No. of concavity A! yo θs (A's prisoner α's (b'n 鴇ζcL) Hisaku<b)

Claims (1)

[Claims] 1. A plurality of gate wirings formed on an insulating substrate;
In a display panel having a TFT substrate including a plurality of signal wirings arranged to intersect therewith and a thin film transistor arranged at the intersection of the gate wiring and the signal wiring, the gate wiring and the gate electrode of the thin film transistor are made of aluminum. Alternatively, a display panel is made of a metal containing Al as a main component, and at least one of an insulating film at a gate portion of the thin film transistor and an insulating film at a wiring intersection portion includes an anodized film of the metal. 2. The display panel according to claim 1, wherein the insulating film in the gate portion and the wiring intersection portion both include an anodic oxide film of the metal. 3. The display panel according to claim 1 or 2, wherein the insulating film forming the additional capacitance includes at least an anodized film of Al or a metal containing Al as a main component. 4. Claim 1, 2 or 3, wherein the gate insulating film of the thin film transistor is a composite film of the anodized film and another insulating film of a different type different from the anodized film.
Display panel as described. 5. The display panel according to claim 4, wherein the different type of insulating film is a silicon nitride film. 6. The display panel according to claim 4, wherein the different type of insulating film is a silicon oxide film. 7. The display panel according to claim 1, wherein the material constituting the active layer of the thin film transistor is hydrogenated amorphous silicon. 8. The display panel according to any one of claims 1 to 7, wherein the interelectrode thin film at the wiring intersection portion is made of the anodized film, a different type of insulating film, and a hydrogenated amorphous silicon film. 9. The display panel according to any one of claims 1 to 7, wherein the interelectrode thin film at the wiring intersection portion is comprised of the anodized film and the different type of insulating film. 10. The display panel according to claim 1, wherein the dielectric thin film forming the additional capacitance is composed of the anodized film, the dissimilar insulating film, and the hydrogenated amorphous silicon film. . 11. The display panel according to claim 1, wherein the dielectric thin film forming the additional capacitance is composed of the anodized film and the dissimilar insulating film. 12. The display panel according to claim 1, wherein the gate wiring is entirely covered with the anodized film. 13. The display panel according to claim 1, wherein the anodization is performed only on at least one of the gate portion of the thin film transistor, the wiring intersection portion, and the additional capacitance portion. 14. The display panel according to claim 1, wherein the anodized film has a thickness of 500 Å or more. 15. Claims 1 to 1, wherein the anodization is performed using a glycol solution containing tartaric acid as a chemical solution.
The display panel described in item 4.